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2126 Commits

Author SHA1 Message Date
Bartosz Dunajski 90d85bee55 Remove ftrGT flags support 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-01-27 17:39:48 +01:00
Dominik Dabek 07c75c2de3 Revert "Check IndirectStatelessCount from igc" 
This reverts commit 01f368ac147d99fd0dcb4d71a9a2543cd215adfd.

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-01-27 16:06:13 +01:00
Kamil Diedrich d2fbcc1960 Updating wsl compute helper tokens and enbaling local memory 
Adding tokens needed for DG2 local mem enabling in WSL
Enabling local memory for DG2 for WSL

Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2022-01-27 14:26:24 +01:00
Bartosz Dunajski 09346690e8 Add XE_HP_SDV device ids 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-01-26 18:46:45 +01:00
Bartosz Dunajski 72edadb265 Remove not used GT type info 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-01-26 18:06:38 +01:00
Dominik Dabek a5067d6b0b Remove duplicate check in residency container 
Remove find in SVMAllocsManager
addInternalAllocationsToResidencyContainer,
not needed, CSR resolves duplicates at makeResident calls

Co-authored-by: Michal Mrozek <michal.mrozek@intel.com>

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-01-26 17:09:31 +01:00
Michal Mrozek 592eb4607e [4/n] Improve indirect allocations handling. 
Add memory manager interfaces to obtain the status.
Only support when VmBind is supported.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-01-26 15:24:32 +01:00
Igor Venevtsev af7a475cb0 Fix debug zebin creation 
- ELF type is EXEC
- Absolute GPU addresses in program headers as load addresses
- All relocations are applied (not only for debug info as before)
- Default section alignment for debug zebin is set to 4,
this fix the problem with .notes section parsing

Related-To: NEO-5571
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2022-01-26 13:55:32 +01:00
Maciej Plewka f8c104feaa Use fw declaration of IndirectHeap in CommandContainer 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-01-26 13:30:26 +01:00
Dominik Dabek 63f406a58c Check IndirectStatelessCount from igc 
If kernel has no stateless indirect accesses don't set the
kernelHasIndirectAccess flag.
Don't make resident or migrate if kernel has no indirect accesses.
Changed initial values in KernelAttributes.

Related-To: NEO-6597

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-01-26 11:10:04 +01:00
Lukasz Jobczyk 44596f6e4d Revert "Improve mmap logic in createAllocWithAlignment" 
This reverts commit adb5c58292165f1d5a144548c5d5148021d2152e.

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-01-26 08:52:12 +01:00
Compute-Runtime-Validation 15b9ec57d1 Revert "Enable Flush task by default for immediate commandlist" 
This reverts commit 22bbce42dd.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-01-26 04:53:03 +01:00
Jaime Arteaga dbf0f90186 Return pageSize in getMemAllocProperties 
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2022-01-25 18:26:13 +01:00
Michal Mrozek 6df17f5a30 [3/n] Optimize indirect allocations handling. 
Add new debug variable to trigger new mode.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-01-25 16:40:56 +01:00
Filip Hazubski 0424f30782 Improve mmap logic in createAllocWithAlignment 
Group small allocations and reuse mapped memory in order to keep map
count small.

Related-To: NEO-6417

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-01-25 15:30:29 +01:00
Michal Mrozek a12f9cb377 [2/n] Optimize indirect calls. 
Migrate shared allocation when command list sets indirect flags.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-01-25 13:10:53 +01:00
Mateusz Jablonski bf7b2674a5 Correct programming of horizontal alignment on Xe Hpc 
for linear surfaces we should program value of 128

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-25 11:14:44 +01:00
Lukasz Jobczyk 9330f737d4 Revert "Check if direct submission available once" 
This reverts commit 7ab6d2801a.

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-01-25 10:01:15 +01:00
Mateusz Jablonski 5e238dc7f1 Unify surface state programming logic related to implicit scaling 
OCL image surface state programming for Xe Hp core is now reusing logic
of EncodeSurfaceState helper

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-25 09:02:28 +01:00
Michal Mrozek 52d636394c [1/n] Improve indirect allocations handling. 
Add new functions that would treat all indirect allocations as single pack.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-01-25 06:27:33 +01:00
Aravind Gopalakrishnan 22bbce42dd Enable Flush task by default for immediate commandlist 
Related-To: LOCI-1988

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-01-25 01:12:30 +01:00
Mateusz Jablonski 0c933d83af Update RENDER_SURFACE_STATE for Xe Hpc 
For Xe Hp and later rename RSS tile mode enum from YMAJOR to TILE4

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-24 18:06:42 +01:00
Filip Hazubski 2dc54f6fd9 Update isLinuxCompletionFenceSupported value for XE HPG CORE 
Related-To: NEO-6575

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-01-24 14:58:17 +01:00
Compute-Runtime-Validation 1634ac9ec3 Revert "Dont generate gen file by default" 
This reverts commit 95943dee0f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-01-24 14:46:29 +01:00
Michal Mrozek 151aaf7678 Fix alignment for host allocations. 
- it is 4k not 64k.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-01-24 13:24:03 +01:00
Filip Hazubski 170fd00d24 Improve mmap logic in createAllocWithAlignment 
Unmap trailing extra memory right away.

Related-To: NEO-6417

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-01-21 14:16:27 +01:00
Zbigniew Zdanowicz a7455b5767 Add tweaks and control flags to linux completion fence 
Related-To: NEO-6575

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-21 13:41:23 +01:00
Mateusz Jablonski bbea52f3f9 Update CFE_STATE for Xe Hpc 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-21 10:55:20 +01:00
Ayush Pandey 715b9d31d2 Find sscanf alternative. 
Used strtol() to write sscanfUtil to extraxt info of BDF pcipath.

Related-To: LOCI-1002

Signed-off-by: Ayush Pandey <ayush.pandey@intel.com>
 2022-01-21 09:02:48 +01:00
Aravind Gopalakrishnan e29a85ebb3 Use ImmediateDispatch mode for L0 command queues 
Related-To: LOCI-1988

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-01-21 00:23:04 +01:00
Zbigniew Zdanowicz ec40b6562e Add unit tests for completion fence 
Related-To: NEO-6575

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-20 21:15:34 +01:00
Mateusz Jablonski 570c4d4626 Correct comments and bitfield ranges in Render Surface State definition of Xe Hp 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 17:55:27 +01:00
Mateusz Jablonski 8e03ce9c54 Correct programming of horizontal alignment on Xe Hp 
for linear surfaces we should program value of 128

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 16:41:22 +01:00
Mateusz Jablonski fbc0666d1b Move setGrfInfo from HardwareCommandsHelper to EncodeDispatchKernel 
unify grf info programming across APIs

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 15:42:06 +01:00
Michal Mrozek 27c43b27f3 Remove not needed method. 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-01-20 15:02:19 +01:00
Compute-Runtime-Validation 6082865eb4 Revert "Optimize Level Zero indirect allocations handling." 
This reverts commit 3ecbc55ba9.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-01-20 11:41:13 +01:00
Mateusz Jablonski c79b8f0e90 Correct programming of horizontal alignment on Xe Hpg 
for linear surfaces we should program value of 128

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 11:08:04 +01:00
Mateusz Jablonski dfe23a08b2 Update RENDER_SURFACE_STATE for Xe Hp 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 10:53:54 +01:00
Zbigniew Zdanowicz d44f3009b8 Add interface for user fence extension 
Related-To: NEO-6575

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-19 19:58:22 +01:00
Kamil Diedrich 1b7949432f Add shareable allocation on windows dGPUs 
Add default initialization for object members

Related-To: LOCI-2665

Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2022-01-19 19:03:18 +01:00
Krzysztof Gibala b75f5d4c8b Add debug flag ForceExtendedBufferSize 
Forces extended buffer size by adding pageSize specify by number when
debug flag is >=1 in:
- clCreateBuffer
- clCreateBufferWithProperties
- clCreateBufferWithPropertiesINTEL

Usage:
ForceExtendedBufferSize=2
size += (2 * pageSize)

Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2022-01-19 18:52:10 +01:00
Michal Mrozek 3162c52250 Remove not needed debug variable. 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-01-19 18:20:44 +01:00
Mateusz Jablonski 5cd76aef6a Refactor surface state programming, add enum value for default halign value 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-19 14:31:28 +01:00
Michal Mrozek 3ecbc55ba9 Optimize Level Zero indirect allocations handling. 
Make them resident directly instead of populating residency container
Remove finds, not needed, CSR resolves duplicates at makeResident calls
Observed gain is 32x for 10k indirect allocations.


Co-authored-by: Michal Mrozek <michal.mrozek@intel.com>

Co-authored-by: Dominik Dabek <dominik.dabek@intel.com>

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-01-19 13:08:35 +01:00
Katarzyna Cencelewska 20f17f775e Remove device enqueue part 8 
- remove hasDeviceEnqueue

Related-To: NEO-6559
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-01-19 11:16:35 +01:00
Katarzyna Cencelewska 97765cd39f Remove device enqueue part 7 
- mainly remove BlockKernelManager and ReflectionSurfaceHelper

Related-To: NEO-6559
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-01-19 10:41:57 +01:00
Mateusz Jablonski 8ebef3769c Update RENDER_SURFACE_STATE for Xe Hpg 
Program Multi Gpu params in surface state only on Xe Hp Sdv
Respect zero-size image scenario when programming surface state
Move XeHp-only tests to dedicated subdir

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-18 21:06:14 +01:00
Bartosz Dunajski 10f329768f Fix multitile tag initialization for AubCsr 
Before this change, only Tile0 tag was initialized

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-01-18 19:33:57 +01:00
Mateusz Jablonski c40153ec86 Clarify logic of walk order values for Xe Hp and later 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-18 13:36:15 +01:00
Zbigniew Zdanowicz 4238679078 Refactor implicit scaling device support 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-18 13:08:43 +01:00