Commit Graph

457 Commits

Author SHA1 Message Date
2f24ef6855 Error from clEnqueueNDRangeKernel() for too big group counts
Resolves: NEO-6976

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-10-05 12:35:16 +02:00
23eff82d0a OCL: optimize creating printf buffer
Dont create printf buffer when kernel doesnt require it

Related-To: HSD-18023825570
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-09-30 12:25:57 +02:00
d8b7d56160 Copy host ptr on cpu if possible in clCreateBuffer
use cpu copy with locked pointer if possible
because this is faster than copy on gpu
limit to buffers of size at most 64kb

Related-To: NEO-7332

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-09-27 17:54:06 +02:00
e00a5e0a1e Release main copy engine from device and sub device
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-20 17:12:34 +02:00
0192e8038f Check for GPU hang in path with wait for timestamps
Related-To: NEO-6868

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2022-09-19 15:01:46 +02:00
f65d2aeb87 Split copy along single dimension
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-08 12:39:06 +02:00
6ad16c9e72 Missing support for OCL debugging with L0
- make resident debugSurface
- allocate debugSurface with correct allocation type and size
- notify cmdQ create/destroy

Related-To: NEO-7075

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-09-07 13:30:05 +02:00
a9b3b8137f Release locks before wait on blocking BCS split calls
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-05 11:20:23 +02:00
0d6bef0753 Add BCS split to api specific config
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-05 11:13:10 +02:00
20f49481f2 Revert "Enable BCS split WA in OCL"
This reverts commit d672920121.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-09-03 20:25:10 +02:00
d672920121 Enable BCS split WA in OCL
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-01 16:26:00 +02:00
c3f7e40a8d Rename special pipeline select mode to systolic
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-31 22:16:26 +02:00
399758ef17 Change default engines for BCS split
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-08-31 21:34:36 +02:00
a3dedcc7ee Add minimal transfer size for BCS split
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-08-31 21:28:40 +02:00
595cfebaef Refactor PIPE_CONTROL programming
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-08-23 13:55:25 +02:00
82e29fd048 Add bcs split control mask
Introduce debug variable to control which engines
the tranfser will be split into

Related-To: NEO-7173

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-08-19 13:21:10 +02:00
18adbed233 feat(zebin): add thread scheduling mode support
Resolves: NEO-7197

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-08-18 16:10:18 +02:00
b10b3ed9dd Add initial enqueue bcs split infrastructure
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-08-18 15:02:08 +02:00
fea9c9aca7 Add test to detect potential race
also add lock inside initialGpgpu

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-08-12 09:42:58 +02:00
ed0c36117e Apply heuristics when setting TG dispatch size on XE_HPC_CORE
The default TG dispatch size can be changed
to a better value based on number of threads in TG or
currently available amount of threads on GPU.
Decision on what TG dispatch size should be are based on
implemented heuristics.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6989
2022-08-08 16:43:10 +02:00
b38c750cc4 Revert "Add finish before command queue is released"
This reverts commit 50fae92ea2.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-08-05 19:25:23 +02:00
61510e9a92 Revert optimization of gpgpu csr's mutex lock in the enqueue blit
optimization available under flag
ForceCsrLockInBcsEnqueueOnlyForGpgpuSubmission

Related-To: NEO-7011
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2022-08-04 16:42:50 +02:00
a3903c385e Remove HW types from synchronization interface
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-07-25 13:59:26 +02:00
d4d54f5093 Cleanup includes
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-07-25 09:58:38 +02:00
e88b24eb37 Remove flush on svmmap
No longer needed, problem was with reusing mem obj allocation.

Related-To: NEO-6948

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-07-20 17:26:15 +02:00
50fae92ea2 Add finish before command queue is released
Related-To: NEO-5279

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-07-20 12:16:27 +02:00
3f8c19eec9 Limit system memory flag in builtin kernels to destination argument
Related-To: NEO-6959

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-07-19 10:58:51 +02:00
52b00a11b0 Remove LSH from CommandQueue
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-07-19 08:47:02 +02:00
82a6f9e7b2 Use compute walker system fence for system memory or events in use
Related-To: NEO-6959

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-07-13 11:55:32 +02:00
e07f9f0698 Add kernel algorithm to check any argument is using system memory
Related-To: NEO-6959

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-07-12 13:08:49 +02:00
461a2eb8c7 Refactor interface to hardware interface
Related-To: NEO-6959

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-07-05 11:54:33 +02:00
4fb4a1d77b Add LogicalStateHelper getter for CommandQueue.
Refactor Kernel handling

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-07-04 13:21:15 +02:00
7a1cac0674 Fix EnableCmdQRoundRobindEngineAssign flag
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-06-27 11:38:52 +02:00
39dfaf64bc Fix: Flush on svmMap on multi device 2/n
Previous fix was causing the runtime to get buffer size
without gfx allocation, causing a seg fault.

This commit moves the fix logic to enqueue handler,
only changing the enqueueProperties.

Related-To: NEO-6948

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-06-21 11:38:28 +02:00
6ab6e1abff Fix mutex order for event task and move args to gpu
This commit fixes problem with untransfered shared usm memory to gpu
when there is submit to gpu trigerred by user event. Also there is a fix
for dead lock problem caused by mixed orders of locking mutexes in csr
and in direct submission controller.

Related-To: NEO-6762

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-06-21 11:28:25 +02:00
f98c6b1a8b Disable round robin engine assign on PVC
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-06-20 15:24:18 +02:00
ae61f0368a Fix: Flush on svmMap on multi device
On multi device contexts we allocate svm in system memory.

This caused svmMap calls to assume no copy is needed and
no cache flush was sent to gpu and data modified by earlier
gpu commands was not being visible on host.

This change will add pipecontrol with dcFlush on svmMap
calls when task count from wait is enabled.

Related-To: NEO-6948

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-06-20 12:24:43 +02:00
939d109362 Add LogicalStateHelper class
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-14 16:57:16 +02:00
213dc2fe24 Make CPU copy for read buffer when host ptr is write combined on DG2
With this commit on DG2 32bit driver will check if passed host ptr for
clEnqueueReadBuffer is write combined memory. If check will be true copy
will be make on CPU.

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-06-13 21:23:21 +02:00
0a3c960d61 Enable update task count from wait on DG2
Related-To: NEO-6948

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-06-06 11:41:27 +02:00
8431234845 Change interface to method programing additional fields of command
Related-To: NEO-6959

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-05-26 21:32:59 +02:00
8ff34fea29 Fix typo
-engineGroupTyp to engineGroupType
-remove gap between commits to use same desc.ordinal in createCommandQueue

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-05-24 12:15:12 +02:00
b8cf0c757a Notify gtpin onCommandBufferComplete
Notify gtpin onContextDestroy before SVM Allocations are deleted.

Resolves: NEO-6985

Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
2022-05-20 16:42:13 +02:00
cbd73d2d9c Do not switch to batched mode when update task count form wait is enabled.
There is not need to enable batching in this case as we do not have
synchronization points between enqueues.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-05-19 13:16:20 +02:00
3f04769f07 style: configure readability-identifier-naming.FunctionCase
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-05-17 20:55:56 +02:00
96e1eb7467 Move variables baseDieRev and baseDieA0Masked from xe_hpc to pvc
Pvc specific variables should be located in pvc struct

Related-To: NEO-6738
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-05-17 12:19:16 +02:00
9b2ad0c5df Detect GPU hangs in flushBcsTask()
This change introduces detection of GPU hangs in flushBcsTask()
function. The new code has been covered with ULTs.

Related-To: NEO-6681
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-05-12 16:17:16 +02:00
e722afbefb Track waitlist TimestampPackets to avoid too early return to the pool
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-05-12 13:54:04 +02:00
fb4b1cca4f Use internal blitter for internal memory transfers
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6621
2022-05-11 19:33:00 +02:00
e9be9b64c6 clang-tidy configuration cleanup
Define single .clang-tidy configuration with all used checks and use
NOLINT to selectively silence tool. That way cleanup should be easier.
third_part/ has its own configuration that disables clang-tidy for this
folder.

Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-05-11 14:02:04 +02:00