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199 Commits

Author SHA1 Message Date
Maciej Plewka f8c104feaa Use fw declaration of IndirectHeap in CommandContainer 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-01-26 13:30:26 +01:00
Mateusz Jablonski 5e238dc7f1 Unify surface state programming logic related to implicit scaling 
OCL image surface state programming for Xe Hp core is now reusing logic
of EncodeSurfaceState helper

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-25 09:02:28 +01:00
Mateusz Jablonski fbc0666d1b Move setGrfInfo from HardwareCommandsHelper to EncodeDispatchKernel 
unify grf info programming across APIs

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 15:42:06 +01:00
Mateusz Jablonski 5cd76aef6a Refactor surface state programming, add enum value for default halign value 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-19 14:31:28 +01:00
Mateusz Jablonski 8ebef3769c Update RENDER_SURFACE_STATE for Xe Hpg 
Program Multi Gpu params in surface state only on Xe Hp Sdv
Respect zero-size image scenario when programming surface state
Move XeHp-only tests to dedicated subdir

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-18 21:06:14 +01:00
Mateusz Jablonski c40153ec86 Clarify logic of walk order values for Xe Hp and later 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-18 13:36:15 +01:00
Zbigniew Zdanowicz 4238679078 Refactor implicit scaling device support 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-18 13:08:43 +01:00
Zbigniew Zdanowicz c36c083812 Refactor implicit scaling parameters for surface state 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-17 09:30:58 +01:00
Mateusz Jablonski ff79c84115 Correct INTERFACE_DESCRIPTOR_DATA definitions for XeHp and later 
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-14 19:06:55 +01:00
Zbigniew Zdanowicz b78bb26cbf Refactor partitioning of state base address 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-14 19:06:24 +01:00
Zbigniew Zdanowicz 9c4f05387b Refactor partitioning of dispatched kernels 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-13 22:54:07 +01:00
Zbigniew Zdanowicz 9785ab7828 Refactor encode dispatch kernel class interface 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-13 12:08:38 +01:00
Filip Hazubski 5be4d89b73 Rename function 
Rename MemorySynchronizationCommands::isDcFlushAllowed
to MemorySynchronizationCommands::getDcFlushEnable

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-30 17:03:22 +01:00
Lukasz Jobczyk 205e2e1957 Wait for fence before store cmd buffer in reusable pool 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-12-23 15:36:54 +01:00
Filip Hazubski f4c151cce5 Refactor PipeControlArgs struct 
Remove struct PipeControlArgsBase

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-22 17:13:16 +01:00
Filip Hazubski 9a450d1b74 Pass hwInfo to appendMiFlushDw 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-22 15:22:47 +01:00
Filip Hazubski 0fd685541d Add isDcFlushAllowed function to HwInfoConfig 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-21 18:29:43 +01:00
Filip Hazubski 6d439f88bb Explicitly set dcFlushEnable value 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-21 12:21:11 +01:00
Mateusz Jablonski 66bf806018 Remove magic number from set/getBatchBufferStartAddressGraphicsaddress methods 
rename methods to set/getBatchBufferStartAddress

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-12-16 19:03:01 +01:00
Zbigniew Zdanowicz 0a139caf77 Use timestamp post sync always for multi tile partitioned walkers 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-12-16 16:03:16 +01:00
Lukasz Jobczyk 616580637b Reuse command buffers in L0 command list 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-12-13 14:52:45 +01:00
Filip Hazubski 1107fdfe55 Rename function and remove unused parameter 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-08 22:47:40 +01:00
Rafal Maziejuk d5f3ac37bf Add KernelExecutionType argument to encodeAdditionalWalkerFields method 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2021-12-08 12:00:42 +01:00
Bartosz Dunajski f20236c7f2 Initial PVC support 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>

Related-To: NEO-5542
 2021-12-07 10:22:41 +01:00
Zbigniew Zdanowicz 47dbe359bf Add command encoder for store data command 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-12-02 20:56:07 +01:00
Zbigniew Zdanowicz 3e1023fa1a Unify memory layout for all multi tile post sync operations 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-12-02 18:00:40 +01:00
Mateusz Hoppe 8b233f7f45 Support for bindless mode in L0 - improvements 
Related-To: NEO-6448

- add new IGC compilation flag when bindless mode used
- fix SBA programming of BindlessSurfaceStateSize -
always set maximum surface state count
- fix residency of global DSH heap on gen9 - gen12lp
in bindless mode
- add L0 aub test with bindless kernel - disabled
- partial fixes in OCL aub tests


Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2021-12-02 16:30:58 +01:00
Bartosz Dunajski 55959d4d1d Helper method to check if allocation is compressed 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-02 16:13:53 +01:00
Zbigniew Zdanowicz cb8a17f393 Initialize partition registers only once 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-29 14:43:53 +01:00
Zbigniew Zdanowicz 1da896bee0 Add debug key to override implicit scaling API support 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-25 15:50:25 +01:00
Bartosz Dunajski 91dfa5c2ac Initial DG2 support 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-11-19 10:01:29 +01:00
Zbigniew Zdanowicz 7ea0a11c0a Unify programming of partition registers 
Related-To: NEO-6262


Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-18 16:52:51 +01:00
Zbigniew Zdanowicz 76b8f6296f Move noop programming to dedicated encoder 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-18 10:28:56 +01:00
Zbigniew Zdanowicz 3b556a5e44 Add post sync capability to implicit scaling barrier 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-17 12:08:52 +01:00
Zbigniew Zdanowicz 23a7ab7593 Refactor implicit scaling barriers to add more cache flush options 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-04 17:56:12 +01:00
Zbigniew Zdanowicz b2124f43b8 Add implicit scaling barrier implementation 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-03 12:23:42 +01:00
Zbigniew Zdanowicz 4fbb199790 Add platform parameter to configure pipe control dispatch 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-02 12:14:10 +01:00
Zbigniew Zdanowicz ad8e640545 Reorganize implicit scaling files 
Related-To: NEO-6262


Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-10-29 16:15:00 +02:00
Krystian Chmielewski f20cdac7d3 Zebin: add support for has_dpas 
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2021-10-28 09:59:21 +02:00
Zbigniew Zdanowicz 9d56939980 Refactor creation of buffer surface state 1/n 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-10-21 13:11:31 +02:00
Michal Mrozek 4768be244b Cache post syncs. 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2021-10-13 15:57:13 +02:00
Mateusz Jablonski 5d2d81b2d1 Use uint64_t instead of void * in indirect dispatch programming 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-06 18:37:36 +02:00
Mateusz Jablonski 92bf4b978a Implement implicit args for indirect dispatch 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-06 16:10:41 +02:00
Mateusz Jablonski ae340ff6f5 Add L0 aub tests for indirect dispatch 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-05 21:05:40 +02:00
Zbigniew Zdanowicz 0b64ecba3f Pass active partitions from dispatched kernel to context 
Related-To: NEO-6244

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-10-05 14:57:47 +02:00
Mateusz Jablonski b891ec2588 Correct cross thread data GPU address in indirect dispatch programming 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-04 14:59:41 +02:00
Szymon Morek 897420236a Add method to set systolic mode 
Resolves: NEO-6040

Signed-off-by: Szymon Morek szymon.morek@intel.com
 2021-09-30 10:39:56 +02:00
Bartosz Dunajski 4ba4c32766 Remove SBA->IOH programming on XE_HP_SDV 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-09-29 12:35:43 +02:00
Zbigniew Zdanowicz 3b35ba504f Adapt command stream receiver to multiple active partitions 
Related-To: NEO-6244

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-09-23 14:32:20 +02:00
Kamil Kopryk d2a776bcc6 Remove L3 flush from postSync 
Related-To: NEO-6111
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2021-09-22 17:49:58 +02:00