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254 Commits

Author SHA1 Message Date
Maciej Dziuban 8fcd51c2c8 Do not obtain command stream if it will not be needed 
Change-Id: Id7fa1c6b78e71a085084f8fcb66a7b8e873ad2bc
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
Related-To: NEO-5120
 2020-10-08 12:24:03 +02:00
Kamil Diedrich 960860e4cb Fix reservation size 
Change-Id: I1cc3d4405b00365908c5915c9d2a1c512d572530
 2020-10-08 10:57:08 +02:00
Bartosz Dunajski 595f374634 Dont use blitter for local memory transfer if not available 
Change-Id: I5f43113498b59e3f1b8cb280c9feeccae8ff6140
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-10-07 15:55:22 +02:00
Mateusz Hoppe 5fd113dcb3 CommandContainer.reset() clears lastSentNumGrfRequired 
RelatedTo: NEO-5137

Change-Id: Icaad8224ee24f8c927b75e2efb17585a8b79918a
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-10-07 12:24:04 +02:00
Kamil Diedrich ce7e293a99 Extend scratch implementation 
Change-Id: I1bbc0c9be287b1411276b1e61a7ec1c8db238f3f
 2020-10-07 11:39:04 +02:00
Zbigniew Zdanowicz 47f5867e8f Move common code to shared directory 
Change-Id: I5f604de01e06d35cc1e045fffdd4a26d88ffca8c
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-10-07 10:55:39 +02:00
Filip Hazubski 3f9d95fe46 Add ULT for allocateGlobalsSurface 
Verify blitter usage.

Change-Id: Ib0a726479097bb662a571f904ed04a832f426752
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2020-10-06 17:25:24 +02:00
Maciej Plewka 4dc3827b8e Prepare object lib for precompiled builtins in bindless mode 
Releated-To: NEO-5138

Change-Id: I18e564a9e32041fba5e887bc18d2195a1c4ddda8
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-10-06 16:57:11 +02:00
Andrzej Swierczynski bdf8c5fc90 Extend UnifiedMemoryProperties constructor to take device bitfield 
Related-To: NEO-4722

Change-Id: Ice185f1792635922e9bb89cd7329e6501bc585e0
Signed-off-by: Andrzej Swierczynski <andrzej.swierczynski@intel.com>
 2020-10-06 16:35:08 +02:00
Zbigniew Zdanowicz 820efffdd0 Switch default CPU cache flush to disabled in direct submission 
Change-Id: I1a5e5f67d3e6af129aeb611f203c243d892321bb
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-10-06 15:19:32 +02:00
Zbigniew Zdanowicz 28ef5fa709 Move pipecontrol w/a estimation to dedicated class 
Change-Id: I8ceaa2dff94dd7148daf921568fd30f098e5dae4
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-10-06 15:02:37 +02:00
Zbigniew Zdanowicz ce1b669cda Use single class to program load register command 
Change-Id: I90fe084409588cb32f0ac43a3db5082047d7a68b
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-10-06 13:45:35 +02:00
Maciej Dziuban 138f04bdcd Enable L1 cache for Tigerlake 
Change-Id: I33513ed084f9d06ceca11315cac03f1b682db535
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
Related-To: NEO-4832
 2020-10-06 13:26:54 +02:00
Konstanty Misiak ec054a87da Fix builtin compiling with ZEBin 
Related-To: NEO-5020

Change-Id: I2698db921e8b6c61ee592a0d6611dc38173a1688
Signed-off-by: Konstanty Misiak <konstanty.misiak@intel.com>
 2020-10-06 13:04:45 +02:00
Andrzej Swierczynski c6441c776f Fix revision handling in shared tests 
Change-Id: I4a975b4b44d0b81a8e57c25f60b07473a5c4d66a
Signed-off-by: Andrzej Swierczynski <andrzej.swierczynski@intel.com>
 2020-10-06 12:10:00 +02:00
Zbigniew Zdanowicz 2717fcae54 Unify programming of atomic command 
Change-Id: I13afdb44fb83beaa8673eb6456d2a8edcb6ac047
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-10-05 13:37:52 +02:00
Jaroslaw Chodor 746cf7fd33 Reuse old build options if new ones are NULL 
Change-Id: I435e7ec8554b0429dcf4f6f8d9d4fd80e70b68c6
 2020-10-04 16:54:02 +02:00
Mateusz Hoppe cd85bcffdb Update infra 
- set revision = 9 for gen9

Change-Id: Icd8b73003eee3b1d32dbe3014c93174441e21f6a
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-10-02 18:10:23 +02:00
Andrzej Swierczynski 5f4d54c4fe Add revision specific tests and test files generation 
Related-To: NEO-4838

Change-Id: I43cdd9108046239ec2535a9010762fb767b0c1eb
Signed-off-by: Andrzej Swierczynski <andrzej.swierczynski@intel.com>
 2020-10-01 05:28:54 -07:00
Lukasz Jobczyk d1a9174204 Enable early pin on direct submission 
Resolves: NEO-5112

Change-Id: I79398dda9de3584d327e9448dd57e9a3ed37b377
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2020-10-01 10:42:13 +02:00
Maciej Plewka 52b785552b Fix memory fill using bliter 
Change-Id: Idf2463361c19f80e11a920aebf7ad1194cd3c2bb
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-09-29 16:16:30 +02:00
Maciej Plewka e34c319ed7 Special address pool at External heap begining 
Change-Id: I7da6e67010ff7a819aec25abea9213b6e43e348e
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-09-29 07:51:12 +02:00
Maciej Dziuban 83252e7306 Add isCopyOnly field 
Change-Id: Ia056af66af437c22738fd15abff12e1ad226509a
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
Related-To: NEO-5120
 2020-09-28 12:27:50 +02:00
Sebastian Luzynski d24850cff3 Alter API with additional kernel exec info. 
Related-To: NEO-4875
Change-Id: I10a5e3bfc32be520c3554c992dc36591fc1ff599
Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
 2020-09-25 13:00:24 +02:00
Bartosz Dunajski 2a69b1ed78 Select correct heap base address for ISA 
Change-Id: I400f965faa4615519729756daa78350a46c46ff2
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-09-23 14:21:22 +02:00
Michal Mrozek 76a9ccc095 Do not flush caches in ULLS submissions by default. 
Change-Id: I4a1c96c597eef8b85e4e43e90cdc4779765eb72b
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2020-09-23 09:46:08 +02:00
Zbigniew Zdanowicz 03c8bbf054 Use non-coherent buffers as kernel args in L0 
Change-Id: I78f699779d65b694fa8de82c8e19dc07f7c176c3
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-09-23 07:16:13 +02:00
Zbigniew Zdanowicz 3b6f9b7cb6 Add implicit flush for new resources and idling gpu 
Related-To: NEO-5100

Change-Id: I57fdb8eecd88124c4c9171014950554c35dbecd1
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-09-22 21:50:02 +02:00
Bartosz Dunajski 5b31b31734 Remove low priority and internal engine index variables 
Change-Id: I984dbcedd5456cfdee284f4d2eda1371ba77f0d0
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-09-21 16:44:14 +02:00
Lukasz Jobczyk b81a78d0e9 Evict USM cpu allocation after migration 
Related-To: NEO-5007

Change-Id: I3c91af3ca22cb6233d530b252cc0c75d8fc2f8b5
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2020-09-18 13:01:45 +02:00
Vinod Tipparaju d2b218d82d Return ZE_RESULT_OUT_OF_MEMORY when alloc on device fails during cmdlist create 
Change-Id: Ia03e7ac190598c56de044d3ad8216087b8da94f2
Signed-off-by: Vinod Tipparaju <vinod.tipparaju@intel.com>
 2020-09-17 00:09:22 +05:30
Lukasz Jobczyk bf0ee40b69 Fix root device direct submission initialization 
Related-To: NEO-5007

Change-Id: I4bac1a0a5e92982535f197c17d375050b484f8a2
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2020-09-16 13:49:42 +02:00
Zbigniew Zdanowicz 394e626db9 Refactor programming of surface states 
Related-To: NEO-5069

Change-Id: Id7442fcdcc8c7df57f00e8dc383c11869bf1a677
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-09-16 11:54:00 +02:00
Maciej Dziuban 97ec64d22c Optimize first access to shared allocations 
Change-Id: Ia3ce5f1e448128e7c9dfffb9ad49aaee15bdf948
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
Related-To: NEO-5059
 2020-09-15 12:59:07 +02:00
Maciej Dziuban 7c7cfb1099 Delete unneeded memory transfer for USM 
Change-Id: I7b11a132b621069febd5b851f9e29e7177d8d395
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
Related-To: NEO-5059
 2020-09-14 16:13:58 +02:00
Mateusz Hoppe ada57435b4 Remove platform() dependency from DrmMock 
Change-Id: I58a21dede469da95593e241528459761322c0730
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-09-12 18:05:14 +02:00
Kamil Diedrich 5823450343 Refactor in queryKernelTimestamps 
Change-Id: Icc0731c973fe797946eea06db29b0737ceef8778
 2020-09-09 12:56:32 +02:00
Kacper Nowak f05f835227 Move test kernel compilation to shared tests 
Change-Id: I623a94cf9f6baa29fe23b94541f578c8a9680f92
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2020-09-08 16:31:15 +02:00
Kamil Kopryk 145fd87f5d Revert "Add adjustPlatformCoreFamilyForIgc helper" 
This reverts commit 8fffdcc111.

Change-Id: I0415b004ef0a1465bc2658cadc66f21a99302eca
 2020-09-08 07:36:26 +02:00
Jaroslaw Chodor a4ba92338a zebin - strip kernel name of quotes 
Change-Id: If8054c01ea1992c0ba998e22b726b127c652beed
 2020-09-07 18:25:36 +02:00
Jaroslaw Chodor 2d4468bb3b Ignore SHT_ZEBIN_GTPIN_INFO 
Change-Id: I85c5bd52d96dce6603329bfe997a70dc5a432d3f
 2020-09-07 18:04:37 +02:00
Jaroslaw Chodor 6c0da29670 Adding support for R_PER_THREAD_PAYLOAD_OFFSET_32 
Change-Id: Iacd8d2f84b6f307b37dd09fe794357bf4fa44388
 2020-09-07 17:51:42 +02:00
Mateusz Jablonski 48c084ca32 Create platformsImpl when needed 
Change-Id: Ie89356761fc39910c765066d40cd363c93002692
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2020-09-07 16:36:40 +02:00
Mateusz Jablonski 32c0320b1b Move platforms destructor from static lib to shared library 
Change-Id: I5ae4aaf816571e2531a5049e63b1dafc35c1e999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2020-09-04 09:59:13 +02:00
Koska 354720743b Enabling MTP on Gen12LP 
Change-Id: I0ca08ea8dba3f34b5404ea598a16541d0128b37a
Signed-off-by: Koska <andrzej.koska@intel.com>
Related-To: NEO-4785
 2020-09-03 13:47:34 +02:00
Piotr Zdunowski 48e7ca6102 Opensource RKL. 
Resolves: NEO-5017

Change-Id: I29364aa331f802bd298bd08df440aa1e33dd3c4e
Signed-off-by: Piotr Zdunowski <piotr.zdunowski@intel.com>
 2020-09-02 17:06:51 +02:00
Mateusz Jablonski 40d487fa90 Add global destructor of platforms 
Change-Id: I7f0c9a9a13cae5cbf831e0d4e410c78c001a75d1
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2020-09-01 17:26:17 +02:00
Zbigniew Zdanowicz 1afc985577 Add blitter support to direct submission 
Related-To: NEO-5010

Change-Id: I084cec54a233e920b2868d2a61c60d1d87d0a91e
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-08-31 20:23:02 +02:00
Jaroslaw Chodor 36d350c8fc Zebin per_thread_memory_buffers 
Change-Id: I66074ac9f1d5b1417dfad5c044149e86ab9aad1d
 2020-08-31 15:09:49 +02:00
Maciej Plewka a779e44b52 Support for dsh and ssh on external heap in L0 
Related-To: NEO-4724

Change-Id: I85c2effea8a99bebaf9e3db33129641f37dcabe5
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-08-30 06:56:52 +02:00