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202 Commits

Author SHA1 Message Date
Mateusz Jablonski ee9eb8df83 Release all Gmms 
Change-Id: I2227b6a1014fea59053893c9d6330f1c386bbcd2
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-03-22 12:19:44 +01:00
Stefanowski, Adam 16aee8cc46 [2/n] Move Hardware Info to Execution Environment 
- remove hwInfo from the csr functions where it was passed as a parameter,
now csr functions have access to hwInfo by Execution Environment

Change-Id: I756ae63d9728c9c963571147bab97f9e1c15797b
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
 2019-03-22 10:08:26 +01:00
Liwei Wang ca4b47f7f4 Add support of GPU preemption (v1.00). 
https://github.com/intel/compute-runtime/pull/119

Change-Id: I3134d62b66751c8621b80002373a7a9b198e044e
 2019-03-22 08:49:11 +01:00
Dunajski, Bartosz 7f2bf217f1 Refactor DeviceFactory::getDevices 
Change-Id: If3b20cc8ed74bdb1c32ae17c23374b7c267933a3
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-20 15:25:36 +01:00
Mateusz Hoppe 432591a88a Adding MemoryInfo to Drm 
- call queryMemoryInfo on Drm::create()

Change-Id: Ib0532894f271bd4ab3dcbb281d0bddf2a01d4afe
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-20 15:04:43 +01:00
Piotr Fusik db9afd06cd Remove EngineInstanceT. 
Change-Id: I08543b5f4ef5e91e6beb8390d448e53702cd9dac
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-20 10:56:22 +01:00
Piotr Fusik 429487fad0 Add constructor parameter to select low priority context. 
Change-Id: Ieb3fa008a2f1b54052e393516038c88f00944fa0
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-18 15:09:59 +01:00
Zbigniew Zdanowicz cdb52400c4 Add new functions reserving address range to Memory Manager 
Change-Id: I947203c24495c9e5a206b95bb0c69440824586b6
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-03-14 15:06:11 +01:00
Dongwon Kim 8cc90014a6 realAllocationSize for keeping actual GPU allocation Size 
Change-Id: I3e00a556f25d3c147335420d887d7dcee737dbac
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
 2019-03-14 09:51:40 +01:00
Piotr Fusik 25e6494443 Use std::bitset for deviceBitfield. 
Change-Id: I9078ffbb38967b753980cb1c5ebcab00f5292598
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-14 08:36:01 +01:00
Mateusz Jablonski 395e79fee8 Add support for many GMMs in Graphics Allocation 
Change-Id: I955b8dd50b502f91700c5529d0a0a291632aa157
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-03-13 15:44:45 +01:00
Filip Hazubski 01c11fdf98 Fix typo in variable name 
Change-Id: I693e73d7fcb7c586506d3e102b77b95a0a0d3783
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-03-13 09:23:28 +01:00
Mateusz Hoppe 573d2e0eec Add enableLocalMemory param to DrmMemoryManager ctor 
- add linux dll tests for createMemoryManager()

Change-Id: I6e111e7a480d895a8520507af6b6a699f9dca160
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-12 22:22:37 +01:00
Piotr Fusik ec72787b98 Remove MemoryManager::allocateGraphicsMemoryForHostPtr. 
Change-Id: I629f2299a183fc135135dbaff89216b966554a95
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-12 15:51:32 +01:00
Venevtsev, Igor 74f1896c03 Expose GfxPartition to shared MemoryManager 
Change-Id: I039e463f90e88c0ed8e9505cc770c373420ff567
Signed-off-by: Venevtsev, Igor <igor.venevtsev@intel.com>
 2019-03-12 09:25:50 +01:00
Stefanowski, Adam 341fcfc091 [1/n] Move Hardware Info to Execution Environment 
- remove gmm_environment_fixture
- remove hwInfo parameter from ExecutionEnvironment methods

Change-Id: Ieb0f9b5b89191fbbaf7676685c77644d42d69c26
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
 2019-03-12 08:39:26 +01:00
Maciej Dziuban 79d0878e64 Wait for resource not being used in freeGraphicsMemory 
Change-Id: I201d914569fc0cf6f9eb616d456a670b0b8741ab
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-11 12:18:38 +01:00
Piotr Fusik 8e49c8f67a Improve readability of getMaxApplicationAddress. 
Change-Id: I92bba124746b4d16bf4cdae294e24c4667e03aef
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-08 13:30:22 +01:00
Jobczyk, Lukasz 878fd43a1a Reverse logic of creating Memory Manager - part 1 
-remove CSR::createMemoryManager method
-create MM from platform before creating devices

Change-Id: I0e7f091c53b0e60ae7101e82a305253af626330e
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-03-08 09:47:29 +01:00
Mrozek, Michal 06a7d8c32e Decouple Buffer Object and Exec Objects Storage. 
Change-Id: Id47c071372959d43ccf3034917f2a5c39b707b38
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-03-06 13:18:13 +01:00
Dunajski, Bartosz f24b428cf7 Improve HardwareContextController creation 
Change-Id: Iba929a2b4fcd993b38dd674be578aad0a481e8de
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-06 12:31:20 +01:00
Mrozek, Michal 28279bddd5 Decouple residency from Buffer Object. 
Change-Id: I0c3413d9c53aecd814e84d588bdea15e34b7320d
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-03-05 15:14:43 +01:00
Mateusz Hoppe 72a5c2c6c4 Fix compilation with OCL_RUNTIME_PROFILING 
Change-Id: Ib07543fb5f6048e99cdd198111ba88309da2c3e8
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-04 10:55:38 +01:00
Dunajski, Bartosz 86dabbf6d5 Improve OsContext construction 
Change-Id: Ibf9293344cc5c0ae1b2cc011e87d9e3626f3a066
 2019-03-01 08:35:38 +01:00
Piotr Fusik 426a7b6efe Pass by const reference. 
Change-Id: I68dc9d2a77da8cc7f81759c4e72d32e2e7f71a1d
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-02-28 14:12:13 +01:00
Mateusz Jablonski 6fb28dd828 Refactor GraphicsAllocation class 
move most of members to protected section
merge related members into structs

Change-Id: Ief2e092aa5e61ca6f13308f9d9b1937ea6c913b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-28 14:09:11 +01:00
Hazubski e75e5808cc Manifest update 
Change-Id: I8124a5b82a663953137dd4e71f8504b9becec92a
Signed-off-by: Hazubski <filip.hazubski@intel.com>
 2019-02-28 14:02:33 +01:00
Piotr Fusik 8febabfbd6 DrmAllocation constructor accepts allocationType. 
Change-Id: I6a6457948ada7eb59537d17b966278d114f802c6
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-02-27 16:58:22 +01:00
Mrozek, Michal fca7b4e044 Remove Drm32Bit allocator. 
- not used anymore.

Change-Id: Ibb7da1758feb67224ac0b172c72f45c2f1c229d9
 2019-02-27 14:28:16 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes 
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 11:50:07 +01:00
Mateusz Hoppe d5d177dd58 Override AllocateGraphicsMemoryInDevicePool in DrmMemoryManager 
Change-Id: I54da682ecb055e71af0968872ddb0ec7726c3adc
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-02-27 10:05:46 +01:00
Piotr Fusik d79f1afdc2 GraphicsAllocation constructor accepts allocationType and memoryPool. 
Change-Id: I5044ed26ba0cb0fc9ca7077595f5ab56353ab58c
 2019-02-26 13:29:25 +01:00
Zdunowski, Piotr 842fb5dadc [4/n] Log allocation placement. 
Change-Id: I300be5f09b6ee77aa89584a6bddf4c7e57aa54f1
 2019-02-26 10:21:42 +01:00
Piotr Fusik 378bd28bab Change the signature of MemoryManager::createGraphicsAllocation. 
Change-Id: Ia82235ff2831fd5b3436d488a5946bb49d63ce91
 2019-02-25 16:08:35 +01:00
dongwonk b44d434a89 limited GPU range is used for external 32bit allocation 
Change-Id: I494ad97fb1ddfa7b3c6b2e7cef2ae04fba571ba0
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-21 16:26:49 -08:00
dongwonk 56972935ad graphic memory allocation with alignment in limited Range heap 
Change-Id: Iccfb0fdc2f161e30bfdd26154110185277f176f5
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-21 10:10:47 -08:00
Piotr Fusik 4ec5be0c99 Simplify code by removing AllocationOrigin. 
Change-Id: Ie73cefc1ae1ee846fb9a5ef1054af01cd1867a4d
 2019-02-21 16:29:05 +01:00
Mrozek, Michal a1d4c07f45 Simplify DRM allocation constructors. 
Change-Id: I2c477ce85f4748f0637451a405f7949aa829ba81
 2019-02-21 12:06:01 +01:00
Mrozek, Michal 45a0ceecfb Clean drm interfaces. 
- all driver allocations are using SoftPin
- remove unneeded methods.
- remove unneeded members.
- remove unneeded code paths.

Change-Id: I3369c0a4d37727210b5a26271d25537ca5218bd4
 2019-02-20 16:11:19 +01:00
Piotr Fusik 75edea81bb Virtual address space partitioning on Linux [2/n] 
Move selectHeap from Wddm to MemoryManager.
Set DrmAllocation::origin.

Change-Id: I5d412e35d524d1f31174893b9ce1d3b1e98eee96
 2019-02-20 14:43:08 +01:00
dongwonk fb993d6107 limited range and internal 32bit allocators with correct base and size 
correct add 1 to the current size, gpuRange as gpuRange
only specifies the end address of the pool, not the actual
size, which causes alignment issue of all the offsets of
allocated objects. Also, a page was added in the beginning
of the limited range memory pool to avoid the base address
of it to be 0x0 that is interpreted as invalid address by
heap allocator (This makes the size reduced by pageSize)

Internal 32bit allocator is also initialized in proper way
with corrected base address.

v2: added 'givenMemoryManagerLimimedRangeAllocator' unit
    test
v3: adjust size to be freed when DrmMemoryManager instance
    is destroyed to 4GB
v4: - defined external 32bit allocator for limited Range
    allocation case.
    - softpinning object on the correct GPU address

Change-Id: Idaa0206d4133a1476cceb5a48ff8c8528742c76a
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-17 19:19:52 +01:00
dongwonk c2f5fccfd0 DrmAllocation with correct pair of cpu address and gpu address 
correct mapping of cpu and gpu address in memory allocation
in case of NonSVM. Also, used only aligned address since offset
is already calculated and written to "allocationOffset".
gpuBaseAddress is programmed with 0 instead of base address of
heap because it represents GPU's address space.

v2: add allocationOffset to the aligned address in allocation
    data to point to exact starting address of buffer in two
    NonSVM allocation unit tests

Change-Id: I32ef512de64a13459b7c132672f837c5cb210ada
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-15 19:03:26 +01:00
dongwonk 0240f239ad check if the whole object region is in 32Bit address space boundary 
checks the address + size of buffer object to determine
whether the object is located within 32bit address space
boundary.

v2: changed end year to 2019 in ther license term
v3: added unit test for checking of flag when size of
    bo is given.
v4: two different unit tests are created to cover two
    different case separately

Change-Id: Ie2df6025fc116aca679dcfe88d858ff240278c39
Signed-off-by: dongwonk <dongwon.kim@intel.com>
 2019-02-15 16:15:06 +01:00
Dunajski, Bartosz 958d931cd9 Allow to create HardwareContextController for multiple Devices 
Change-Id: Ib066c937809536196182ca87359c487570cc2e89
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-14 16:00:00 +01:00
Piotr Fusik 6882cf09c1 Avoid manual memory management. 
Change-Id: Id29d9ec366e338d519aad5353a15a44ecf5998e4
 2019-02-12 09:14:51 +01:00
Dunajski, Bartosz 12da1b0616 Remove osContextCount parameter from GraphicsAllocation 
Change-Id: I23b650e97f107008b1122a1ecea48722fe129863
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:44:37 +01:00
Hoppe, Mateusz 4d9acf3352 Pass aubfile name to TbxCommandStreamReceiver::create and CSRWithAubDump 
Change-Id: Ib10c017ce4ed2a572815053dae3f517e0dfd9eb3
 2019-02-07 15:05:54 +01:00
Mateusz Jablonski f157943610 Allocate internal allocations through preferred pool 
Change-Id: Ib17431ceefc1eb72f86625e0998f679baaa7cb0d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-30 11:18:15 +01:00
Hoppe, Mateusz d7ce6ef8d1 Allocate images through preferred pool call 
Change-Id: I79c9c1a0a95a8a3e26ed690530b71ef504cc7ff8
 2019-01-25 09:05:25 +01:00
Mateusz Jablonski f332bf369e Set allocation's lock state only in lockResource and unlockResource methods 
Change-Id: I60f35801287166f5bdb0dfcd31ff0118c56ec22a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-24 15:15:27 +01:00