Commit Graph

15 Commits

Author SHA1 Message Date
Michal Mrozek 0e29ab8387 performance: add debug key to control cpu cacheablitiy
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2024-06-19 12:34:06 +02:00
Lukasz Jobczyk 9a2fa1dcb1 fix: Override prefer no cpu access for dc flush mitigation
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-06-05 10:26:45 +02:00
Katarzyna Cencelewska eec01e500a fix: non-coherency issue on arl
Resolves: HSD-15015200338
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-01-26 10:26:33 +01:00
Mateusz Jablonski c9664e6bad refactor: rename global debug manager to debugManager
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-11-30 13:00:59 +01:00
Dominik Dabek 8f06f3f50a performance: add override cacheable to gmm
add attribute to override cacheable attribute to gmm constructor

enable this override for command buffers on mtl

change command buffers back to allocation by kmd

this keeps the quicker allocation which is needed to keep enqueue times
low

Related-To: NEO-8152

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-11-16 10:00:45 +01:00
Dominik Dabek 961a8d91d0 refactor: move gmm constructor flags to struct
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-11-15 09:26:13 +01:00
Mateusz Jablonski 3eb98163a8 fix: define isCachingOnCpuAvailable per hw release
Related-To: NEO-8187
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-09-13 11:13:42 +02:00
Mateusz Jablonski f94ed7cd28 refactor: pass root device environment to CacheSettingsHelper::preferNoCpuAccess
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-09-13 09:32:36 +02:00
Filip Hazubski 8dd23f4b4d feature: Add logic around cpu side allocations
Group allocation types related to cpu side allocations in function to
query gmm usage type. These types will have caching enabled even if
CPU caching is not preferred by GPU.

Add logic to query whether the cpu access is allowed for an allocation
(in cases when it is not preffered by GPU).

Related-To: NEO-7194

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-07-28 21:04:24 +02:00
Cencelewska, Katarzyna d2436a8231 fix: add limitations for setting gmm flag Cacheable
- move isCachingOnCpuAvailable to product helper
- isCachingOnCpuAvailable should return false on mtl
- if wsl, skip checking method from product helper

Related-To: NEO-7194
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-05-30 17:04:57 +02:00
Cencelewska, Katarzyna 5f22e9eaca fix: don't set Cacheable on xe_hp and later
Related-To: NEO-7194
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-05-18 09:17:32 +02:00
Katarzyna Cencelewska 004a3d875c fix: Remove default setting of gmm flag Cacheable to true
- add debug flag EnableCpuCacheForResources to be able to allow coherency when
resources could be cacheable

Resolves: NEO-7194

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2023-05-16 09:17:29 +02:00
Mateusz Jablonski 5ffeac44c5 Correct shared fixture methods name to meet clang-tidy requirements
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-16 12:52:49 +02:00
Mateusz Jablonski e6fc458d4b Add a struct for test fixtures with correct method naming convention
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-08-11 12:55:52 +02:00
Katarzyna Cencelewska 0d42fdf38c Fix setting flag Cacheable in gmm resource params base on resource usage
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-06-30 19:37:21 +02:00