808ff8c2e4
refactor: remove unused EncodeDispatchKernelArgs field
...
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-06-01 10:42:22 +02:00
feff1c35cc
feature: Experimental support of immediate cmd list in-order execution [5/n]
...
Related-To: LOCI-4332
- Signal non-timestamp Walkers with in-order CL value
- Event host synchronization based on CL signal value
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-05-09 11:46:14 +02:00
c1f71ea7f7
feature: new conditional bb_start mode + aub tests
...
Related-To: LOCI-4332
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-05-05 14:40:17 +02:00
c84c7a0c91
performance: adjust thread group dispatch size
...
adjust thread group dispatch size on pvc if chosen size does not evenly
divide dimension
this is to avoid leftover thread groups
Related-To: NEO-7927
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-04-27 18:24:53 +02:00
4c7bc2ca98
[feature, perf] add alogrithm to chain command buffers in container
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This feature is part of performance improvement to dispatch and start
command buffers as primary batch buffers.
When exhausted command buffer is closed, then reserve exact space for chained
batch buffer start and bind it to the next command buffer.
When closing command buffer, then save ending pointer and
reserve aligned space.
Related-To: NEO-7807
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-04-05 15:49:01 +02:00
3ff7a63145
Reduce number of jumps in RelaxedOrdering scheduler
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Related-To: NEO-7458
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-04-04 09:07:59 +02:00
bc4e540c33
[fix] unify heaps size programing
...
- share same code between csr and cmd container to get default heap size
- share handling of debug flag to change heap size
- share platform level surface heap size between csr and command list
- refactor heap size files
- put heap size constant and function into namespace
- command list surface heap size increased to 2MB for xehp+ to match csr
- command list increased surface heap size only for sba tracking
- sba tracking heap consumption increased due to different reset policy
Related-To: NEO-5055
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-17 08:34:06 +01:00
398c7b2d29
refactor, remove typo in struct name
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change name of EncodeSempahore to EncodeSemaphore
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-10 15:44:25 +01:00
c274309d7b
wa: add dummy blits before command MI_FLUSH_DW
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to guarantee that all subblt got complete for previous copy
affect xe hpg
temporary changes under flag ForceDummyBlitWa
Related-To: NEO-7450
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-09 10:40:35 +01:00
3e116ea378
refactor: use same paths when add command mi_semaphore_wait
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Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-07 10:35:26 +01:00
50da32ffb1
wa: add dummy blits before command MI_ARB_CHECK
...
to guarantee that all subblt got complete for previous copy
affect xe hpg
Related-To: NEO-7450
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-07 10:21:05 +01:00
34064811d2
Refactor state base address programing 4/n
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- This change gets level one cache policy from cached values instead
of calling virtual methods
Related-To: NEO-5055
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-27 17:30:36 +01:00
3cb064fe95
Refactor state base address programing 3/n
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This is small optimization to replace virtual call and retrieved struct with
cached value.
Related-To: NEO-5055
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-23 13:08:32 +01:00
43a49c4486
Refactor state base address programing 2/n
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This change allows to read sba data directly from sba properties
Related-To: NEO-5055
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-23 12:20:25 +01:00
bf2072c3ea
Add cross regular and intermediate command lists base address state transitions
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- updates coming from regular list are updated in csr last sent variables
- all per context and per kernel transitions kept in single place
- state updates from intermediate to regular are set in csr properties
- global atomics support duplicates removed
Related-To: NEO-5055
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-17 16:49:47 +01:00
7e0401d280
Add improvements to heap estimation in level zero command lists
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- add estimation parameter for interface descriptor data count
- add to the heap estimation alignment parameter for dynamic and surface heaps
- extend encode interface and implementations to allow child heaps
Related-To: NEO-5055
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-03 20:26:27 +01:00
5097ef4825
Change dispatch kernel interface to provide already prepared heap objects
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Related-To: NEO-5055
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-02 14:08:43 +01:00
9080b0c109
Delete redundant adjustNumberOfThreadsInThreadGroup method
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Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-01-30 17:10:01 +01:00
004d3e3416
refactor: don't use global ProductHelper getter 18
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Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-30 08:15:39 +01:00
026d50c7b9
refactor: don't use global ProductHelper getter 13/n
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Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-27 13:52:36 +01:00
b7380237c2
Add adjustNumberOfThreadsInThreadGroup method to EncodeDispatchKernel
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Related-To: NEO-7357
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-01-26 15:25:01 +01:00
27393c76ea
refactor: don't use global ProductHelper getter 11/n
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Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-26 08:16:52 +01:00
e21cf516d3
Cleanup includes 44
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Cleaned up files:
level_zero/tools/source/sysman/windows/os_sysman_imp.h
opencl/source/command_queue/command_queue.h
shared/source/command_container/cmdcontainer.h
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-01-25 16:05:22 +01:00
1758f55fe3
refactor: don't use global ProductHelper getter 7/n
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Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-23 16:37:47 +01:00
49837b7bb5
Cleanup includes 39
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Cleaned up files:
shared/source/command_container/command_encoder.h
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2023-01-23 11:56:42 +01:00
f2bbb56d29
refactor: don't use global GfxCoreHelper getter 2/n
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Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-10 13:07:03 +01:00
f654481def
refactor: don't use global ProductHelper getter
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Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-01-09 12:56:51 +01:00
9f3fc6858e
Cleanup includes 16
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Cleaned up files:
shared/source/built_ins/built_ins.h
shared/source/command_container/command_encoder.h
shared/source/helpers/hw_helper.h
shared/source/memory_manager/allocation_properties.h
shared/source/xe_hpc_core/hw_cmds.h
shared/test/common/test_macros/test_excludes.h
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-12-29 15:12:37 +01:00
bcecd069b4
Add additional kernel flag + capability to pull extra patch tokens
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-12-13 09:04:39 +01:00
d2c218efe3
Add a patch to command encoder for samplers when DSH is dirty.
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Signed-off-by: Tratnack, Geoffrey geoffrey.tratnack@intel.com
Related-To: LOCI-3365
2022-12-09 11:08:23 +01:00
818db03a68
LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command encoder
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Add a patch to command encoder when DSH is dirty.
Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-12-08 17:07:53 +01:00
4bd5765a06
L0 Debug - Fix imm cmdlist mode on windows
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Single Address Space SBA programming was using incorrect BB
level and not loading GPR15
Related-to: NEO-7517
Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
2022-11-25 20:37:14 +01:00
4aa1697e3c
Move hwInfoConfig ownership to RootDeviceEnvironment 2/n
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Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Use RootDeviceEnvironment getHelper<ProductHelper> for
- adjustSamplerState
- adjustPlatformForProductFamily.
2022-11-14 13:04:31 +01:00
77b6918f30
Revert "LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command enco...
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This reverts commit cb3f7234f0
2022-11-12 16:05:11 +01:00
cb3f7234f0
LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command encoder
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Add a patch to command encoder for samplers when DSH is dirty.
Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-11-10 23:28:58 +01:00
002184586c
Add command buffer helpers: Conditional BB_START and GPR Inc/Dec
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-10 18:56:24 +01:00
918d7b1da4
Helper for MI_SET_PREDICATE programming
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-08 14:20:01 +01:00
ddbaa5e8c9
Revert "Cleanup MediaInterfaceDescriptorLoad logic in command encoder"
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This reverts commit 349af0bd5e
2022-11-07 02:20:27 +01:00
349af0bd5e
Cleanup MediaInterfaceDescriptorLoad logic in command encoder
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Add a patch to command encoder for samplers when DSH is dirty.
Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-11-06 03:27:23 +01:00
6cf8b4daca
Correct tg dispatch size heuristic
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Multiply available thread count by tile count
if implicit scaling is used
Related-To: NEO-6989
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-10-27 17:24:53 +02:00
87822f94e2
Replace virtual method call for DC flush with stored bool value 2/n
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-10-12 09:43:01 +02:00
1b9c510614
Update to command_encoder, fix bug changing dynamic state memory
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Adding ULT for encode and command container changes
Refactor getHeapSpaceAllowGrow and getHeapWithRequiredSizeAndAlignment
Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
2022-10-11 03:40:25 +02:00
3d92186362
Add heap sharing to immediate command lists
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This change is intended to be used in immediate command lists that are
using flush task functionality.
With this change all immediate command list using the same csr will consume
shared allocations for dsh and ssh heaps. This will decrease number of SBA
commands dispatched when multiple command lists coexists and dispatch kernels.
With this change new SBA command should be dispatched only when current heap
allocation is exhausted.
Functionality is currently disabled and available under debug key.
Functionality will be enabled by default for all immediate command lists
with flush task functionality enabled.
Related-To: NEO-7142
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-10-03 18:50:10 +02:00
0d0d6a300e
Debugger: simplify captureStateBaseAddress()
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So far captureStateBaseAddress() was a wrapper around
programSbaTrackingCommands(), doing an additional checking before
calling the latter. The checking is apparently no longer relevant, so
unify the distinction and remove part of the code which is no longer
needed.
In practice, keep the captureStateBaseAddress() while moving the body of
programSbaTrackingCommands() into it. This imposes lower diff-impact
onto the class hierarchy. Remove the second function. Simplify the
caller which had to distinct these two functions previously.
Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-09-13 17:08:31 +02:00
410fd7d909
Correct binding table prefetch
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6075
Binding table entry count was zeroed even when
ForceBtpPrefetchMode debug flag was enabled
2022-09-13 14:34:30 +02:00
e1b80ba1a8
Cleanup: updateStreamProperties(), SBA tracking
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Fixes found out while working on the StateBaseAddress adaptation to
StreamProperties. Removing unused parameters, improving code reuse
(further improvements come with following commits).
Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-09-12 17:56:28 +02:00
f7332fc30b
Change order of EncodeDispatchKernelArgs members
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Order members by their size
Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com>
2022-09-06 16:49:48 +02:00
a4b9b3b837
Extend encode class for start and end hw commands
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Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-02 16:29:36 +02:00
8cc0177f1c
Change DG2 l1 cache policy to WB
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With compiler LSC WAs this gives better performance.
If debugger is active, policy will not be changed ie.
will be WBP.
Related-To: NEO-7003
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-31 14:31:23 +02:00
2621460e80
Revert "Change DG2 l1 cache policy to WB"
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This reverts commit a820e73dd7
2022-08-27 08:04:19 +02:00
54042a191e
Implement PauseOnEnqueue for L0
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Allow pausing execution before and after enqueuing kernel
using the PauseOnEnqueue and PauseOnGpuMode debug flags.
Related-To: NEO-6570
Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com>
2022-08-26 14:48:58 +02:00
a820e73dd7
Change DG2 l1 cache policy to WB
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With compiler LSC WAs this gives better performance.
If debugger is active, policy will not be changed ie.
will be WBP.
Related-To: NEO-7003
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-26 12:58:45 +02:00
acac5ea0d5
Use correct engine group type when programming state base address
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Command lists and their helper classes should use engine group type
assigned to the particular command list to check if it is RCS group
and not use default CSR class assigned to the device, since default
and current in command list might be different.
Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-17 20:38:23 +02:00
ed0c36117e
Apply heuristics when setting TG dispatch size on XE_HPC_CORE
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The default TG dispatch size can be changed
to a better value based on number of threads in TG or
currently available amount of threads on GPU.
Decision on what TG dispatch size should be are based on
implemented heuristics.
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6989
2022-08-08 16:43:10 +02:00
98d776867f
Add initial support for KernelArgsBuffer allocation
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-08-03 20:28:21 +02:00
c200c6e2dd
Pass LSH to EncodeDispatchKernel
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-07-26 15:37:28 +02:00
d4d54f5093
Cleanup includes
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-07-25 09:58:38 +02:00
f4879f064f
Allocate per-tile RTDispatchGlobals, handle ray tracing patch tokens.
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Related-to: NEO-6711
Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
2022-07-22 06:29:29 +02:00
2c853adac3
Use LogicalStateHelper to program ComputeMode
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-27 15:25:55 +02:00
5bce1eceb1
Remove self cleanup section when using immediate command list
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-06-27 13:29:52 +02:00
61b2ee45cd
Use LogicalStateHelper to encode SystemMemoryFence
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-24 13:29:58 +02:00
615fd4c37a
Add programming of Dispatch Walk Order in COMPUTE_WALKER for xe_hpg
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- update xe_hpg generated commands
- add method isAdjustWalkOrderAvailable
Related-To: NEO-7065
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-06-17 10:42:15 +02:00
f5b1a0e45b
Use internal event object in command lists methods
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-06-14 21:23:43 +02:00
8de043b71f
Stop redundant SBA programming due to global atomics
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For all platforms different than XE_HP_SDV (ATS) stop considering the
`useGlobalAtomics` flag as a decisive factor for trigerring the SBA
(StateBaseAddress) programming on the HW. Only XE_HP_SDV supports such
flag.
For consistency of the implementation, keep the related logic in one
place only, that is a helper in `command_encoder` and then just reuse it
in different places (`command_stream_receiver`).
Related-To: NEO-6953
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-06-08 10:39:56 +02:00
afceaa6e19
Use system fence only when using system allocations or system scope event
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Related-To: NEO-6959
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-05-31 12:55:30 +02:00
b2021498e2
Create method adjustWalkOrder
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Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-05-27 16:05:31 +02:00
8431234845
Change interface to method programing additional fields of command
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Related-To: NEO-6959
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-05-26 21:32:59 +02:00
96e1eb7467
Move variables baseDieRev and baseDieA0Masked from xe_hpc to pvc
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Pvc specific variables should be located in pvc struct
Related-To: NEO-6738
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-05-17 12:19:16 +02:00
7eafb1e877
remove unused code
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-05-16 18:15:03 +02:00
3900c9d24a
Report to StreamProperties whether large grf should be programmed with SCM
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Add helper method to UnitTestHelper to query programmed grf values.
Related-To: NEO-6659
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-04-27 13:20:14 +02:00
944319b3d9
Correct media compression format for blitter operations on planar images
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Set most significant bit for chroma planes.
Move common logic to helper function.
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-04-22 17:02:16 +02:00
5911515ed0
Refactor debugger code
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- helper sets all SbaAddresses for debugger in
EncodeStateBaseAddress<GfxFamily>::setSbaAddressesForDebugger()
- change DebuggerL0::captureStateBaseAddress() to take
LinearStream
- move getSbaTrackingCommandsSize() to Debugger class
Related-To: NEO-6845
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-04-21 13:04:34 +02:00
db9c0d1103
Refactor and enable MI_MEM_FENCE programming for DirectSubmission dispatch
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-04-07 12:53:56 +02:00
f4407064a4
Refactor store register mem encoder to include partition parameter
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Related-To: NEO-6811
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-04-06 14:00:56 +02:00
beff0019d1
SBA tracking for single address space
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Related-To: NEO-6539
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-04-01 15:24:11 +02:00
3123ab5bf9
Correct media compression format for planar images
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Set most significant bit for chroma planes.
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-03-26 21:54:08 +01:00
e11eb46bff
Unify logic for programming mocs in post sync struct
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-03-25 17:01:51 +01:00
ebc006ad53
Move SBA related WAs logic from CSR to EncodeWA
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Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2022-03-24 12:24:56 +01:00
3eab7009ac
Move SCM related WAs logic from CSR to EncodeComputeMode
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This will help with unifying the logic between APIs and GENs.
Related-To: NEO-6728
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-03-11 14:00:53 +01:00
e24322f266
Debug flag to control MI_ARB_CHECK prefetcher
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-03-10 12:50:05 +01:00
b697d75695
Correct dimension order in local ids generated for implicit args
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when local ids are generated by HW, use same dim order for runtime generation
move common logic to separated file
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-02-04 12:46:59 +01:00
dd63f1d2f9
Add new function append3dStateBtd
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Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-02-03 14:42:10 +01:00
9d8ce7aace
Command container appends BB_END on cmd buffer allocation end
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When linear stream created for command container has not enough space
for command and BB_END it will program BB_END and allocate new command
buffer allocation. Pointer returned from getSpace in this case will
return storage from new command buffer allocation.
Related-To: NEO-5707
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-01-31 16:15:37 +01:00
f8c104feaa
Use fw declaration of IndirectHeap in CommandContainer
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Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-01-26 13:30:26 +01:00
5e238dc7f1
Unify surface state programming logic related to implicit scaling
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OCL image surface state programming for Xe Hp core is now reusing logic
of EncodeSurfaceState helper
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-25 09:02:28 +01:00
fbc0666d1b
Move setGrfInfo from HardwareCommandsHelper to EncodeDispatchKernel
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unify grf info programming across APIs
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-20 15:42:06 +01:00
b78bb26cbf
Refactor partitioning of state base address
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Related-To: NEO-6589
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-14 19:06:24 +01:00
9c4f05387b
Refactor partitioning of dispatched kernels
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Related-To: NEO-6589
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-13 22:54:07 +01:00
9785ab7828
Refactor encode dispatch kernel class interface
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Related-To: NEO-6589
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-13 12:08:38 +01:00
9a450d1b74
Pass hwInfo to appendMiFlushDw
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-12-22 15:22:47 +01:00
1107fdfe55
Rename function and remove unused parameter
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-12-08 22:47:40 +01:00
d5f3ac37bf
Add KernelExecutionType argument to encodeAdditionalWalkerFields method
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Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2021-12-08 12:00:42 +01:00
47dbe359bf
Add command encoder for store data command
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Related-To: NEO-6262
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-12-02 20:56:07 +01:00
76b8f6296f
Move noop programming to dedicated encoder
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-11-18 10:28:56 +01:00
9d56939980
Refactor creation of buffer surface state 1/n
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-10-21 13:11:31 +02:00
5d2d81b2d1
Use uint64_t instead of void * in indirect dispatch programming
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-10-06 18:37:36 +02:00
92bf4b978a
Implement implicit args for indirect dispatch
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Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-10-06 16:10:41 +02:00
ae340ff6f5
Add L0 aub tests for indirect dispatch
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Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-10-05 21:05:40 +02:00
b891ec2588
Correct cross thread data GPU address in indirect dispatch programming
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Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-10-04 14:59:41 +02:00
4ba4c32766
Remove SBA->IOH programming on XE_HP_SDV
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2021-09-29 12:35:43 +02:00
a924b6a304
Code cleanup - avoid copy 5/n
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2021-09-08 08:59:55 +02:00
55723d0b18
Remove redundant functions
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Remove EncodeStates::adjustStateComputeMode function.
Unify CommandStreamReceiverHw::programComputeMode functions.
Related-To: NEO-5995
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-09-07 16:13:50 +02:00
6b299a3ab0
Make partitioned post sync operations for partitioned workloads
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-09-03 20:20:29 +02:00
856dee2b08
Improve Sampler programming
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2021-08-25 19:47:30 +02:00
29c64c3dd0
Disable implicit scaling for cooperative kernels
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When implicit scaling is disabled use useSingleSubdeviceValue = true.
Resolves: NEO-5757
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-08-18 14:56:37 +02:00
1a7c9e63fa
Add method to set force non coherent
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Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2021-07-23 11:18:04 +02:00
c389db6f1c
Add space calculation for SBA instruction
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Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
2021-07-13 12:19:30 +02:00
d7a2a62ded
Add additional StateBaseAddress cmd wa
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Resolves: NEO-5982
Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
2021-07-06 11:53:47 +02:00
62f89b174a
Add work_dim patching to l0 kernel
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Related-To: NEO-5931
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2021-07-05 20:09:20 +02:00
2acc0fb3f6
Add memory backed buffer allocation for L0 ray tracing.
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This allocates the buffer on a per-device basis and enables ray
tracing on devices that support it when given a kernel with ray
tracing calls.
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2021-07-02 11:56:18 +02:00
72d124e275
add function to append params for image from buffer
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-06-24 13:33:43 +02:00
99c0f02e12
Update StateComputeModeProperties
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-06-18 12:25:16 +02:00
0e5ca243e2
Add notify enable parameter to post sync commands
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Related-To: NEO-5845
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-06-17 19:22:51 +02:00
a481c28e55
Program GPU atomics on stateless kernels for L0
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Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-06-17 18:57:35 +02:00
4fa5041f27
Add inline directive to smallest functions
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-06-10 09:27:07 +02:00
689ceacfe6
Fix set allocation adress in SS when offset is patched
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Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2021-06-08 13:05:38 +02:00
573d01f085
Update StreamProperties
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Update ThreadArbitrationPolicy enum.
Remove adjustThreadArbitionPolicy from CommandStreamReceiverHw.
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-06-08 10:05:05 +02:00
8f91fcdd73
Add new atomic operation
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Related-To: NEO-5244
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-06-04 09:00:11 +02:00
1281e858df
Disable compression flags when image is not compressed
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-05-27 12:05:52 +02:00
d693d24f27
Add StateComputeModeProperties to StreamProperties
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Related-To: NEO-4940, NEO-4574
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-05-21 16:39:39 +02:00
53104e0830
Add a parameter to the encode function
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Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2021-04-22 12:07:16 +02:00
e5eba8be53
Add setters and getters for coherency type in render surface state
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Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2021-04-13 16:12:46 +02:00
bd32518d31
Add extra parameters to EncodeComputeMode::adjustComputeMode() method
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Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2021-03-31 16:51:55 +02:00
8215395401
Simplify Context method
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return if context has multiple sub devices related to a given root device
Related-To: NEO-3691
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-03-30 10:22:15 +02:00
e36941b171
Change argument type in EncodeMemoryPrefetch class
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-03-25 18:27:07 +01:00
f9197d4e0d
Improve memoryPrefetch method
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2021-03-24 15:12:05 +01:00
c97fe4c660
Minor cleanup: rename parameter argument
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Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2021-03-23 00:54:19 +01:00
9ac7f1d370
Adding a parameter to a encode function
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Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2021-03-19 17:54:46 +01:00
d6dde3df33
Add internal argument to encode method
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Related-To: NEO-5244
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-03-19 09:37:05 +01:00
1350aa52fb
Pass DispatchInfo to estimation functions
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Related-To: NEO-5546
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2021-03-05 12:47:55 +01:00
13fe8ed7f1
Revert "Correct POST_SYNC for L0 Events"
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This reverts commit 04d1a3255357a7778a530f054700e211d94f3b6d.
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2021-02-24 10:16:22 +01:00
64d772d366
Fix for adding MI_SEMAPHORE_WAIT & reset L0 Event
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Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2021-02-18 18:33:21 +01:00
c35f560971
Refactor internal interface
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Related-To: NEO-5244
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-02-15 13:24:00 +01:00
3df6110a17
Add extra parameters to setArgStateful()
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Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2021-02-05 12:24:27 +01:00
580fdd757c
Improve buffer surface state programming
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2021-02-02 14:42:18 +01:00
c2e333fe38
Update compression encoding interface + test traits
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2021-01-29 13:57:15 +01:00
b57c1b9650
Improve Image surface state encoding for compression
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2021-01-28 16:39:42 +01:00
444b9594af
Expand adjustPipelineSelect parameters
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Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-01-07 18:01:07 +01:00
e09ac446c4
Mask bit 0 of timestamp for event profiling
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Related-to: LOCI-1161
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
2020-12-31 23:51:12 +01:00
37cd49330c
Implement ZE_CACHE_CONFIG_FLAG_LARGE_DATA for zeKernelSetCacheConfig
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Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2020-12-16 07:00:13 +01:00
da779d067f
Support the AND operation in EncodeMathMMIO
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Related-to: LOCI-1161
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
2020-12-03 01:56:22 +01:00
7a5c9d39b5
Encode dispatch kernel with global bindless heaps
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Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2020-12-02 17:30:15 +01:00
be90b9ff93
Add support for ZE_DEVICE_MEM_ALLOC_FLAG_BIAS_UNCACHED
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Add support for device and shared allocations that use the
ZE_DEVICE_MEM_ALLOC_FLAG_BIAS_UNCACHED flag, whether the
kernel using the memory is stateless or statefull.
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-12-02 10:43:45 +01:00
93ba4e646b
Improve EncodeDispatchKernel
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2020-11-27 16:39:34 +01:00
8a703c082e
Add encodeExtraCacheSettings method
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2020-11-25 12:27:20 +01:00
ae3ad3e8bc
Add method to adjust TimestampPacket
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2020-11-24 17:35:22 +01:00
39e6548ef6
Add mi_arb_check between blit commands
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2020-11-17 13:07:50 +01:00
65690ccb21
Fix indirect dispatch programming
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Related-To: NEO-5195
Change-Id: I82975abaa6323d27d3718ce1619748f7d83b55b4
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2020-10-28 01:06:08 +01:00
7f8b0c5b3f
Global l3 invaldate for blitter engine
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Related-To: NEO-5175
Change-Id: I88b3c9333398c91a7dd799f5e52cfd9182316960
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
2020-10-19 16:40:03 +02:00
976dad2e17
Updated BaseSurfaceStateAddressAlignment to PageSize to handle Block R/W in L0
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- Block R/W in kernels requires a minimum of 16B alignment/OWORD
alignment to properly work without data corruption.
- Level Zero currently writes Base Surface State addresses alignment to
4B vs OpenCL writes Base Surface State addresses aligned to PageSize for
4KB.
- Added a function in encode buffer to verify that at a minimum the size
being encoded has the minumum alignment of 4B which is supported, but
will not support Block R/W
Change-Id: I6486c2cbbb0008834c779bf54918388d79c193bb
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
2020-10-12 19:14:25 +02:00
Dunajski, Bartosz