Commit Graph

47 Commits

Author SHA1 Message Date
Jaime Arteaga 1e9e877394 Style: Add 0x prefix to PrintUmdSharedMigration logs
This to align with format used on another tools, like onetrace.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2023-01-03 03:37:10 +01:00
Mateusz Jablonski e3ede4bb92 Correct naming in memadvise flags
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-12-07 14:49:43 +01:00
Lukasz Jobczyk 8927399cce Set proper gpu domain transfer handler for CAL
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-11-17 11:53:02 +01:00
Jaime Arteaga db58e50564 Improve PrintUmdSharedMigration
Add size and timing data.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-07-18 19:47:13 +02:00
Mateusz Hoppe 5956aea18d Limit header includes from level_zero device.h
- remove including debugger_l0.h from device.h
- add getL0Debugger() to shared NEO Device

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-07-06 16:41:17 +02:00
Jaime Arteaga 803d7cdd8a Add debug key to print UMD shared migrations
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-07-22 08:37:09 +02:00
Jaime Arteaga 2588997e32 Remove memory.cpp from L0 core source
It was only hosting two methods, which are better in
driver_handl_imp.cpp

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-07-21 16:45:53 +02:00
Spruit, Neil R 771722f3d7 L0 Support for hints to disable CPU Migration of USM memory
- Added support for disabling CPU migration of USM memory given
ZE_MEMORY_ADVICE_SET_READ_MOSTLY && ZE_MEMORY_ADVICE_SET_PREFERRED_LOCATION

Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
2021-07-20 04:34:16 +02:00
Bartosz Dunajski 3c88492229 Revert "Extended import device memory"
This reverts commit ea6555e788c98314160a11898212c2d664999705.

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2021-07-16 09:56:52 +02:00
Kamil Diedrich d5fdb949eb Extended import device memory
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2021-07-07 16:12:36 +02:00
Jaime Arteaga aa51c5ee76 Add support for ZE_IPC_MEMORY_FLAG_BIAS_UNCACHED
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-07-02 17:56:18 +02:00
Jaime Arteaga 5e29dccddc Add IPC events support
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-06-08 08:11:15 +02:00
lgotszal 3bd4bca911 Copyright header update
Dates corrected in copyright headers to reflect original publication date
(2018 for OpenCL, 2020 for Level Zero).

Signed-off-by: lgotszal <lukasz.gotszald@intel.com>
2021-05-17 20:38:19 +02:00
Compute-Runtime-Validation dd6653892e Revert "Move SVM allocs memory manager to L0::Context (1/N)"
This reverts commit 9080e2ee5b.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2021-05-09 12:37:44 +02:00
Jaime Arteaga 9080e2ee5b Move SVM allocs memory manager to L0::Context (1/N)
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-05-07 22:17:10 +02:00
Jaime Arteaga 5f0e4f8e2a Revert "Move memory managers to L0::Context (1/N)"
This reverts commit 9ce887b8b53a787a7e0a0d808c96e295655ae57b.


Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-05-06 04:56:09 +02:00
Jaime Arteaga 1f1fbb193b Move memory managers to L0::Context (1/N)
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-05-05 23:01:42 +02:00
Jaime Arteaga ef5174f3fc Eliminate wrappers in L0::Context class for driverHandle calls
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-04-20 23:50:23 +02:00
Jaime Arteaga 128cd8a31c Add support for non-IPC P2P access to L0
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-04-20 01:05:40 +02:00
Jaime Arteaga ebb1474210 Isolate shared allocations with respect to context
Related-To: LOCI-1996

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-04-17 03:38:46 +02:00
Jaime Arteaga da7aef49e6 Isolate device allocations with respect to context
Related-To: LOCI-1996

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-04-09 17:47:47 +02:00
Jaime Arteaga ddca333045 Improve support for L0 uncached device allocations
Make sure UNCACHED flags are translated into setting the MOCS index
for uncaching L3.

Related-To: NEO-5500

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-04-08 13:00:03 +02:00
Jaime Arteaga 0561ec183d Add ULT for changeMemoryOperationStatusToL0ResultType
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-03-31 17:26:43 +02:00
Jaime Arteaga c7e65a90d8 Free IPC memory on closeIpcMemHandle() call
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-03-27 11:25:57 +01:00
Jaime Arteaga 0dc73ad686 Isolate host allocations with respect to context
Related-To: LOCI-1996

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-03-25 06:15:59 +01:00
Compute-Runtime-Validation 46a971de81 Revert "Free IPC memory on closeIpcMemHandle() call"
This reverts commit cda914f7d0.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2021-03-24 06:58:47 +01:00
Jaime Arteaga cda914f7d0 Free IPC memory on closeIpcMemHandle() call
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-03-23 19:09:12 +01:00
Jaime Arteaga 6a81edfbe1 Add support for ZE_RELAXED_ALLOCATION_LIMITS_EXP_FLAG_MAX_SIZE
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-03-15 16:20:10 +01:00
Jaime Arteaga 71940061b8 Make sure IPC handles are correctly copied
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-03-13 18:22:56 +01:00
Mateusz Jablonski 1b7d7afc07 Refactor USM properties
store reference to std of root device indices and device bitfields
store NEO::Device in USM properties

Related-To: NEO-3691
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2020-12-30 11:36:56 +01:00
Jaime Arteaga be90b9ff93 Add support for ZE_DEVICE_MEM_ALLOC_FLAG_BIAS_UNCACHED
Add support for device and shared allocations that use the
ZE_DEVICE_MEM_ALLOC_FLAG_BIAS_UNCACHED flag, whether the
kernel using the memory is stateless or statefull.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-12-02 10:43:45 +01:00
Jaime Arteaga 4432547ff5 Add support for importing memory handles through zeMemAllocDevice
Add support for passing ze_external_memory_import_fd_t extended
structure to zeMemAllocDevice() to allocate a device memory
out of an fd handle.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-11-23 04:18:03 +01:00
Jaime Arteaga 12598a82e5 Add support for external memory descriptors in device allocations
Add support for reading ze_external_memory_export_desc_t passed
to calls to zeMemAllocDevice. Current driver implementation
only supports handles as dma-buf, so add validation that only
that flag is being used.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-11-16 23:54:48 +01:00
Jaime Arteaga 3f6d1f5ee9 Correctly pass descriptors to L0 shared alloc function
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-11-11 07:04:54 +01:00
Jaime Arteaga 9473abc86a Correctly pass descriptors to L0 device and host alloc functions
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-11-10 21:31:07 +01:00
Andrzej Swierczynski bdf8c5fc90 Extend UnifiedMemoryProperties constructor to take device bitfield
Related-To: NEO-4722

Change-Id: Ice185f1792635922e9bb89cd7329e6501bc585e0
Signed-off-by: Andrzej Swierczynski <andrzej.swierczynski@intel.com>
2020-10-06 16:35:08 +02:00
Lukasz Jobczyk b81a78d0e9 Evict USM cpu allocation after migration
Related-To: NEO-5007

Change-Id: I3c91af3ca22cb6233d530b252cc0c75d8fc2f8b5
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2020-09-18 13:01:45 +02:00
Jaime Arteaga 902fc2f6c4 level-zero v1.0 (2/N)
Change-Id: I1419231a721fab210e166d26a264cae04d661dcd
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: macabral <matias.a.cabral@intel.com>
Signed-off-by: davidoli <david.olien@intel.com>
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@intel.com>
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
Signed-off-by: Latif, Raiyan <raiyan.latif@intel.com>
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2020-08-03 13:11:13 +02:00
Andrzej Swierczynski 77f50e5444 Always pass device bitfield to AllocationProperties in constructor
Related-To: NEO-4722

Change-Id: Ie2475bf92a3189bcb9073bec5bf5af709e597c5d
Signed-off-by: Andrzej Swierczynski <andrzej.swierczynski@intel.com>
2020-07-13 09:00:10 +02:00
Jaime Arteaga a637c82c4e Share USM host pointers among devices
Change-Id: Ibdab580609e6bbb32b370ce6ee0b321df6d63245
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-07-10 23:06:06 +02:00
Mateusz Jablonski 93c1e1b976 Add MultiGraphicsAllocation to USM
Related-To: NEO-4672
Change-Id: I53ea4bea73ae6d52840146f63bc561bb90f9fe62
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2020-07-02 09:39:21 +02:00
Andrzej Swierczynski 2b7ce21709 Pass valid device bitfield while allocating memory
Related-To: NEO-4645

Change-Id: I96eaf3c4f5aba8b8b3de36182accdc16f28f7ee4
Signed-off-by: Andrzej Swierczynski <andrzej.swierczynski@intel.com>
2020-06-23 08:52:08 +02:00
Jaime Arteaga abdb707a39 Check for hardware limit for runtime device allocations
Use hardware limit, instead of the one used for device capabilities,
so applications can fully use the available memory in the device.

Change-Id: I910c610d7a3af254724a810c3c60b9da8d5d64a7
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-06-17 18:56:09 -07:00
Vinod Tipparaju c98949fd37 Fix thread safety violations within runtime allocators
Change-Id: I925d15429de314e3d3287f41a054732181911851
Signed-off-by: Vinod Tipparaju <vinod.tipparaju@intel.com>
2020-05-14 16:27:55 +02:00
Vinod Tipparaju 843edb10c8 Allow nullptr device handle input to allocSharedMem()
Change-Id: I96aad20a44c268d66ade669487e8895652d88622
2020-04-23 11:10:18 +05:30
Jim Snow b58371df4e Return device in zeDriverGetMemAllocProperties
Change-Id: Idc616fff41375a17fac04e5b036def9445d8bcfe
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2020-04-16 14:53:24 -07:00
Jaime Arteaga d96e462754 Reorganize Level Zero Core API files
Change-Id: I95750b90748dd65310fa72b030ea3ab2f72d3f24
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-03-25 11:21:43 +01:00