Media
/
compute-runtime
mirror of https://github.com/intel/compute-runtime.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
3,112 Commits 36 Branches 610 Tags 177 MiB
Commit Graph

26 Commits

Author SHA1 Message Date
Dunajski, Bartosz 1518774fe6 Use stateful args programming for aux translation kernels. 
Set valid mocs values

Change-Id: I8de2bbdd72b102a1623b9e397485ef52ecca8306
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-08-14 14:52:46 +02:00
Mrozek, Michal f0d3b47886 Turn on caching if buffers are set as constant args. 
- If resources is constant arg it means it will only be read
- Therefore even for read_write buffer we may turn on caching.

Change-Id: Id2c34d4993111bf5c6523a1946464c397db95686
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-07-31 14:56:56 +02:00
Zbigniew Zdanowicz f01c1d2d49 Add residency mechanism to OS interface 
Change-Id: I323ca856d3c901bdc4d5961cdefa42685b53d4d9
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-07-19 13:35:11 +02:00
Dunajski, Bartosz 0f87e9aa1a Rename HardwareInfo members 
Change-Id: I85f56b677bafdd75dd958b488522393fc18b68af
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-09 09:13:55 +02:00
Dunajski, Bartosz bb80d327c7 Move HardwareInfo ownership to ExecutionEnvironment [1/n] 
Change-Id: I5e5b4cc45947a8841282c7d431fb69d9c397a2d4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-08 16:11:01 +02:00
Maciej Plewka 9e52684f5b Change namespace from OCLRT to NEO 
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-26 15:48:19 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes 
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 11:50:07 +01:00
Kamil Diedrich 62e56d2398 Disable L3cache when resolve argument 
Change-Id: I4bb3a18d67254eef8aa4a0ce6b29401726f0b47e
 2019-02-06 15:51:31 +01:00
Maciej Plewka 82e3b1e146 Move igcInfo for gtpin to kernelInfo 
Change-Id: I952facac33e759ce81982f69a4ce05ffe545cea0
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2018-11-23 16:38:10 +01:00
Maciej Dziuban 9c696f1d29 Create STL-friendly SpinLock implementation 
Change-Id: Ic04d34d2962ad6953fe3282a10f6cba16c0e07b3
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-31 08:38:32 +01:00
Artur Harasimiuk 40146291ad Update copyright headers 
Updating files modified in 2018 only. Older files remain with old style
copyright header

Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-09-20 18:02:35 +02:00
mplewka 5e9066170d Change include location of gtpin headers 
Change-Id: Idd1e85b1946bad3af950cb9041d25ff5bc1aaf03
 2018-08-16 12:06:22 +02:00
Plewka, Maciej 392277ff00 Enable 'Pass info between GT-Pin and IGC', after being reverted 
This reverts commit ea92874a66.

Change-Id: I4994b30f059012a5e89d899665af5c24b8ac8b18
 2018-08-07 17:28:54 +02:00
Dunajski, Bartosz bd9ac40bab Set non-aux mode for non-pure stateful kernel arguments 
Change-Id: Id59fc3ae966a1f6632a24cbcfca3fb0aef0dd76d
 2018-08-03 09:47:49 +02:00
Kamil Diedrich ea92874a66 Revert "Pass info betwean gtpin and igc" 
This reverts commit 5654d5673fbff18b1f3c81a8eb3c8dfeb9add9e1.

Change-Id: I2df912fef15755b2e5bd11d3e18e595d71bfad98
 2018-07-30 16:10:28 +02:00
Dunajski, Bartosz 18326df1e2 Remove not needed const_cast on surface state 
Change-Id: Id182ddc4dc7d1cdfcf2d1e71ab5aff70c31f30e4
 2018-07-27 10:12:23 +02:00
Maciej Plewka aa7662e8b4 Pass info betwean gtpin and igc 
Change-Id: I1da3089ba816298b43e493304612fac6a4a10851
 2018-07-26 19:25:52 +02:00
mplewka 1afc09bc05 Fix handling null resource from gtpin 
Change-Id: I2e6a0992f9c0d672cb42724f2bb1a698b3ba2861
 2018-07-20 12:26:12 +02:00
mplewka dccee618be Handle when gtpin kernel start offset is not zero 
Change-Id: I3e8365455a23b0f271c5c1211dda6e2f4241a4e9
 2018-06-07 10:33:29 +02:00
Maciej Plewka 91c3ba40ec Handle when gtpin return null resource 
Change-Id: Ie26bbbb7198da0b6148cbc6313be9d9604df1f13
 2018-06-05 09:35:55 +02:00
Artur Harasimiuk 5fbdad88c6 refactor config.h usage 
- add defines to command line
- remove most occurences of include "config.h"

Change-Id: I19d65d83c895fc6143d319d057a50e5ae3e78830
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-04-26 10:02:15 +02:00
Mrozek, Michal d7fe01454b Make sure that gtpin callbacks are not executed in enqueue path. 
-This is to make sure those functions are not called when gtpin is not used
-This preserves CPU instruction cache pollution.
-Our enqueue path needs to be as thin as possible, even with this small change
there is visible gain in ULT execution time.

Change-Id: I44cc2144754cda95ca1fe058184cd8a151b8d35c
 2018-03-23 12:54:17 +01:00
hjnapiat 5909a6b3d3 Add support for GT-Pin Callbacks [3/n] 
Change-Id: Iea4b49efc9a666fde310ece15a9c69686d22f627
 2018-02-19 10:43:19 +01:00
hjnapiat 5b0ebe25d5 Add support for GT-Pin Callbacks [2/n] 
Change-Id: Ibdb76361be2a0e48888b46e9ed6dfe6b0ed49862
 2018-01-24 16:25:02 +01:00
hjnapiat 111897132e Switch to new version of GT-Pin headers 
Change-Id: I909d1c578b4b9c3d7e24d3e33a9bfd86a815ab14
 2018-01-15 20:20:53 +01:00
hjnapiat 17c6142191 Add support for GT-Pin Callbacks [1/n] 
- Also fixes bug when returning version of supported GT-Pin interface

Change-Id: Ib471a11a3b51d69240dcd2f800a8e28eefdeed57
 2018-01-09 14:26:47 +01:00