Commit Graph

475 Commits

Author SHA1 Message Date
Bartosz Dunajski e5882e0d31 feature: pass GraphicsAllocation to fence wait
Related-To: NEO-8179

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-05-07 17:59:28 +02:00
Mateusz Hoppe d35d8727e5 fix: use primaryCsr allocations when csr has primaryCsr set
- global fence allocation
- global stateless heap allocation
- preemption allocation
- debug surface allocation

all above are shared from primary csr

Related-To: NEO-7824


Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2024-05-07 02:41:24 +02:00
Lukasz Jobczyk c1004b77bf performance: Limit tlb flush in state cache flush to wddm
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-06 12:45:26 +02:00
Bartosz Dunajski 806da85ec6 refactor: prework to pass interrupt hint
Related-To: NEO-8179

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-04-29 11:14:53 +02:00
Lukasz Jobczyk 36ddfaaf4d fix: Fix front end programming for cooperative dispatch
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-04-25 12:55:46 +02:00
Mateusz Jablonski cb2b572e94 feature: add support for null aub mode
In this mode AUB csr will be created, however, no aub file will be created

Related-To: NEO-11097
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-09 16:59:42 +02:00
Bartosz Dunajski ef35c5cb62 feature: program device to host fence in ocl path
Related-To: NEO-10417

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-04-08 14:57:16 +02:00
Zbigniew Zdanowicz 73d558058c feature: add heapless and global stateless scratch address patching
Related-To: NEO-10381

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2024-04-03 17:04:35 +02:00
Kamil Kopryk 4eae28bd64 feature: introduce heapless state init in L0
Related-To: NEO-7824
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2024-04-02 12:34:53 +02:00
Mateusz Jablonski 78a4a92b44 refactor: reorder members to reduce internal padding in structs
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-25 15:50:00 +01:00
Dominik Dabek 2b964254d6 performance: debug key for adjust ULLS on battery
ULLS controller timeout settings will be adjusted based on ac line
status and lowest queue throttle from submissions.

Lowest queue throttle is reset when controller stops ULLS.

Related-To: NEO-10800

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2024-03-22 14:24:00 +01:00
Aravind Gopalakrishnan 04b99de4d6 refactor: Force tlb flush during TC after copy
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2024-03-21 07:25:46 +01:00
Wenju He 03078541d7 feature: make global bindless heaps resident when created
Make bindless heaps resident right after heap allocation.
Motivation is that SYCL bindless image can be passed as a value argument
or through memory. Therefore, we're not able to make its bindless heap
resident during kernel initialization or setting kernel arguments.

This fixes SYCL bindless image read_write_*D.cpp tests on DG2.

Related-To: NEO-7063
Signed-off-by: Wenju He <wenju.he@intel.com>
2024-03-20 14:40:11 +01:00
Kamil Kopryk 626b3846b0 refactor: change compute walker to defaultWalkerType
Related-To: NEO-10641
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2024-03-12 17:52:43 +01:00
Mrozek, Michal f71f6d2b72 refactor: remove not needed code
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2024-03-08 18:18:55 +01:00
Kamil Kopryk 168445784e feature: introduce states programming at driver init heapless ocl
Related-To: NEO-7824
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2024-03-08 12:29:44 +01:00
Mrozek, Michal c72b9ec448 refactor: remove not needed code
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2024-03-08 08:53:13 +01:00
Mrozek, Michal 10313b7b84 refactor: remove not needed code
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2024-03-07 18:50:16 +01:00
Michal Mrozek e08668b982 refactor: remove not needed code.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2024-03-07 13:02:29 +01:00
Michal Mrozek 660539fe4e refactor: remove not needed code.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2024-03-06 20:13:57 +01:00
Filip Hazubski d25026b263 refactor: Add getTotalMemBankSize function to ReleaseHelper
Minor refactor of ULTs to not use hard coded banks size.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2024-03-06 09:53:56 +01:00
Filip Hazubski 5f7e56e78b refactor: Unify aub config generation
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2024-03-05 11:09:34 +01:00
Michal Mrozek 64232ec370 fix: choose proper csr for low priority immediate command lists
Resolves: NEO-10168

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2024-02-28 12:45:02 +01:00
Fabian Zwolinski c51b656d2c fix: request instruction cache invalidation on module destroy
Invalidation is requested on both linux and windows,
on Csr's that used Isa allocation.

Related-To: NEO-10045
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2024-01-29 16:00:34 +01:00
Katarzyna Cencelewska 67b0b18be3 fix: osAgnostic path for allocate with alignment
Resolves: NEO-9334
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-01-25 11:03:34 +01:00
Mateusz Jablonski a697a3f718 refactor: create new members for storing spill and private memory in scratch
rename private scratch space into scratch space slot 1 as it can be generic

Related-To: NEO-9944
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-01-23 12:42:25 +01:00
Compute-Runtime-Validation f9f9035b95 Revert "refactor: create new members for storing spill and private memory in ...
This reverts commit 87eb5f554a.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-01-23 09:13:00 +01:00
Mateusz Jablonski 87eb5f554a refactor: create new members for storing spill and private memory in scratch
rename private scratch space into scratch space slot 1 as it can be generic

Related-To: NEO-9944
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-01-22 19:48:48 +01:00
Zbigniew Zdanowicz b5f698e0c5 feature: add umonitor and umwait synchronization function
Related-To: NEO-9737

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2024-01-19 14:20:19 +01:00
Mateusz Jablonski a673347378 fix: don't allocate preemption surface for BCS engines
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-01-19 07:59:24 +01:00
Mateusz Hoppe 31edeb0765 feature: set HP flag when creating HardwareContextController
- for highPriority context

Related-To: NEO-7824

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2024-01-10 12:46:29 +01:00
Mateusz Jablonski 0f5389b452 refactor: rename alias PARSE -> Parse
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-21 16:17:15 +01:00
Mateusz Jablonski a4888b39c6 build: add clang-tidy restriction for Enum case
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-21 08:58:51 +01:00
Mateusz Jablonski de93bc6928 refactor: correct naming of enum class constants 10/n
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-19 11:30:39 +01:00
Mateusz Jablonski dd1b9d6abc refactor: correct naming of enum class constants 8/n
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-19 08:18:18 +01:00
Mateusz Jablonski 27fbdde4c5 refactor: correct naming of unified memory enums
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-13 15:58:21 +01:00
Mateusz Jablonski 739d181026 refactor: correct naming of enum class constants 6/n
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-13 14:48:52 +01:00
Mateusz Jablonski 432142c574 refactor: correct naming of enum class constants 4/n
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-13 08:08:51 +01:00
Mateusz Jablonski 01dd503e47 refactor: correct naming of MemoryPool enum values
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-13 07:51:39 +01:00
Mateusz Jablonski b182917d9d refactor: correct naming of allocation types
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-11 16:23:37 +01:00
Mateusz Jablonski beafea9b39 refactor: correct naming of enum class constants 2/n
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-11 13:13:35 +01:00
Mateusz Jablonski 6849d33326 refactor: remove redundant definitions KB/MB/GB
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-05 08:55:18 +01:00
Mateusz Jablonski 9a28317ac4 refactor: rename variables from MemoryBanks namespace
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-04 16:46:46 +01:00
Mateusz Jablonski e57d372608 refactor: correct naming of enum class constants
EngineGroupType
BlitDirection
PostBlitMode
WaitStatus

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-01 11:53:51 +01:00
Mateusz Jablonski c3ac7b78bd refactor: correct variable naming
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-01 02:18:46 +01:00
Mateusz Jablonski c9664e6bad refactor: rename global debug manager to debugManager
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-11-30 13:00:59 +01:00
Mateusz Jablonski 35c1f34672 refactor: move number of threads per eu to release helper
Related-To: HSD-18034098647
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-11-20 12:16:33 +01:00
Dominik Dabek 6562828095 performance: prealloc internal heap on mtl
Preallocate 1 internal heap allocation per csr on mtl

Related-To: NEO-8152

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-11-17 13:36:21 +01:00
Dominik Dabek 961a8d91d0 refactor: move gmm constructor flags to struct
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-11-15 09:26:13 +01:00
Dominik Dabek 7a6fc209dd performance: prealloc cmdbuffer on mtl
Preallocate 2 command buffers allocations per command queue initialized
on MTL.

Related-To: NEO-8152

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-11-08 17:21:13 +01:00
Dominik Dabek 87a1fda1a7 test: cmd buffer prealloc without flag test
Add missing test with debug flag
SetAmountOfReusableAllocationsPerCmdQueue unset.

Related-To: NEO-8152

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-10-30 14:05:27 +01:00
Dominik Dabek 39cf653959 performance(ocl): cmd buffer prealloc per cmdqueue
Add mechanism to preallocate cmd buffer allocations in command stream
receiver reusable allocations list per command queue initialized.

This should limit additional allocations during hot loop.

Needs to be enabled in subsequent commits by setting product helper
method.

Related-To: NEO-8152

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-10-27 16:56:29 +02:00
Mateusz Hoppe 5d572b9c8f feature: allow freeing memory in aubstream
Related-To: NEO-2707

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-10-26 17:16:23 +02:00
Compute-Runtime-Validation fca2159430 Revert "fix: if device hierarchy is flat then getSubDevicesCount return 1u"
This reverts commit cb0bb57f49.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-10-26 15:40:29 +02:00
Baj, Tomasz cb0bb57f49 fix: if device hierarchy is flat then getSubDevicesCount return 1u
Related-To: NEO-9167

Signed-off-by: Baj, Tomasz <tomasz.baj@intel.com>
2023-10-25 15:51:52 +02:00
Zbigniew Zdanowicz 0b42510f41 fix: add l1 cache flush to barrier operations when required
Related-To: NEO-8395

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-10-23 18:18:22 +02:00
Mateusz Hoppe 52b0f32688 fix: offset cpu address when writing chunk in simulated csr
- not only gpuAddress is offset but also cpu address with data needs
to be offset while writing memory.

Related-To: GSD-6604

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-10-23 17:01:25 +02:00
Zbigniew Zdanowicz 2e09b5ff66 refactor: reposition preamble helper implementation methods
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-10-20 13:18:29 +02:00
Dunajski, Bartosz 25195ebc96 fix: capability to write memory chunk in aub/tbx mode
Related-To: GSD-6604

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-10-19 19:13:11 +02:00
Dunajski, Bartosz af7bcbf99c Revert "refactor: split CpuInaccessible MemoryPool types to Device and System"
This reverts commit 2e8cf5fdf5.

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-10-17 10:03:14 +02:00
Dunajski, Bartosz 2e8cf5fdf5 refactor: split CpuInaccessible MemoryPool types to Device and System
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-10-16 12:47:13 +02:00
Pawel Cieslak 6e481535d0 fix: fix compilation issues when building with clang-16
Related-To: NEO-8284
Signed-off-by: Pawel Cieslak <pawel.cieslak@intel.com>
2023-10-11 15:08:01 +02:00
Mateusz Jablonski fd7c750cf7 fix: ensure local variable address is not exposed outside of function
Related-To: NEO-9038
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-10-06 15:59:16 +02:00
Mateusz Jablonski fc508212de refactor: pass big parameters as reference instead of by value
Related-To: NEO-9038
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-10-04 14:53:13 +02:00
Zbigniew Zdanowicz 0a99384936 fix: set flushed task count for all cases of post sync task count operations
- set monitor fence dispatch for all cases task count post sync operation
- stand alone flush task count will not happen when already flushed and so
monitor fence
- monitor fence then must be dispatched together with task count post sync

Related-To: NEO-8395

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-10-03 12:31:45 +02:00
Dominik Dabek eebf2bbd26 performance(ocl): timestamp packet count per gfx
Add support for different timestamp packet counts per gfx family.
Change all packet counts to 1 except for xe-hpc.

Related-To: NEO-8154

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-09-25 20:34:58 +02:00
Dunajski, Bartosz 80d0c74605 fix: track registered CSR clients 2
Related-To: NEO-8884

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-09-25 09:35:55 +02:00
Compute-Runtime-Validation ade538ce54 Revert "fix: track registered CSR clients"
This reverts commit 53f635e392.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-09-24 10:07:26 +02:00
Dunajski, Bartosz 53f635e392 fix: track registered CSR clients
In L0 its not possible to track objects relations. For example CmdList
may be removed before Event.
In such case, Event needs to safely skip unregister call, without
accessing CmdList/CmdQueue object.

Related-To: NEO-8884

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-09-22 09:42:55 +02:00
Mateusz Hoppe 69f5ca6345 feature: bindless addressing - flush state cache after reusing SS slot
- when Surface State is reused for new resource, State Cache needs to be
invalidated

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-09-20 12:53:32 +02:00
Dominik Dabek 1b7e178b25 performance(ocl): program barrier pc in taskStream
Program barrier to task stream, before next enqueue kernel.
This will reduce the number of batch buffer starts for sequences of
enqueue, barrier, enqueue, ... .

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-09-19 11:48:02 +02:00
Baj, Tomasz e10f39017d fix: Add ImageInfo to createGraphicsAllocation on Linux
Related-To: NEO-6757

Signed-off-by: Baj, Tomasz <tomasz.baj@intel.com>
2023-09-14 12:58:59 +02:00
Mrozek, Michal d9f938f3db refactor: remove not needed code
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2023-09-12 14:25:04 +02:00
Compute-Runtime-Validation b5e9c10f64 Revert "performance(ocl): program barrier pc in taskStream"
This reverts commit 839c2d6737.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-09-12 01:32:28 +02:00
Dominik Dabek 839c2d6737 performance(ocl): program barrier pc in taskStream
Program barrier immediately to task stream.
This will reduce the number of batch buffer starts.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-09-11 13:23:26 +02:00
Maciej Plewka 3b3e17e738 performance: Use vector for private allocs to reuse
Related-To: HSD-18033105655, HSD-18033153203

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2023-09-04 13:34:38 +02:00
Maciej Plewka 5807d512b3 fix: Reuse private allocations during cmdList dispatch
Related-To: NEO-8201

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2023-08-31 14:40:55 +02:00
Mateusz Jablonski 824a98815e test: unify tests compute mode programming within Xe Hpg
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-08-31 09:02:10 +02:00
Zbigniew Zdanowicz 54fce64583 fix: set the indirect object address stream property when not set already
Related-To: NEO-8281

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-08-30 15:51:24 +02:00
Zbigniew Zdanowicz 873b3d4241 fix: do not process scratch space when no surface heap pointer provided
Related-To: NEO-8281

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-08-22 17:44:35 +02:00
Mateusz Jablonski f5d683063b test: pass empty execution environment when preparing device environments
Related-To: NEO-8187

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-08-02 13:05:34 +02:00
Dominik Dabek 12ab74fe96 performance: flag to program barrier in task cs
Add debug flag ProgramBarrierInCommandStreamTask to program barrier
pipe control in task command stream instead of csr command stream.
This will reduce the number of batch buffer starts.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-08-02 10:26:34 +02:00
Igor Venevtsev e2ad2e8db0 fix: initialize GPU VA for additional synchronization WA
Related-To: NEO-8072

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2023-08-01 11:43:52 +02:00
Mateusz Hoppe 997b599168 fix(debugger): pass correct sipAllocation to makeResident
- sipAllocation for context must be resident in Offline mode

Related-To: NEO-7630

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-07-28 20:51:12 +02:00
Dunajski, Bartosz cd9ad1f04c fix: decanonize GPU VA during TBX memory read.
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-07-26 19:44:19 +02:00
Dunajski, Bartosz a241099dff feature: use WaitUserFence on zeEventHostSynchronize
Disabled by default. Debug flag is required.

Related-To: NEO-7966

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-07-26 19:41:09 +02:00
Dunajski, Bartosz 2c50fd9486 fix: waiting for completion in TBX mode
- use testTaskCountReady method to check TaskCount value
- download all allocations when TaskCount is ready

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-07-25 11:54:09 +02:00
Compute-Runtime-Validation 8c155a2e89 Revert "performance: Memory handling improvements"
This reverts commit 5b80bd4d7c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-07-20 11:37:09 +02:00
Artur Harasimiuk 1434872427 refactor: remove unused code
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2023-07-20 11:09:55 +02:00
Filip Hazubski 5b80bd4d7c performance: Memory handling improvements
By default prefer allocating memory first by KMD, instead of malloc first.

By default prefer not caching allocations on MTL devices. This results
in allocations being handled with non-coherent pat index.

For integrated devices when caching is not preferred do not allow
direct memory access in CPU domain. For map/unmap operations create
a dedicated memory allocation for CPU access, instead of accessing it
directly, reusing the same logic as when mapping/unmapping local memory.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-07-19 19:21:44 +02:00
Dominik Dabek 622a3ed89c performance(ocl): flag to not dcFlush on no event
If waitForBarrier is not passed outEvent then do
dcFlush on the next synchronize call.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-07-18 15:38:54 +02:00
Zbigniew Zdanowicz 1c0285a156 fix: correct alignment of per thread scratch size
Related-To: NEO-5288

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-12 12:31:47 +02:00
Zbigniew Zdanowicz 3f7269d401 fix: make sip state programing once for all level zero command queues
Related-To: NEO-7828

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-11 11:34:21 +02:00
Zbigniew Zdanowicz 8836838c7c performance: add one time context init sip state to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-06 14:25:35 +02:00
Zbigniew Zdanowicz 59949bc833 performance: add one time context init csr surface to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-05 16:18:21 +02:00
Zbigniew Zdanowicz 69d80ee5bc performance: add one time context init preemption mode to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-05 14:06:14 +02:00
Zbigniew Zdanowicz e52e4f28f2 fix: correct csr state and command programming
- global stateless mode should save surface state base address
- correctly retrieve scratch offset for front end programming
- do not override general base address value and use indirect heap property

Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-07-03 15:55:55 +02:00
Zbigniew Zdanowicz 21823af419 performance: add skeleton method to cmdlist immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-30 10:46:20 +02:00
Zbigniew Zdanowicz eb4e7fb2a6 performance: immediate flush add flushing mechanism to gpu
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-29 15:52:13 +02:00
Zbigniew Zdanowicz b3ebcfe811 performance: immediate flush add ending commands to command list buffer
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-28 08:22:29 +02:00
Zbigniew Zdanowicz bd15d067d5 performance: immediate flush add jump to batch buffer when preamble is present
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-23 09:28:15 +02:00
Zbigniew Zdanowicz c37dbc4cf0 performance: add one time context init ray tracing to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-21 18:27:31 +02:00
Zbigniew Zdanowicz 67b74e211d performance: add one time context init partition data to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-20 14:45:37 +02:00
Zbigniew Zdanowicz 7aff4e1bf4 performance: add one time context init system fence to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-20 07:25:09 +02:00
Zbigniew Zdanowicz 1146f42bcb performance: add scratch space handling to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-16 13:08:35 +02:00
Zbigniew Zdanowicz 305f24ec9d performance: add state base address dispatch to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-14 18:00:04 +02:00
Dominik Dabek 60d5e22f3b fix(ocl): reduce busy waiting in clFinish
Use flushStamp=taskCount when passed flushStamp==0.
This will cause driver to busy wait for a short while before falling
back to use kmd notify.

Related-To: GSD-3612

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-06-14 13:56:40 +02:00
Dunajski, Bartosz 5fe9d70066 feature: new multitile post sync layout for immediate write [1/n]
No functional changes in this commit. This is prework.

Related-To: NEO-7966

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-06-07 13:11:10 +02:00
Zbigniew Zdanowicz 8d983d3e7a performance: add new copy operations to state base address properties
Adding properties to selectively copy properties for surface state,
dynamic state and binding table base addresses.

Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-07 11:34:28 +02:00
Zbigniew Zdanowicz 831363e51b performance: add state compute mode dispatch to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-06 13:29:39 +02:00
Zbigniew Zdanowicz b66a2bf32c performance: add front end dispatch to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-05 13:04:57 +02:00
Zbigniew Zdanowicz cf5100c134 performance: add pipeline select dispatch to immediate flush task
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-06-02 10:31:13 +02:00
Dunajski, Bartosz 5aeffbf673 refactor: define initial value for TimestampPacket
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-05-30 12:09:05 +02:00
Neil R Spruit ded9d7bff2 feature: Get Peer Allocation with specified base Pointer
Related-To: LOCI-4176

- Given a Base Pointer passed into Get Peer Allocation, then the base
pointer is used in the map of the new allocation to the virtual memory.
- Enables users to use the same pointer for all devices in Peer To Peer.
- Currently unsupported on reserved memory due to mapped and exec
resiedency of Virtual addresses.

Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
2023-05-24 20:41:20 +02:00
Rafal Maziejuk d236bcbba9 feature: add isTranslationExceptionSupported method
Related-To: NEO-7782

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-05-17 15:12:46 +02:00
Mateusz Jablonski 425a2a6fa2 fix: set NotLockable flag when resource does not need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-15 16:47:21 +02:00
Kamil Kopryk e0d3db3d91 fix: improve release helper
Related-To: NEO-7786
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-05-15 14:30:15 +02:00
Compute-Runtime-Validation 57851a5d29 Revert "fix: set NotLockable flag when resource does not need to be lockable"
This reverts commit c597b03a33.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-05-14 04:55:30 +02:00
Mateusz Jablonski c597b03a33 fix: set NotLockable flag when resource does not need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-12 13:15:50 +02:00
Compute-Runtime-Validation 9bf472839d Revert "fix: set NotLockable flag when resource does not need to be lockable"
This reverts commit 50c67a759e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-05-11 18:23:55 +02:00
Mateusz Jablonski 50c67a759e fix: set NotLockable flag when resource does not need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-11 13:47:15 +02:00
Filip Hazubski c4a80e193a Revert "fix: set NotLockable flag when resource doesn't need to be lockable"
This reverts commit 7b2af39fd6.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-05-11 09:17:34 +02:00
Mateusz Jablonski 7b2af39fd6 fix: set NotLockable flag when resource doesn't need to be lockable
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-10 10:16:24 +02:00
Lu, Wenbin 5d653c8536 fix: Add alignment support to createUnifiedMemoryAllocation
Allows the user to use alignments > 64KB in `createUnifiedMemoryAllocation`

So that the restriction in `piextUSMDeviceAlloc` of the DPC++ runtime
could be lifted

Related-To: LOCI-4168

Signed-off-by: Lu, Wenbin <wenbin.lu@intel.com>
2023-05-02 09:19:23 +02:00
Fabian Zwolinski cbce863dc2 refactor: Rename member variables to camelCase 3/n
Additionally enable clang-tidy check for member variables

Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-04-28 16:01:14 +02:00
Fabian Zwolinski e351a90f81 refactor: Rename member variables to camelCase 2/n
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-04-27 20:39:22 +02:00
Mateusz Jablonski 2f9135a4e6 fix: change type of container with registered engines per root device
use StackVec instead of unordered map
resize container at MemoryManager's creation time

Related-To: NEO-7925
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-04-27 17:06:42 +02:00
Fabian Zwolinski e2e00413a8 Apply CamelCase for class and struct names
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-04-24 15:36:27 +02:00
Rafal Maziejuk 685a579456 fix: check largeGrfMode in tests if supported
Related-To: NEO-7357

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-04-18 08:09:40 +02:00
Zbigniew Zdanowicz e695059152 [perf] reduce host overhead in command list reset call
There is no need to reset all fields and load support flags every reset call.
Add dedicated calls that will reset values and dirty flags.
Call virtual methods only once at init time.

Related-To: NEO-7828

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-04-05 11:29:39 +02:00
Zbigniew Zdanowicz f211d97363 [perf] simplify state transition for size properties
State base address size proprties are not used to track state changes, but
they are important to carry size values.
Simplify state base address tracking, so they can update the value of the
property, but not the dirty state.

Related-To: NEO-7828

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-04-04 10:41:36 +02:00
Zbigniew Zdanowicz 7731264fe3 [fix] update ray tracing commands programing
- 3D btd command should be programed only once per context
- Add conditional pipe control command prior dispatching 3D btd command
- share 3D btd state between immediate and regular command lists
- add pipe control after ray tracing kernel to invalidate state cache

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-04-03 11:21:24 +02:00
Compute-Runtime-Validation 2b93126795 Revert "Add alignment support to createUnifiedMemoryAllocation"
This reverts commit ca02bbba4b.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-03-30 15:43:47 +02:00
Compute-Runtime-Validation 52f21464cd Revert "fix: check largeGrfMode in tests if supported"
This reverts commit 9a6bb4be10.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-03-29 20:16:32 +02:00
Rafal Maziejuk 9a6bb4be10 fix: check largeGrfMode in tests if supported
Related-To: NEO-7357

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-03-29 13:21:16 +02:00
Rafal Maziejuk b9828b543e feature: adjust maxWorkGroupSize value
Related-To: NEO-7357

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-03-28 15:19:52 +02:00
Zbigniew Zdanowicz 6437c1a91e Flush state caches after command list is destroyed
When state base address tracking is enabled and command list use private heaps
then command list at destroy time must calls all compute CSRs that were using
that heap to invalidate state caches.
This allows new command list to reuse the same heap allocation for different
surface states, so before new use cached states are invalidated.

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-28 14:52:30 +02:00
Zhenjie Pan 820a189c52 fix: only increase fence/task count when submit task success
Related-To: NEO-7812

Signed-off-by: Pan Zhenjie <zhenjie.pan@intel.com>
2023-03-28 14:15:36 +02:00
Lu, Wenbin ca02bbba4b Add alignment support to createUnifiedMemoryAllocation
Allows the user to use alignments > 64KB in `createUnifiedMemoryAllocation`

So that the restriction in `piextUSMDeviceAlloc` of the DPC++ runtime
could be lifted

Related-To: LOCI-4168

Signed-off-by: Lu, Wenbin <wenbin.lu@intel.com>
2023-03-28 10:57:04 +02:00
Zbigniew Zdanowicz bc4e540c33 [fix] unify heaps size programing
- share same code between csr and cmd container to get default heap size
- share handling of debug flag to change heap size
- share platform level surface heap size between csr and command list
- refactor heap size files
- put heap size constant and function into namespace
- command list surface heap size increased to 2MB for xehp+ to match csr
- command list increased surface heap size only for sba tracking
- sba tracking heap consumption increased due to different reset policy

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-17 08:34:06 +01:00
Zbigniew Zdanowicz 86c91847cc [perf] change stream properties interfaces allowing fine grain selective update
Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-14 13:46:49 +01:00
Zhenjie Pan 00b675643e fix: missed error handler of SubmissionStatus::FAILED
Related-To: NEO-7802

Signed-off-by: Pan Zhenjie <zhenjie.pan@intel.com>
2023-03-13 16:08:27 +01:00
Zbigniew Zdanowicz f3324964f6 [perf] initialize stream properties only once without further check
Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-10 17:50:49 +01:00
Zbigniew Zdanowicz 24c8f089ed [perf] add state compute mode dirty flag to allow selective properties update
- full properties update is time intesive task and must be done only once
- selective update can be done after initial update
- dirty flag will allow to distinguish initial update is done

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-10 17:27:08 +01:00
Kamil Kopryk fa8579602f refactor: rename product helper files n/n
Related-To: NEO-7703
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-03-10 13:24:38 +01:00
Mateusz Hoppe 37dbec305d feature: add AssertHandler
- initial implementation to support assert() on GPU

Related-To: NEO-5753

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-03-08 17:55:23 +01:00
Mateusz Jablonski 553dd7f21f refactor: return thread per eu from compiler product helper
Related-To: NEO-7442
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-03-08 16:25:20 +01:00
Zbigniew Zdanowicz f003666ad7 Add state base address transition for global stateless heap command lists
Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-08 12:32:15 +01:00
Zbigniew Zdanowicz fd7a3c4096 Add creation of global stateless heap for the context
Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-07 15:00:34 +01:00
Maciej Plewka 52d322e738 Move barrier flush property from csr to cmdQueue
Related-To: NEO-6982, HSD-15010621906

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2023-03-03 14:33:53 +01:00