Commit Graph

69 Commits

Author SHA1 Message Date
Mrozek, Michal 97bc604316 Make sure that resources are not made resident multiple times.
Related-To: NEO-3054

Change-Id: I32d01f8993e8d327ee117a352a8b4bcb1bbb7e30
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-04-17 10:27:11 +02:00
Mrozek, Michal e772321e82 Do not call pollForCompletion after flush.
Change-Id: I5bae360ceb38d4c955035b3a51938608c79058ed
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-04-01 10:10:03 +02:00
Milczarek, Slawomir 9f95e9b704 TBX with AUB dump to call open on aub manager
Call open on aub manager to open file stream.

Change-Id: Id48ac4b3bdb212db4adc5912bacd28ccb895c9cf
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-03-27 23:59:57 +01:00
Maciej Plewka 9e52684f5b Change namespace from OCLRT to NEO
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-03-26 15:48:19 +01:00
Piotr Fusik 6f84496e78 Move duplicate code to the base class.
Change-Id: I117a6e55fc51bf3ede3a69dbb8a874e71e74ddf9
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-03-22 13:23:02 +01:00
Stefanowski, Adam 16aee8cc46 [2/n] Move Hardware Info to Execution Environment
- remove hwInfo from the csr functions where it was passed as a parameter,
now csr functions have access to hwInfo by Execution Environment

Change-Id: I756ae63d9728c9c963571147bab97f9e1c15797b
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
2019-03-22 10:08:26 +01:00
Piotr Fusik ddfb8a3ded Remove engineInfoTable.
Change-Id: Ibf614a2182485c46d826cf35bd5a83f8a767b4bb
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-03-20 08:55:22 +01:00
Piotr Fusik 8c95b45e2f Remove engineIndex.
Change-Id: I58f7cf2c394686409dc45e315d1b5af33db2a28e
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-03-19 15:26:49 +01:00
Stefanowski, Adam 341fcfc091 [1/n] Move Hardware Info to Execution Environment
- remove gmm_environment_fixture
- remove hwInfo parameter from ExecutionEnvironment methods

Change-Id: Ieb0f9b5b89191fbbaf7676685c77644d42d69c26
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
2019-03-12 08:39:26 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-27 11:50:07 +01:00
Hoppe, Mateusz 98db6147d8 Pass full aubfile name to initAubCenter when using TBX with AubDump
Change-Id: I9184ce38cd9a066259bbf3a5b8a56694d4e309b4
2019-02-21 12:39:10 +01:00
Maciej Dziuban 802eb37394 Revert "Pass HardwareInfo to AubHelper::checkPTEAddress()"
Delete AubHelper::checkPTEAddress()

This reverts commit aa587b3bc5.

Change-Id: I32b90ce7dddfd2347586b2c47b9114b45cced8ab
2019-02-19 11:51:35 +01:00
Maciej Dziuban aa587b3bc5 Pass HardwareInfo to AubHelper::checkPTEAddress()
Change-Id: Ie5370b52eb79a8d118bd8033a335dc1319e93be1
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-02-19 08:37:58 +01:00
Jablonski, Mateusz 05d02a6fe7 Change DevicesBitfield type to struct
Change-Id: I7a005b07737cdd21efc174a2ee2be0f6b7f9068d
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
2019-02-18 13:57:50 +01:00
Hoppe, Mateusz 0f36265f55 Pass CsrType to initAubCenter
- create AubManager with correct mode

Change-Id: I89c9c3c7edf553854b8b82788cec3dec53a62d79
2019-02-13 09:48:05 +01:00
Jablonski, Mateusz db8c2bc57e Unify write memory in simulated csr when aub manager is available
Change-Id: I28d0496b1b1fb973af4869e5626082142b5818dd
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
2019-02-12 14:43:26 +01:00
Piotr Fusik f014f27370 Support the EnableLocalMemory debug variable in CSR.
Change-Id: I902b06ab0b4a3df477d12804ba74b2727d8863f6
2019-02-12 13:09:23 +01:00
Dunajski, Bartosz 75fe358e5d Add HardwareContextController to use multiple Contexts in single AubCsr
Change-Id: Ica0f1c8c4e0f55310f4650788e468640406abf51
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-11 15:22:50 +01:00
Hoppe, Mateusz 4d9acf3352 Pass aubfile name to TbxCommandStreamReceiver::create and CSRWithAubDump
Change-Id: Ib10c017ce4ed2a572815053dae3f517e0dfd9eb3
2019-02-07 15:05:54 +01:00
Dunajski, Bartosz 4733ce32cf Move pollForCompletionMask for TBX to new method
Change-Id: I1ce760ea185064ec9122eb5bf11d9b99c9c700e2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-06 11:18:33 +01:00
Dunajski, Bartosz 32ecd91401 Add parameters to HardwareContext read call
Change-Id: Iba70d4b90d76199df6f0bf90c95adb7dc059c715
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-02-01 10:22:15 +01:00
Milczarek, Slawomir 6ef2822643 TBX CSR to call writeMemory on aubManager
Change-Id: Ie10a30944e0c3a8e136816fa91ff501887a3d0d2
2019-01-31 16:18:57 +01:00
Dunajski, Bartosz 783f408f9f Dont pass EngineType or Index as parameter in Aub/Tbx CSR
Change-Id: I4583a09a9fa5dd5b0508132c86156c91aaf24c28
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-31 10:30:05 +01:00
Milczarek, Slawomir b11e0825c9 AUB capture with support for allocation dumps
Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
2019-01-28 21:20:08 +01:00
Dunajski, Bartosz c878590162 Remove EngineInstance parameter from pollForCompletion call
Change-Id: I07652db2de656032cdb3452239b671edbe876b75
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-28 16:49:25 +01:00
Zdanowicz, Zbigniew 158f200476 Add HW commands const definitions
Change-Id: If2e9d7f7f707b7b8c7bd8dbd3853ab3b6dad0c9a
2019-01-18 12:13:25 +01:00
Dunajski, Bartosz 8ae7de7b0e Create HardwareContext only when osContext is available
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-13 15:12:07 +01:00
Milczarek, Slawomir ea028d2a9b Moved TBX and AUB CSR members to SimulatedCommonHw CSR
Change-Id: I4b49b0cf886c70127a9983dd1c9d7b15f7a45b7a
2019-01-08 09:39:28 +01:00
Hoppe, Mateusz e195b0e380 Initialize TBX stream only when hardwareContext is not created
Change-Id: I05d8c5c395cc342ea699333dd59966913f9a98df
2018-12-31 12:14:55 +01:00
Milczarek, Slawomir 541ab5af50 TBX CSR with an option to create and operate on hardware context
Change-Id: Ib5febc8e36e61195a5fcce91e1783117717ff6cb
2018-12-20 10:59:53 +01:00
Kowalczuk, Jakub 53fb222fe7 Unify AUB and TBX CSRs part 3
Move:
- getCsTraits
- initEngineMMIO
- submitLRCA
to common CSR

Change-Id: I8f172b017be2e8f7c54efc8420edd2671d99a927
2018-12-19 12:02:24 +01:00
Pawel Wilma 068582445d Move physical address allocator to CommandStreamReceiverSimulatedHw
Change-Id: Ic3c397fe1a93eccae9235f1315a26ae31a3f5b60
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
2018-12-19 09:26:31 +01:00
Dunajski, Bartosz 403fedfb7b Improve EngineInstance usage in Aub CSR
Change-Id: I9097f7cc8c930fcf531744af9bddfa38b2c5e1da
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-18 12:11:00 +01:00
Kowalczuk, Jakub 9e53740130 Unify AUB and TBX CSRs part 2
Move:
- getEngineIndexFromInstance
- getEngineIndex
to common CSR
Unification of arguments of some AUB/TBX methods

Change-Id: I46f25e16aa9fbad10ffc3890cc31915fa5edb1d9
2018-12-10 12:23:27 +01:00
Kowalczuk, Jakub 2dd71c2e25 Unify AUB and TBX CSRs part 1
Move:
- getPPGTTAdditionalBits
- getGTTData
- getMemoryBankForGtt
to common CSR

Change-Id: I7c9616bc18a4cffb0673d7964af168ea3ddad2dd
2018-12-07 09:24:54 +01:00
Dunajski, Bartosz b728526c4e Allow Device creating multiple CSRs [8/n]
Use OsContextId instead of DeviceIndex for residency

Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
2018-12-04 15:36:59 +01:00
Mrozek, Michal 38fb8cd9c3 Refactor mmio programming.
Change-Id: I2ec9294b800adcd537f03d69fd4ba4e015e8db7a
2018-12-03 14:40:00 +01:00
Dunajski, Bartosz 2d77b86e70 Allow Device creating multiple CSRs [5/n]
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-27 14:25:04 +01:00
Mateusz Jablonski 0e0a280803 Create structure UsageInfo for task count and residency task count
Change-Id: I0899c88d9e567a09ba46461ae69cf6c80f713e67
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-11-15 14:07:05 +01:00
Milczarek, Slawomir aa18a62d70 A partial unification of AUB and TBX CSR classes
This commit moves initialization of global MMIOs from AUB CSR to Simulated CSR

Change-Id: I93a612d4f0c82e7135287f6508870190790141bc
2018-11-10 13:12:22 -08:00
Zdanowicz, Zbigniew ce75767ca3 Add AUB registry key to override MMIO offset value
Change-Id: Iac3bf9074e544a03e38fc437d7b21ea478d9cc5d
2018-11-03 00:33:50 +01:00
Maciej Dziuban 130a7ac8b8 Delete TypeSelector helper
Change-Id: Iff5fe62d31fa7b07658cfcf81ebd2c12d47e2b3b
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-10-08 13:18:36 +02:00
Hoppe, Mateusz 2f7158e035 Move createPhysicalAllocator() to a common CSR class
- AUB and TBX use this method and it was duplicated,
- moving to common base class allows to remove duplicates

Change-Id: Ia9f08dfb0967de1b5968ac0e531733c5b868e504
2018-10-08 11:38:57 +02:00
Hoppe, Mateusz 7ddf1d554b Move getAddressSpace from AUB & TBX CSRs to CSRSimulatedHw
Change-Id: Iaa6164445f55efba3681fc41e2ec614f999e1362
2018-09-27 10:43:00 -07:00
Mrozek, Michal 4912f41759 Add additional layer for common AUB & TBX stuff.
- Move one function there.
- This layer will cover common functions that are not branch specific.

Change-Id: Ia8a288f8f51647a333a73f35cf999df9f2d5f5b1
2018-09-26 02:20:59 +02:00
Mrozek, Michal f564792895 Create common class for TBX & AUB.
- Move one method there.

Change-Id: I96cc0a64e24e4931a8d71a552f5cbf22bf99bfc2
2018-09-26 01:24:59 +02:00
Maciej Dziuban f48b90ffee Change CommandStreamReceiver::flush() argument to a reference
Change-Id: Ic933a297d4c4e243138d0d62323ba82a8b91240f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-09-25 17:28:44 +02:00
Hoppe, Mateusz 91aaa92fb6 Refactor PhysicalAddressAllocator
- create allocator dynamically in AUB & TBX CSRs

Change-Id: I3b01a3fc2f4824b552ef27cbda5bdcc140e92e53
2018-09-21 21:48:57 +02:00
Mrozek, Michal 78f828fcd1 Make residency in graphics allocation OsContext dependent.
- Graphics Allocation now holds residency control per OsContext.

Change-Id: Ie0a0d3aa9fdaf542fdd42dee3aba236a5af635c7
2018-09-20 16:44:04 +02:00
Hoppe, Mateusz 4af432ae10 Store page entry bits in PageTable entries
- set Present bit when entry is allocated regardless entry bits passed.

Change-Id: Ib1393927f66c4ed0b577a4df58d2760fbff86df7
2018-09-20 09:25:34 +02:00