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177 Commits

Author SHA1 Message Date
Kamil Kopryk d4d54f5093 Cleanup includes 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-07-25 09:58:38 +02:00
Jim Snow f4879f064f Allocate per-tile RTDispatchGlobals, handle ray tracing patch tokens. 
Related-to: NEO-6711

Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
 2022-07-22 06:29:29 +02:00
Bartosz Dunajski 2c853adac3 Use LogicalStateHelper to program ComputeMode 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-27 15:25:55 +02:00
Zbigniew Zdanowicz 5bce1eceb1 Remove self cleanup section when using immediate command list 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-06-27 13:29:52 +02:00
Bartosz Dunajski 61b2ee45cd Use LogicalStateHelper to encode SystemMemoryFence 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-24 13:29:58 +02:00
Katarzyna Cencelewska 615fd4c37a Add programming of Dispatch Walk Order in COMPUTE_WALKER for xe_hpg 
- update xe_hpg generated commands
- add method isAdjustWalkOrderAvailable

Related-To: NEO-7065
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-06-17 10:42:15 +02:00
Zbigniew Zdanowicz f5b1a0e45b Use internal event object in command lists methods 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-06-14 21:23:43 +02:00
Maciej Bielski 8de043b71f Stop redundant SBA programming due to global atomics 
For all platforms different than XE_HP_SDV (ATS) stop considering the
`useGlobalAtomics` flag as a decisive factor for trigerring the SBA
(StateBaseAddress) programming on the HW. Only XE_HP_SDV supports such
flag.

For consistency of the implementation, keep the related logic in one
place only, that is a helper in `command_encoder` and then just reuse it
in different places (`command_stream_receiver`).

Related-To: NEO-6953
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
 2022-06-08 10:39:56 +02:00
Zbigniew Zdanowicz afceaa6e19 Use system fence only when using system allocations or system scope event 
Related-To: NEO-6959

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-05-31 12:55:30 +02:00
Katarzyna Cencelewska b2021498e2 Create method adjustWalkOrder 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-05-27 16:05:31 +02:00
Zbigniew Zdanowicz 8431234845 Change interface to method programing additional fields of command 
Related-To: NEO-6959

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-05-26 21:32:59 +02:00
Katarzyna Cencelewska 96e1eb7467 Move variables baseDieRev and baseDieA0Masked from xe_hpc to pvc 
Pvc specific variables should be located in pvc struct

Related-To: NEO-6738
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-05-17 12:19:16 +02:00
Artur Harasimiuk 7eafb1e877 remove unused code 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-05-16 18:15:03 +02:00
Filip Hazubski 3900c9d24a Report to StreamProperties whether large grf should be programmed with SCM 
Add helper method to UnitTestHelper to query programmed grf values.

Related-To: NEO-6659

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-27 13:20:14 +02:00
Filip Hazubski 944319b3d9 Correct media compression format for blitter operations on planar images 
Set most significant bit for chroma planes.
Move common logic to helper function.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-22 17:02:16 +02:00
Mateusz Hoppe 5911515ed0 Refactor debugger code 
- helper sets all SbaAddresses for debugger in
EncodeStateBaseAddress<GfxFamily>::setSbaAddressesForDebugger()
- change DebuggerL0::captureStateBaseAddress() to take
LinearStream
- move getSbaTrackingCommandsSize() to Debugger class

Related-To: NEO-6845

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-04-21 13:04:34 +02:00
Bartosz Dunajski db9c0d1103 Refactor and enable MI_MEM_FENCE programming for DirectSubmission dispatch 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-07 12:53:56 +02:00
Zbigniew Zdanowicz f4407064a4 Refactor store register mem encoder to include partition parameter 
Related-To: NEO-6811

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-04-06 14:00:56 +02:00
Mateusz Hoppe beff0019d1 SBA tracking for single address space 
Related-To: NEO-6539


Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-04-01 15:24:11 +02:00
Filip Hazubski 3123ab5bf9 Correct media compression format for planar images 
Set most significant bit for chroma planes.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-03-26 21:54:08 +01:00
Mateusz Jablonski e11eb46bff Unify logic for programming mocs in post sync struct 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-03-25 17:01:51 +01:00
Krzysztof Gibala ebc006ad53 Move SBA related WAs logic from CSR to EncodeWA 
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2022-03-24 12:24:56 +01:00
Filip Hazubski 3eab7009ac Move SCM related WAs logic from CSR to EncodeComputeMode 
This will help with unifying the logic between APIs and GENs.

Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-03-11 14:00:53 +01:00
Bartosz Dunajski e24322f266 Debug flag to control MI_ARB_CHECK prefetcher 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-03-10 12:50:05 +01:00
Mateusz Jablonski b697d75695 Correct dimension order in local ids generated for implicit args 
when local ids are generated by HW, use same dim order for runtime generation
move common logic to separated file

Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-02-04 12:46:59 +01:00
Katarzyna Cencelewska dd63f1d2f9 Add new function append3dStateBtd 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-02-03 14:42:10 +01:00
Maciej Plewka 9d8ce7aace Command container appends BB_END on cmd buffer allocation end 
When linear stream created for command container has not enough space
for command and BB_END it will program BB_END and allocate new command
buffer allocation. Pointer returned from getSpace in this case will
return storage from new command buffer allocation.

Related-To: NEO-5707

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-01-31 16:15:37 +01:00
Maciej Plewka f8c104feaa Use fw declaration of IndirectHeap in CommandContainer 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-01-26 13:30:26 +01:00
Mateusz Jablonski 5e238dc7f1 Unify surface state programming logic related to implicit scaling 
OCL image surface state programming for Xe Hp core is now reusing logic
of EncodeSurfaceState helper

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-25 09:02:28 +01:00
Mateusz Jablonski fbc0666d1b Move setGrfInfo from HardwareCommandsHelper to EncodeDispatchKernel 
unify grf info programming across APIs

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 15:42:06 +01:00
Zbigniew Zdanowicz b78bb26cbf Refactor partitioning of state base address 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-14 19:06:24 +01:00
Zbigniew Zdanowicz 9c4f05387b Refactor partitioning of dispatched kernels 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-13 22:54:07 +01:00
Zbigniew Zdanowicz 9785ab7828 Refactor encode dispatch kernel class interface 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-13 12:08:38 +01:00
Filip Hazubski 9a450d1b74 Pass hwInfo to appendMiFlushDw 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-22 15:22:47 +01:00
Filip Hazubski 1107fdfe55 Rename function and remove unused parameter 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-08 22:47:40 +01:00
Rafal Maziejuk d5f3ac37bf Add KernelExecutionType argument to encodeAdditionalWalkerFields method 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2021-12-08 12:00:42 +01:00
Zbigniew Zdanowicz 47dbe359bf Add command encoder for store data command 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-12-02 20:56:07 +01:00
Zbigniew Zdanowicz 76b8f6296f Move noop programming to dedicated encoder 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-18 10:28:56 +01:00
Zbigniew Zdanowicz 9d56939980 Refactor creation of buffer surface state 1/n 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-10-21 13:11:31 +02:00
Mateusz Jablonski 5d2d81b2d1 Use uint64_t instead of void * in indirect dispatch programming 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-06 18:37:36 +02:00
Mateusz Jablonski 92bf4b978a Implement implicit args for indirect dispatch 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-06 16:10:41 +02:00
Mateusz Jablonski ae340ff6f5 Add L0 aub tests for indirect dispatch 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-05 21:05:40 +02:00
Mateusz Jablonski b891ec2588 Correct cross thread data GPU address in indirect dispatch programming 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-04 14:59:41 +02:00
Bartosz Dunajski 4ba4c32766 Remove SBA->IOH programming on XE_HP_SDV 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-09-29 12:35:43 +02:00
Kamil Kopryk a924b6a304 Code cleanup - avoid copy 5/n 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2021-09-08 08:59:55 +02:00
Filip Hazubski 55723d0b18 Remove redundant functions 
Remove EncodeStates::adjustStateComputeMode function.
Unify CommandStreamReceiverHw::programComputeMode functions.

Related-To: NEO-5995

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-09-07 16:13:50 +02:00
Zbigniew Zdanowicz 6b299a3ab0 Make partitioned post sync operations for partitioned workloads 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-09-03 20:20:29 +02:00
Bartosz Dunajski 856dee2b08 Improve Sampler programming 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-08-25 19:47:30 +02:00
Filip Hazubski 29c64c3dd0 Disable implicit scaling for cooperative kernels 
When implicit scaling is disabled use useSingleSubdeviceValue = true.

Resolves: NEO-5757

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-08-18 14:56:37 +02:00
Szymon Morek 1a7c9e63fa Add method to set force non coherent 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2021-07-23 11:18:04 +02:00
Sebastian Luzynski c389db6f1c Add space calculation for SBA instruction 
Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
 2021-07-13 12:19:30 +02:00
Sebastian Luzynski d7a2a62ded Add additional StateBaseAddress cmd wa 
Resolves: NEO-5982
Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
 2021-07-06 11:53:47 +02:00
Dominik Dabek 62f89b174a Add work_dim patching to l0 kernel 
Related-To: NEO-5931

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2021-07-05 20:09:20 +02:00
Jim Snow 2acc0fb3f6 Add memory backed buffer allocation for L0 ray tracing. 
This allocates the buffer on a per-device basis and enables ray
tracing on devices that support it when given a kernel with ray
tracing calls.

Signed-off-by: Jim Snow <jim.m.snow@intel.com>
 2021-07-02 11:56:18 +02:00
Mateusz Jablonski 72d124e275 add function to append params for image from buffer 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-06-24 13:33:43 +02:00
Filip Hazubski 99c0f02e12 Update StateComputeModeProperties 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-06-18 12:25:16 +02:00
Zbigniew Zdanowicz 0e5ca243e2 Add notify enable parameter to post sync commands 
Related-To: NEO-5845

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-06-17 19:22:51 +02:00
Jaime Arteaga a481c28e55 Program GPU atomics on stateless kernels for L0 
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2021-06-17 18:57:35 +02:00
Zbigniew Zdanowicz 4fa5041f27 Add inline directive to smallest functions 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-06-10 09:27:07 +02:00
Maciej Plewka 689ceacfe6 Fix set allocation adress in SS when offset is patched 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2021-06-08 13:05:38 +02:00
Filip Hazubski 573d01f085 Update StreamProperties 
Update ThreadArbitrationPolicy enum.
Remove adjustThreadArbitionPolicy from CommandStreamReceiverHw.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-06-08 10:05:05 +02:00
Zbigniew Zdanowicz 8f91fcdd73 Add new atomic operation 
Related-To: NEO-5244

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-06-04 09:00:11 +02:00
Mateusz Jablonski 1281e858df Disable compression flags when image is not compressed 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-05-27 12:05:52 +02:00
Filip Hazubski d693d24f27 Add StateComputeModeProperties to StreamProperties 
Related-To: NEO-4940, NEO-4574


Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-05-21 16:39:39 +02:00
Daria Hinz 53104e0830 Add a parameter to the encode function 
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2021-04-22 12:07:16 +02:00
Milczarek, Slawomir e5eba8be53 Add setters and getters for coherency type in render surface state 
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2021-04-13 16:12:46 +02:00
Igor Venevtsev bd32518d31 Add extra parameters to EncodeComputeMode::adjustComputeMode() method 
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2021-03-31 16:51:55 +02:00
Mateusz Jablonski 8215395401 Simplify Context method 
return if context has multiple sub devices related to a given root device

Related-To: NEO-3691
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-03-30 10:22:15 +02:00
Zbigniew Zdanowicz e36941b171 Change argument type in EncodeMemoryPrefetch class 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-03-25 18:27:07 +01:00
Bartosz Dunajski f9197d4e0d Improve memoryPrefetch method 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-03-24 15:12:05 +01:00
Jim Snow c97fe4c660 Minor cleanup: rename parameter argument 
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
 2021-03-23 00:54:19 +01:00
Daria Hinz 9ac7f1d370 Adding a parameter to a encode function 
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2021-03-19 17:54:46 +01:00
Zbigniew Zdanowicz d6dde3df33 Add internal argument to encode method 
Related-To: NEO-5244

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-03-19 09:37:05 +01:00
Maciej Dziuban 1350aa52fb Pass DispatchInfo to estimation functions 
Related-To: NEO-5546

Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2021-03-05 12:47:55 +01:00
Daria Hinz 13fe8ed7f1 Revert "Correct POST_SYNC for L0 Events" 
This reverts commit 04d1a3255357a7778a530f054700e211d94f3b6d.

Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2021-02-24 10:16:22 +01:00
Daria Hinz 64d772d366 Fix for adding MI_SEMAPHORE_WAIT & reset L0 Event 
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2021-02-18 18:33:21 +01:00
Zbigniew Zdanowicz c35f560971 Refactor internal interface 
Related-To: NEO-5244

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-02-15 13:24:00 +01:00
Igor Venevtsev 3df6110a17 Add extra parameters to setArgStateful() 
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2021-02-05 12:24:27 +01:00
Bartosz Dunajski 580fdd757c Improve buffer surface state programming 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-02-02 14:42:18 +01:00
Bartosz Dunajski c2e333fe38 Update compression encoding interface + test traits 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-01-29 13:57:15 +01:00
Bartosz Dunajski b57c1b9650 Improve Image surface state encoding for compression 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-01-28 16:39:42 +01:00
Jaime Arteaga 444b9594af Expand adjustPipelineSelect parameters 
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2021-01-07 18:01:07 +01:00
Young Jin Yoon e09ac446c4 Mask bit 0 of timestamp for event profiling 
Related-to: LOCI-1161
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
 2020-12-31 23:51:12 +01:00
Jim Snow 37cd49330c Implement ZE_CACHE_CONFIG_FLAG_LARGE_DATA for zeKernelSetCacheConfig 
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
 2020-12-16 07:00:13 +01:00
Young Jin Yoon da779d067f Support the AND operation in EncodeMathMMIO 
Related-to: LOCI-1161
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
 2020-12-03 01:56:22 +01:00
Maciej Plewka 7a5c9d39b5 Encode dispatch kernel with global bindless heaps 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-12-02 17:30:15 +01:00
Jaime Arteaga be90b9ff93 Add support for ZE_DEVICE_MEM_ALLOC_FLAG_BIAS_UNCACHED 
Add support for device and shared allocations that use the
ZE_DEVICE_MEM_ALLOC_FLAG_BIAS_UNCACHED flag, whether the
kernel using the memory is stateless or statefull.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-12-02 10:43:45 +01:00
Bartosz Dunajski 93ba4e646b Improve EncodeDispatchKernel 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-11-27 16:39:34 +01:00
Bartosz Dunajski 8a703c082e Add encodeExtraCacheSettings method 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-11-25 12:27:20 +01:00
Bartosz Dunajski ae3ad3e8bc Add method to adjust TimestampPacket 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-11-24 17:35:22 +01:00
Bartosz Dunajski 39e6548ef6 Add mi_arb_check between blit commands 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-11-17 13:07:50 +01:00
Mateusz Hoppe 65690ccb21 Fix indirect dispatch programming 
Related-To: NEO-5195

Change-Id: I82975abaa6323d27d3718ce1619748f7d83b55b4
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-10-28 01:06:08 +01:00
Pawel Wilma 7f8b0c5b3f Global l3 invaldate for blitter engine 
Related-To: NEO-5175

Change-Id: I88b3c9333398c91a7dd799f5e52cfd9182316960
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2020-10-19 16:40:03 +02:00
Spruit, Neil R 976dad2e17 Updated BaseSurfaceStateAddressAlignment to PageSize to handle Block R/W in L0 
- Block R/W in kernels requires a minimum of 16B alignment/OWORD
alignment to properly work without data corruption.
- Level Zero currently writes Base Surface State addresses alignment to
4B vs OpenCL writes Base Surface State addresses aligned to PageSize for
4KB.
- Added a function in encode buffer to verify that at a minimum the size
being encoded has the minumum alignment of 4B which is supported, but
will not support Block R/W

Change-Id: I6486c2cbbb0008834c779bf54918388d79c193bb
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
 2020-10-12 19:14:25 +02:00
Zbigniew Zdanowicz bf32740f97 Move BTI programming to shared code 
Change-Id: Ie9d67c1d883f24cfec13ea1618d834d746c0d5be
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-10-09 13:56:44 +02:00
Zbigniew Zdanowicz 47f5867e8f Move common code to shared directory 
Change-Id: I5f604de01e06d35cc1e045fffdd4a26d88ffca8c
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-10-07 10:55:39 +02:00
Zbigniew Zdanowicz ce1b669cda Use single class to program load register command 
Change-Id: I90fe084409588cb32f0ac43a3db5082047d7a68b
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-10-06 13:45:35 +02:00
Maciej Dziuban 138f04bdcd Enable L1 cache for Tigerlake 
Change-Id: I33513ed084f9d06ceca11315cac03f1b682db535
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
Related-To: NEO-4832
 2020-10-06 13:26:54 +02:00
Zbigniew Zdanowicz 2717fcae54 Unify programming of atomic command 
Change-Id: I13afdb44fb83beaa8673eb6456d2a8edcb6ac047
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-10-05 13:37:52 +02:00
Zbigniew Zdanowicz 394e626db9 Refactor programming of surface states 
Related-To: NEO-5069

Change-Id: Id7442fcdcc8c7df57f00e8dc383c11869bf1a677
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-09-16 11:54:00 +02:00