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3 Commits

Author SHA1 Message Date
Barreyra, Bruno R d7c56eb7d6 Fix GPU debugging on gen11+ 
Format of debug mode register changed for gen11+ projects. Without this
change, the SIP is never invoked.

Change-Id: Ie8314acbee1ead527deeea45cb5689b4a39df24c
 2019-10-14 11:28:20 +02:00
Kamil Kopryk 50f40296c4 Add WaDisableFusedThreadScheduling 
Change-Id: I5ad09fc7d366b8062ff7b10f86718f3afe28ba0b
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2019-10-08 12:11:16 +02:00
Daria Hinz 375681ae12 Move Preamble Helper to core 
Change-Id: I7d1bf567a67dc93c10d396aeb48ad1179b5b8ecb
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2019-10-03 13:54:17 +02:00