Commit Graph

307 Commits

Author SHA1 Message Date
5a4fa180d6 feature: control bindless compilation mode based on release
- check releaseHelper support when selecting bindless mode, if not
disabled, prefer bindless mode in L0 API
- bindless mode can be forced with DebugVariable: UseBindlessMode

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-10-19 10:11:11 +02:00
75c4844987 feature(internal): logging kernel dispatch params
Use debug flag PrintKernelDispatchParameters to print params used in
thread group dispatch size heuristic when encoding kernel dispatch.

Related-To: NEO-6989

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-10-17 17:31:54 +02:00
2e9a7d7dca refactor: improve PVC unit tests
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-10-17 11:24:03 +02:00
c2d69e5857 feature: allocate SPECIAL_SSH heap in front window from EXTERNAL heap
- SPECIAL_SSH is used for debug surface SurfaceState which must be
located at bindless offset zero
- limit size of external front window

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-10-09 14:54:39 +02:00
3a21b3b228 refactor: remove not needed code
Related-To: NEO-7527

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-09-28 07:52:39 +02:00
480c058cb2 feature: in-order patching for ComputeWalker
Related-To: NEO-7966

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-09-22 15:00:44 +02:00
97e7cda912 feature: Optimize intra-module kernel ISA allocations
So far, there is a separate page allocated for each kernel's ISA within
`KernelImmutableData::initialize()`. Apparently the ISA blocks are often
much smaller than a 64k page, which leads to poor memory utilization and
was even observed to cause the device OOM error if a single module has
several keys.

Improve the situation by reusing the parent allocation (owned by the
module instance) for modules, which kernel ISAs can fit together within
a single 64k page. This improves the memory utilization on a single
module level.

Related-To: NEO-7788
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2023-09-21 13:55:45 +02:00
913a926fd4 Revert "feature: Optimize intra-module kernel ISA allocations"
This reverts commit c348831470.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-09-19 14:16:05 +02:00
c348831470 feature: Optimize intra-module kernel ISA allocations
So far, there is a separate page allocated for each kernel's ISA within
`KernelImmutableData::initialize()`. Apparently the ISA blocks are often
much smaller than a 64k page, which leads to poor memory utilization and
was even observed to cause the device OOM error if a single module has
several keys.

Improve the situation by reusing the parent allocation (owned by the
module instance) for modules, which kernel ISAs can fit together within
a single 64k page. This improves the memory utilization on a single
module level.

Related-To: NEO-7788
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2023-09-19 12:05:09 +02:00
7562842a58 refactor: remove LogicalStateHelper
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-09-13 10:29:53 +02:00
6648065703 feature: add indirect semaphore mode
Related-To: NEO-8242

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-09-12 13:15:51 +02:00
2a6be2fccd feature: update conditional bb start to use qword data
Related-To: NEO-8242

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-09-12 11:24:28 +02:00
def3f2e9ad refactor: improve semaphore programming
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-09-12 11:24:11 +02:00
db95855092 test: unify tests encode dispatch kernel within Xe Hpg
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-08-30 16:23:38 +02:00
6fca8ee195 refactor: Remove SourceLevelDebugger
Removed:
- SourceLevelDebugger (with tests)
- DebuggerLibrary
- DebuggerLibraryRestore
- debuggerSupported field from hwInfo.capabilityTable
- HasSourceLevelDebuggerSupport matcher
- ExperimentalEnableSourceLevelDebugger debug var
- EnableMockSourceLevelDebugger debug var
- DebuggerOptDisable debug var
- lib_names.h.in file
- third_party/source_level_debugger/igfx_debug_interchange_types.h

Related-To: NEO-7213
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-08-10 11:14:02 +02:00
4aba0f0340 feature: global bindless surface state base support
- program global bindless ssba when external allocator used (
UseExternalAllocatorForSshAndDsh)

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-07-06 18:31:49 +02:00
3c4d921a80 refactor: remove not used code
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2023-06-30 13:39:25 +02:00
2d01bdec81 fix: change denorm mode in IDD to FlushToZero
denorm support is controlled by IGC, we should just set zero by default

Related-To: NEO-8059
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-06-23 09:28:32 +02:00
313fb84fda feature: bindless addressing mode support
- allow bindless kernels to execute
- bindless addressing kernels are using private heaps mode
- do not differentiate bindful and bindless surface state base addresses

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-06-19 12:41:03 +02:00
995e2a79c6 Revert "fix: change denorm mode in IDD to FlushToZero"
This reverts commit 987394b27c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-06-15 11:49:01 +02:00
987394b27c fix: change denorm mode in IDD to FlushToZero
denorm support is controlled by IGC, we should just set zero by default

Related-To: NEO-8059
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-06-13 13:42:50 +02:00
6a0f7afd64 feature: verify stateful information only when binary is generated by IGC
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>

Related-To: NEO-6075

Ngen binaries contain stateful information, however they are
not used in isa on Pvc. Therefore, we can just ignore them.
2023-06-12 11:45:41 +02:00
3d49658f50 feature: new multitile post sync layout for immediate write [2/n]
No functional changes in this commit. This is prework.

Related-To: NEO-7966

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-06-09 14:20:34 +02:00
0844ca0ac8 refactor: cleanup getBindlessMode() usage
- getGlobalBindlessHeapConfiguration() should be used to choose global
alloctor for SSH
- remove not needed and incorrect unit tests
- remove not needed branches
- bindless mode controls bindless compilation only

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-06-06 17:23:13 +02:00
19bb1e334c feature: enable SW exceptions for kernels with assert and debugging
- when debugging is enabled, assert() in gpu kernel will trigger SW
exception

Related-To: NEO-5753

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-06-01 15:31:36 +02:00
808ff8c2e4 refactor: remove unused EncodeDispatchKernelArgs field
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-06-01 10:42:22 +02:00
feff1c35cc feature: Experimental support of immediate cmd list in-order execution [5/n]
Related-To: LOCI-4332

- Signal non-timestamp Walkers with in-order CL value
- Event host synchronization based on CL signal value

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-05-09 11:46:14 +02:00
cbce863dc2 refactor: Rename member variables to camelCase 3/n
Additionally enable clang-tidy check for member variables

Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-04-28 16:01:14 +02:00
c84c7a0c91 performance: adjust thread group dispatch size
adjust thread group dispatch size on pvc if chosen size does not evenly
divide dimension

this is to avoid leftover thread groups

Related-To: NEO-7927

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-04-27 18:24:53 +02:00
51b8dc66a3 fix ocloc/ult: set default PVC device to pvc xt C0
ensure default hw ip version matches the value from helper
change pvc ult execution to revision 3

Related-To: NEO-7738
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-04-18 13:48:48 +02:00
685a579456 fix: check largeGrfMode in tests if supported
Related-To: NEO-7357

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-04-18 08:09:40 +02:00
e79fb5f39b Revert "fix ocloc/ult: set default PVC device id to pvc xt device id"
This reverts commit bd84ba819b.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-04-15 11:43:21 +02:00
bd84ba819b fix ocloc/ult: set default PVC device id to pvc xt device id
ensure default hw ip version matches the value from helper
change pvc ult execution to revision 3

Related-To: NEO-7738
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-04-13 10:54:28 +02:00
a114448792 [feat, perf] Indicate implicit scaling is dispatched from primary batch buffer
This change is part of performance feature to start command list batch buffers
as primary.
Implicit Scaling sometimes require to jump over control section and these jumps
must maintain the same level of batch buffer as the whole command list.

Related-To: NEO-7807

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-04-11 12:39:25 +02:00
52f21464cd Revert "fix: check largeGrfMode in tests if supported"
This reverts commit 9a6bb4be10.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-03-29 20:16:32 +02:00
9a6bb4be10 fix: check largeGrfMode in tests if supported
Related-To: NEO-7357

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-03-29 13:21:16 +02:00
b9828b543e feature: adjust maxWorkGroupSize value
Related-To: NEO-7357

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-03-28 15:19:52 +02:00
38e50007f7 [perf] simplify memory layout of command container class
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-23 13:31:47 +01:00
a4a296d59f wa: enable wa to add additional dummy blits after blit copy
- reduce number of dummy blits where are not needed
- track if dummy blit required in cmdlist

Related-To: NEO-7450
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-17 10:43:00 +01:00
bc4e540c33 [fix] unify heaps size programing
- share same code between csr and cmd container to get default heap size
- share handling of debug flag to change heap size
- share platform level surface heap size between csr and command list
- refactor heap size files
- put heap size constant and function into namespace
- command list surface heap size increased to 2MB for xehp+ to match csr
- command list increased surface heap size only for sba tracking
- sba tracking heap consumption increased due to different reset policy

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-17 08:34:06 +01:00
86c91847cc [perf] change stream properties interfaces allowing fine grain selective update
Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-14 13:46:49 +01:00
f3324964f6 [perf] initialize stream properties only once without further check
Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-10 17:50:49 +01:00
398c7b2d29 refactor, remove typo in struct name
change name of EncodeSempahore to EncodeSemaphore
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-10 15:44:25 +01:00
fa8579602f refactor: rename product helper files n/n
Related-To: NEO-7703
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2023-03-10 13:24:38 +01:00
0950f5a23e Set global heap size to constant value
Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-03-09 17:17:32 +01:00
c274309d7b wa: add dummy blits before command MI_FLUSH_DW
to guarantee that all subblt got complete for previous copy
affect xe hpg

temporary changes under flag ForceDummyBlitWa

Related-To: NEO-7450

Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-09 10:40:35 +01:00
3e116ea378 refactor: use same paths when add command mi_semaphore_wait
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-03-07 10:35:26 +01:00
34064811d2 Refactor state base address programing 4/n
- This change gets level one cache policy from cached values instead
of calling virtual methods

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-27 17:30:36 +01:00
43a49c4486 Refactor state base address programing 2/n
This change allows to read sba data directly from sba properties

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-02-23 12:20:25 +01:00
2f5be7a48d Copy command buffer into ring buffer
Resolves: NEO-7422

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2023-02-22 16:37:34 +01:00