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390 Commits

Author SHA1 Message Date
Warchulski, Jaroslaw 4100e1aa72 Cleanup includes 7 
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
 2022-11-28 17:01:48 +01:00
Maciej Plewka 4b42b066f8 Use dedicated using type for TaskCount 
Related-To: NEO-7155

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-11-28 16:44:44 +01:00
Compute-Runtime-Validation 7b195d6b8e Revert "Add support for USM shared in WSL for dGPU" 
This reverts commit 44d8a6ae2b.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-11-25 08:42:15 +01:00
Milczarek, Slawomir 4476e7ad76 Fixed conditions to remove memory prefetch allocations in L0 backend 
Ensure memory prefetch be applied in every execution of command list.

Related-To: NEO-6740

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2022-11-23 16:19:34 +01:00
Kamil Diedrich 44d8a6ae2b Add support for USM shared in WSL for dGPU 
This patch force KMD allocation path for USM shared
Additionally we force 64kb page from lock which is
required to properly program GPU VA

Related-To: NEO-6913
Signed-off-by: Kamil Diedrich kamil.diedrich@intel.com
 2022-11-23 12:41:25 +01:00
Compute-Runtime-Validation 565d44e59c Revert "Fail when handle cannot be obtain for an allocation" 
This reverts commit 4391ad21bb.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-11-23 05:45:01 +01:00
Jaime Arteaga 4391ad21bb Fail when handle cannot be obtain for an allocation 
If a handle cannot be obtained, like PRIME_HANDLE_TO_FD, then
properly check for the error and propagate it upwards.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2022-11-22 19:29:19 +01:00
Dominik Dabek 67bfebb25e Add additional create buffer arguments 
Allow to: disable performance hints, make allocation lockable

Used in BufferPoolAllocator

Related-To: NEO-7332

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-11-21 16:19:53 +01:00
Warchulski, Jaroslaw 1c03361273 Cleanup includes 6 
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
 2022-11-21 12:02:14 +01:00
Compute-Runtime-Validation 074a1e8583 Revert "Make small buffer allocations lockable" 
This reverts commit 9b9b0f10ef.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-11-19 18:04:32 +01:00
Warchulski, Jaroslaw f35f59b573 Cleanup includes 5 
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
 2022-11-18 22:46:38 +01:00
Dominik Dabek 9b9b0f10ef Make small buffer allocations lockable 
Allocations of buffers <= 64KB will be lockable, to
allow copying through locked pointer.

Related-To: NEO-7332

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-11-18 16:07:50 +01:00
Lukasz Jobczyk e197736b6f Ensure base ptr is passed to PageFaultManager::removeAllocation 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-11-17 16:12:31 +01:00
Slawomir Milczarek ba003dd7dc Prefetch kmd-migrated shared allocation to multiple subdevices 
Related-To: NEO-6740

Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
 2022-11-17 15:24:54 +01:00
Dunajski, Bartosz 89b96e5e8f Introduce initial implementation of DirectSubmission relaxed ordering mode. 
Initial implementation of task store section

Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-11-17 12:23:29 +01:00
Mateusz Hoppe f19abda0e2 Set root device index in OsContext 
- correclty choose default engine context accounting for root device
index and  subdevices bitfield

Related-To: NEO-7516

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-11-16 23:02:19 +01:00
Compute-Runtime-Validation 083168dafb Revert "Add support for USM shared in WSL for dGPU" 
This reverts commit b0c97e49ea.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-11-16 10:09:42 +01:00
Mateusz Jablonski 6648adef15 Handle error in register memory allocation methods 
Related-To: NEO-7412
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-11-15 17:23:55 +01:00
Kamil Kopryk 211cc8552a Move hwHelper ownership to RootDeviceEnvironment 4/n 
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>

UseRootDeviceEnvironment getHelper<CoreHelper> for:
- isLocalMemoryEnabled
- getSipKernelType
- is1MbAlignmentSupported
 2022-11-15 08:23:53 +01:00
Szymon Morek 3281dea1fe Allow debug allocs to use copyMemoryToAllocation 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-11-14 17:50:32 +01:00
Milczarek, Slawomir 25a5ed0dca Allocate buffers in local memory for PVC multi root device platforms (1/n) 
PVC platform with no support for atomic operations on system memory
must always allocate buffers in local memory to avoid atomic access violation.
Note: the feature is being implemented under the new registry key
AllocateBuffersInLocalMemoryForMultiRootDeviceContexts (disabled by default)

Related-To: NEO-7092

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2022-11-14 13:56:50 +01:00
Kamil Diedrich b0c97e49ea Add support for USM shared in WSL for dGPU 
This patch force KMD allocation path for USM shared

Related-To: NEO-6913
Signed-off-by: Kamil Diedrich kamil.diedrich@intel.com
 2022-11-14 13:56:22 +01:00
Kamil Kopryk 002a90c717 Move hwHelper ownership to RootDeviceEnvironment 2/n 
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>

UseRootDeviceEnvironment getHelper<CoreHelper> for:
- getMaxBarrierRegisterPerSlice
- getPaddingForISAAllocation
 2022-11-10 16:39:39 +01:00
Lukasz Jobczyk ff500e0de6 Add support for external hostptr in shared allocations 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-11-09 14:48:01 +01:00
Szymon Morek c9fad505d7 Replicate CONSTANT_SURFACE across tiles 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-11-08 20:35:43 +01:00
Warchulski, Jaroslaw fb25f96081 Cleanup includes 2 
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
 2022-11-07 10:36:50 +01:00
Compute-Runtime-Validation d91d22d1fe Revert "Replicate CONSTANT_SURFACE across tiles" 
This reverts commit 9a4467f368.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-11-05 07:16:15 +01:00
Szymon Morek 9a4467f368 Replicate CONSTANT_SURFACE across tiles 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-11-03 18:36:18 +01:00
Dominik Dabek 526ba1bde5 Fix l0 kernel set arg buffer caching 
Fix for incorrect cache hit if alloc id was uninitialized
and allocations counter was the same.

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-10-27 17:25:10 +02:00
Patryk Wrobel 9b26e96b11 Do not copy std::vector of OS handles when it is not needed 
This change replaces unneeded copying of std::vectors
with usage of const references. Furthermore, it adds
reserve() call before filling the container via push_back().

Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
 2022-10-21 10:28:58 +02:00
Mateusz Hoppe 0fdb308207 Use correct context for validateHostPtr 
- with per context VMs, context with subdeviceBitfield must
be selected

Resolves: NEO-7426

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-10-18 13:10:28 +02:00
Maciej Plewka 1458602efc Store indirect residency at command queue level 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-09-22 14:07:19 +02:00
Mateusz Hoppe 92893a5101 L0Debug - add support for mirrored isa heaps 
- allow tileInstanced ISA while debugging

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-09-20 19:32:00 +02:00
Compute-Runtime-Validation 643e21631c Revert "Store indirect residency at command queue level" 
This reverts commit ffad5c6c09.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-09-20 18:12:12 +02:00
Michal Mrozek 3d5e34f727 Reduce the size of masks to 4. 
32 is not required.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-09-19 21:53:40 +02:00
Maciej Plewka ffad5c6c09 Store indirect residency at command queue level 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>

Related-To: NEO-7211
 2022-09-19 17:01:20 +02:00
Patryk Wrobel f6bf669ee9 Use forward declarations in compression_selector.h 
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
 2022-09-14 11:54:24 +02:00
Dominik Dabek 16798467ac Add api specific config for allocation cache 
Currently disabled for both opencl and level zero

Related-To: NEO-6893

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-09-05 21:15:18 +02:00
Patryk Wrobel 90ba50bf52 Warn when RAII lock returned from function is discarded 
Discarding RAII lock returned from function almost always
is a bug. This change introduces usage of [[no_discard]]
attribute from C++17 to prevent such misues.

Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
 2022-09-01 16:53:03 +02:00
Dunajski, Bartosz 4809a2a9b3 Allow debug flag to apply allocation alignment for heaps 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-08-29 15:17:56 +02:00
Dominik Dabek 2d949a9f3d Fix device allocation cache 
Do not use aligned size when storing allocation
Trim allocation cache before deleting devices

Related-To: NEO-6893

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-08-26 11:15:56 +02:00
Mateusz Hoppe 01b324953e L0Debug - allocate per-tile ISA when tileAttach is enabled 
Related-To: NEO-5784

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-08-18 15:48:31 +02:00
Mateusz Jablonski 3d9b5d441a Add UNRECOVERABLE_IF to avoid nullptr dereference 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-08-09 15:44:49 +02:00
Lukasz Jobczyk eb8cd33dc6 Do not flush tag update if already flushed 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-08-08 14:11:42 +02:00
Neil R Spruit ada9b5d4a9 Handle if L0 Event Memory is Shareable 
- Properly check for IPC event handle flag to determine if the event
pool memory is sharable between processes.
- Given Host Visible Event Pool, a check is done to determine if the
Host memory can be shared between the processes.
- Enabled handling if Event Host Memory is shareable for DRM
- If Event Pool Memory is Not shareable, then retrieving the IPC Event
Pool Handle returns unsupported.

Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
 2022-08-05 00:11:05 +02:00
Milczarek, Slawomir 601ace6a25 Add unit test for append memory prefetch for regular command list 
Related-To: NEO-6740

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2022-08-04 10:32:08 +02:00
Dunajski, Bartosz 98d776867f Add initial support for KernelArgsBuffer allocation 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-08-03 20:28:21 +02:00
Milczarek, Slawomir 046f9d95fc zeCommandListAppendMemoryPrefetch with memory prefetch manager 
Related-To: NEO-6740

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2022-08-02 20:07:31 +02:00
Kamil Kopryk 17f22990e6 Cleanup includes 4/n 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-07-28 09:44:48 +02:00
Kamil Kopryk 0603819b68 Cleanup includes 3/n 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-07-27 15:28:13 +02:00