Commit Graph

97 Commits

Author SHA1 Message Date
Dunajski, Bartosz d6870a896b Reduce tag pool size to 1 for AUBs
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-20 11:42:32 +01:00
Mateusz Jablonski 66492a53a4 Change type of residency task count to uint32_t
Move definitions of objectNotUsed and objectNotResident to GraphicsAllocation

Change-Id: I2aec604a865cc6c975e9d1121028cbdd35c0b18a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-11-16 16:04:48 +01:00
Dunajski, Bartosz bd4ea652ec Make Timestamp allocations OneTimeAubWritable
Change-Id: I22e973714e4df1b3a07d8fb45cdab37b28a6433e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-16 15:49:25 +01:00
Mateusz Jablonski 0e0a280803 Create structure UsageInfo for task count and residency task count
Change-Id: I0899c88d9e567a09ba46461ae69cf6c80f713e67
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-11-15 14:07:05 +01:00
Mateusz Jablonski 630a7e1c26 Allow to reuse just completed allocation
Change-Id: I7c1ab153178b79348d49209ca09478543d35e197
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-11-06 22:11:24 +01:00
Woloszyn, Wojciech 549b73510c Flush L3 for reduced address space platforms
Change-Id: I5a73e72f8e309137328930920ab174ba6f1378dc
2018-11-06 14:26:59 +01:00
Mateusz Jablonski 815ae851b7 Graphics Allocation: store task count per context id
Move definition of allocations list method to internal_allocation_storage.cpp

Change-Id: I4c6038df8fd1b9335e8a74edbab33b78f9293d8f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-11-06 12:43:47 +01:00
Zdanowicz, Zbigniew 8504b37a08 Add branch prefix to unit_tests/gen_common subdirectory
Change-Id: I7661dbd8a65aaa50c21afb982b23edb9080d6f84
2018-11-01 00:15:04 +01:00
Mrozek, Michal 200228b506 Replace cpuPtrAllocated flag with driverAllocatedCpuPointer.
Change-Id: Ic0ce165d0e583701e1128595a3d9dabd0a61a84b
2018-10-31 12:37:20 +01:00
Mrozek, Michal 7ece16ee7a Graphics Allocation cleanup.
- remove one constructor
- start using mock graphics allocation in tests

Change-Id: Idb8f4a35dbc2cae8d6bf667bab5542d8e91d6e0d
2018-10-31 11:54:24 +01:00
Mateusz Jablonski a30c70d84b Remove cleaning allocation lists methods from memory manager
Change-Id: I4a58a5373e7dc4cf8dc5d90390e84c4f23689139
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-29 10:35:03 +01:00
Mateusz Jablonski d5c9816428 Remove store allocation methods from memory manager
Move setGPUAddress method to WddmAllocation

Change-Id: I91d877c3791e9eff69276e4258e3ce9c3111ca45
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-26 10:53:43 +02:00
Mateusz Jablonski 129380c1a6 Cleanup host ptr manager
Change-Id: I0fc9df41a08255eef8072666c1c5c16806e0f7cf
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-26 08:26:38 +02:00
Mrozek, Michal 7319023b0f Add capability to use malloc for Heap32 base.
- shift page tables to lower bits

Change-Id: I54dcba72255215cf5be75ba425fc27727b0bfd98
2018-10-25 16:20:00 +02:00
Mateusz Jablonski 477a06a4eb Move creation of os storage for host ptr allocation to host ptr manager
Change-Id: If7b6c17e21c72c807031232a502265559dfa48b1
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-24 10:23:25 +02:00
Maciej Dziuban 7fe0a0df06 Delete OsContext from FenceData
This decoupling is needed to move makeResidentResidencyAllocations into
WddmResidencyController, where we have only contextId, not the context itself

Change-Id: I0d79f1dc7a51fa6b1d713deb6e9003aa2b7be1d4
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-10-23 09:17:09 +02:00
Mateusz Jablonski 7ec8e6a3f2 Fix naming convention in host ptr defines
Change-Id: I9f0d5790031b5067b92159b078768e560990b9c6
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-22 16:29:04 +02:00
Mateusz Jablonski 8a9d0a81df Move temporary and reusable allocation lists to command stream receiver
Change-Id: I40df6fe39b367e243e3710c5fdeaab3c85198d9d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-11 15:32:12 +02:00
Dunajski, Bartosz 66427f60c6 Handle TimestampPackets for non-kernel enqueues
Change-Id: I52ec4f43b10bf6e2a10b2455d32a90a606645d29
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-10-10 04:21:30 +02:00
Maciej Dziuban 130a7ac8b8 Delete TypeSelector helper
Change-Id: Iff5fe62d31fa7b07658cfcf81ebd2c12d47e2b3b
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-10-08 13:18:36 +02:00
Mateusz Jablonski b602cd2bb8 Pass execution environment to memory manager
Change-Id: If43cf9d1353b4cbc02ea269fb9105c01cc4e0876
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-03 22:12:26 +02:00
Hoppe, Mateusz ce29770d61 Extend PhysicalAddressAllocator with page size and alignement
- this allows for reserving 64k pages or bigger with specified alignement
if required

Change-Id: I256d6c0d9e7fee0e2bac5f4ab5e4fd49ea9d8d50
2018-10-03 20:02:58 +02:00
Mateusz Jablonski 9a1adc3095 Remove scenarios with memory manager with null csr
Change-Id: Ie151bf3d16c5d994f154c8f9ac3db43702a4798c
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-02 21:43:21 +02:00
Dunajski, Bartosz cbd017d495 Handle TimestamPacket with implicit dependencies ownership
Change-Id: I22a4de4e9eb904c359583e235e0de54a7c743e07
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-09-28 01:48:02 +02:00
Hoppe, Mateusz 465e1a3165 Fixes for AUBs
Change-Id: Iac55927eb96db8dd68b86d21e66392039ba1f058
2018-09-27 06:38:19 +02:00
Hoppe, Mateusz 64c891f0fd Use specific address for Allocator32Bit in AUB CSR
Change-Id: If3fd466fcfea21c1967b10def57acf67ccfdc5e6
2018-09-26 16:01:07 -07:00
Stefanowski, Adam 6aab39fd9b Move MMAllocateInPreferredPoolTests to inl file
Change-Id: I08dc6dfedbd4c970174377454fdac112cbf29f48
2018-09-26 19:30:35 +02:00
Hoppe, Mateusz 5aae5a3d62 Rename DeviceIndex to DevicesBitfield to reflect type usage
Change-Id: Ic5ac1d2d49082dc3c6e98c1fa5178b93ec9ddf56
2018-09-24 14:46:19 +02:00
Hoppe, Mateusz 91aaa92fb6 Refactor PhysicalAddressAllocator
- create allocator dynamically in AUB & TBX CSRs

Change-Id: I3b01a3fc2f4824b552ef27cbda5bdcc140e92e53
2018-09-21 21:48:57 +02:00
Hoppe, Mateusz a470aa2072 Get AddressSpace to expectMemory from page table entry bits
Change-Id: I1aacdf98f436261b523765e0ca591e8d8333274e
2018-09-21 16:44:55 +02:00
Hoppe, Mateusz e8b6f11cad Propagate AllocationFlags and deviceIndex to GraphicsAllocation
- adjust AllocationData interface

Change-Id: I3754585011d34b747fe23836f754fba8e711c9ff
2018-09-21 16:38:22 +02:00
Mrozek, Michal f3bcb5c539 Make sure that residency is properly initialized.
- all members needs proper init.

Change-Id: I578eee8178ae375cc4861872c84ced1729fb689b
2018-09-20 20:47:27 +02:00
Artur Harasimiuk 40146291ad Update copyright headers
Updating files modified in 2018 only. Older files remain with old style
copyright header

Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2018-09-20 18:02:35 +02:00
Venevtsev, Igor 7c94409ce8 Change MemoryManager::allocateGraphicsMemoryInPreferredPool() signature.
Remove allocateMemory param.
Add AllocationFlags and DeviceIndex params.

Change-Id: I3ba048f8ea9840a047a3222dc1e97be2105c2222
2018-09-20 13:04:21 +02:00
Hoppe, Mateusz 4af432ae10 Store page entry bits in PageTable entries
- set Present bit when entry is allocated regardless entry bits passed.

Change-Id: Ib1393927f66c4ed0b577a4df58d2760fbff86df7
2018-09-20 09:25:34 +02:00
Hoppe, Mateusz 610eda5ad1 Add PhysicalAddressAllocator to PageTables
- Allocator is responsible for physical pages allocation

Change-Id: I3a9034c87292484da8f4f0eb1d1e0cc5122a4d8a
2018-09-14 13:23:07 +02:00
Maciej Dziuban 8df30ceac1 Move residency and eviction allocations from MemoryManager to CSR
Change-Id: I44185b35375f4cc9d58cac14cac1edefaacde652
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-09-14 13:19:55 +02:00
Hoppe, Mateusz 58c34fd72c Enhance PageTable testing
- and mock PageTables with entries access
- new test checking correct entries filling

Change-Id: I4ad70aac2915f0ff2611c65a8480dadcf87c0b8d
2018-09-12 12:59:40 +02:00
Mrozek, Michal 581805cc88 Move OsContext id setting to constructor.
Change-Id: I1b809befc02536257800e3667307b8deabd5c95d
2018-09-12 09:50:26 +02:00
Pawel Wilma 8c1db4fb2f Code cleanup for reduced GPU address space
Change-Id: Ibce79ddbe1f03dac1813b5dc2356a9db86b60200
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
2018-09-10 16:16:06 +02:00
Hoppe, Mateusz cfa8035836 Add localMemorySupported member to MemoryManager
- extend constructor to take new flag
- extend ExecutionEnvironment createMemoryManager with new flag
- only OsAgnosticMemoryManager changes in this step

Change-Id: I1dae4fd79fe28fd87e42b237600dc216c94b597e
2018-09-07 12:04:21 +02:00
Mrozek, Michal ac2a2de3be Enhance ResidencyData to work with multiple OsContext
- Add new method updateCompletionData to register completion fence and context
- remove obsolete methods and fields
- for trimming choose default 0 OsContext

Change-Id: I0f6c7af9499a454a70ad1c5b0fa2766416eba297
2018-09-07 09:09:58 +02:00
Mrozek, Michal 7eceb3038c Do no increment ref counts when passing OsContext to residency.
- not needed anymore, memory manager manages the ilfecycle of OsContext

Change-Id: Ibcb32954522dd862187cf97d62d2e0b1b10e50e5
2018-09-06 12:53:35 +02:00
Mrozek, Michal 75e26f39b1 Move ownership of OsContext to memory manager.
- register OsContext when device is created
- memory manager controls residency so it needs to have control of
OsContexts underneath
- device may be destroyed while OsContexts may be still in use

Change-Id: If08df7686f5448a1e7b0b6ced20b37a1e8ba2cd6
2018-09-06 10:05:28 +02:00
Mrozek, Michal b87af2c9e7 Move residency to dedicated header.
Change-Id: Ic27748fdb36b1f92c58ca20f8b6e12e6a24f41d8
2018-09-05 16:34:08 +02:00
Pawel Wilma 4a12deea2b Add support for reduced GPU address space
Change-Id: I9ebbc8c51039bb533b44c6b80e717e1489a20a43
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
2018-09-03 13:51:36 +02:00
Venevtsev, Igor f6743ced2a Remove reuseBO from createGraphicsAllocationFromSharedHandle
Change-Id: Ia7af1cdd8e3986b8af7c542032d2767303865382
2018-09-03 13:38:19 +02:00
Mateusz Jablonski 92bfd2e3d2 Move OsContext to Device
Change-Id: I030b65372fbdc075423d22720e9da34ac65b8e68
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-09-03 10:42:26 +02:00
Zdunowski, Piotr ad65477868 Fix crash caused by missing residency data.
Change-Id: Ib615e3b13382950ec8ecc128bea0032a126666e0
2018-08-29 12:46:50 +02:00
Dunajski, Bartosz a807b9a90b Initial implementation of Timestamp Packet write
Change-Id: Ic498bcf9795f54fbb5fb5a8d07ed17fa70dc4f1a
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-08-28 08:27:13 +02:00