5ba56690f5
Revert "Set only base values in GT_SYSTEM_INFO for AOT"
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This reverts commit b1f622d700daria.hinz@intel.com >
2022-05-09 12:42:09 +02:00
b1f622d700
Set only base values in GT_SYSTEM_INFO for AOT
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In most cases, there was code redundancy, which was minimized in this change.
The setupHardwareInfoBase extraction will also be used in ocloc.
Signed-off-by: Daria Hinz <daria.hinz@intel.com >
Related-To: NEO-6910
2022-05-04 10:36:26 +02:00
7a324051ef
Clean up headers & cmake files
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Files that were dedicated to specific platforms were incorrectly
attached at the level of the supported gen.
Additionally, header inclusion has been corrected.
Signed-off-by: Daria Hinz <daria.hinz@intel.com >
2022-04-13 16:48:26 +02:00
d70b1a2e2a
Filter L0 Debugger support by platfom
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Related-To: NEO-6678
Signed-off-by: Brandon Yates <brandon.yates@intel.com >
2022-04-13 13:03:40 +02:00
ce645f13b7
Encode PRODUCT_CONFIG value into fatbinary
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Change modifies the encoding entry in fatbinary for platforms.
If numbering in -device is used, the value PRODUCT_CONFIG will be encoded.
The functionality that returns the correct product config values has
also been added.
Related-To: NEO-6744
Signed-off-by: Daria Hinz <daria.hinz@intel.com >
2022-04-11 15:09:17 +02:00
db9c0d1103
Refactor and enable MI_MEM_FENCE programming for DirectSubmission dispatch
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-04-07 12:53:56 +02:00
4fdb0700fe
Disable flush task path on ATS
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Related-To: LOCI-2984
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com >
2022-04-06 02:14:41 +02:00
08e3853982
Debug flag to add extra MI_MEM_FENCE for DirectSubmission
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-03-30 16:07:25 +02:00
174c27eb31
Fix CFEFusedEUDispatch debug flag
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Signed-off-by: Konstanty Misiak <konstanty.misiak@intel.com >
2022-03-28 12:32:05 +02:00
ebc006ad53
Move SBA related WAs logic from CSR to EncodeWA
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Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com >
2022-03-24 12:24:56 +01:00
32b0f7b014
Remove redundant value CsrSizeRequestFlags::numGrfRequiredChanged
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Related-To: NEO-5995
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2022-03-15 15:08:15 +01:00
3eab7009ac
Move SCM related WAs logic from CSR to EncodeComputeMode
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This will help with unifying the logic between APIs and GENs.
Related-To: NEO-6728
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2022-03-11 14:00:53 +01:00
9d4dacacca
Add report of extensions
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cl_intel_subgroup_matrix_multiply_accumulate and
cl_intel_subgroup_split_matrix_multiply_accumulate
Related-To: NEO-6745
Signed-off-by: Lukasz Wesierski <lukasz.wesierski@intel.com >
2022-03-09 17:47:42 +01:00
16f2fbbc37
[9/n] L0 immediate commandlist improvements
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Add HwInfo utility for more fine-grained flush task enablement
Related-To: LOCI-1988
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com >
2022-02-18 19:51:28 +01:00
74cdd60255
[7/n] L0 immediate commandlist improvements
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Enable flushTask only for specific families for now
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com >
2022-02-15 18:43:30 +01:00
02c87fd8b9
Refactor naming around additional PC before NP state command
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Rename:
- debug flag ProgramPipeControlPriorToNonPipelinedStateCommand
to ProgramExtendedPipeControlPriorToNonPipelinedStateCommand
- local variables
Related-To: NEO-6615
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com >
2022-02-11 19:24:14 +01:00
436fd7edce
Add PC before NP state commands on ATS
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Add pipe control before state base address, state compute
mode and state sip commands.
Related-To: NEO-6615
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com >
2022-02-11 12:28:59 +01:00
ff7882bcbe
Add PC before NP state commands
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Add pipe control before state base address, state compute
mode and state sip commands on DG2 and PVC when CCS flow is used.
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com >
2022-02-10 12:06:41 +01:00
4b0d986876
Move AllocationType enum out of GraphicsAllocation class
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-02-04 17:49:09 +01:00
4aef9925b0
Add support for zeDeviceGetP2PProperties
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Related-to: LOCI-2784
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com >
2022-02-01 17:06:43 +01:00
fc25495ecb
Add missing BlitCommandsHelper ULTs
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Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com >
2022-01-28 14:49:04 +01:00
5e238dc7f1
Unify surface state programming logic related to implicit scaling
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OCL image surface state programming for Xe Hp core is now reusing logic
of EncodeSurfaceState helper
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-01-25 09:02:28 +01:00
27c43b27f3
Remove not needed method.
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Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2022-01-20 15:02:19 +01:00
3162c52250
Remove not needed debug variable.
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Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2022-01-19 18:20:44 +01:00
8ebef3769c
Update RENDER_SURFACE_STATE for Xe Hpg
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Program Multi Gpu params in surface state only on Xe Hp Sdv
Respect zero-size image scenario when programming surface state
Move XeHp-only tests to dedicated subdir
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-01-18 21:06:14 +01:00
4238679078
Refactor implicit scaling device support
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Related-To: NEO-6589
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2022-01-18 13:08:43 +01:00
40483acd17
Improve blitter programming
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2022-01-18 10:36:05 +01:00
e5a18177c5
Add unit test helper function to set pipe control hdc flush
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Separate unit test helper definitions bdw_and_later / xe_hp_and_later
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-01-17 15:45:29 +01:00
d9aae805c7
Do not apply L0 debugger WA (Disable L3 cache) for highest DG2 steppings
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Related-To: NEO-6320
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com >
2022-01-17 13:46:40 +01:00
ff79c84115
Correct INTERFACE_DESCRIPTOR_DATA definitions for XeHp and later
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Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-01-14 19:06:55 +01:00
187120f44e
Program Media Sampler DOP Clock Gate Enable on Xe Hp Sdv
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remove skipped tests
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2021-12-30 16:45:40 +01:00
6ab4b566aa
Shift csr factory initialization to shared library
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2021-12-21 18:43:31 +01:00
52f23f9768
Set KMD delay parameter for direct submission
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Related-To: NEO-5845
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2021-12-21 13:13:02 +01:00
82096a5472
Add new KMD delay parameter for direct submission
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Related-To: NEO-5845
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2021-12-17 21:09:37 +01:00
fe250d99b1
Disable L3 caches for debug on ATS and DG2
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Resolves: NEO-6320
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com >
2021-12-14 13:59:09 +01:00
06be26fd1e
Add uuid support using inband information
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Added chipset specific uuid retrieving functionality
This is used by zeDeviceGetProperties
Related-To: LOCI-2636
Signed-off-by: Joshua Santosh Ranjan <joshua.santosh.ranjan@intel.com >
2021-12-10 08:02:33 +01:00
3511b4755f
Remove redundant coherency variables for SCM
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Remove CommandStreamReceiver::lastSentCoherencyRequest
Remove CsrSizeRequestFlags::coherencyRequestChanged
Related-To: NEO-5995
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2021-12-09 14:43:21 +01:00
d07c76c237
unTypedDataPortCacheFlush pipe_control helper support
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2021-12-09 13:00:10 +01:00
2b1aa8b331
Compilation fix: Add missing LrcaHelper types
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2021-12-07 13:19:36 +01:00
68aea5bf62
Rename compression flags and helpers
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2021-12-03 18:09:02 +01:00
47dbe359bf
Add command encoder for store data command
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Related-To: NEO-6262
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2021-12-02 20:56:07 +01:00
263becc3f8
refactor CFE state programming
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2021-11-30 12:51:23 +01:00
995cb88bfa
Improve ftr/wa flags packing
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2021-11-25 16:05:57 +01:00
fb376639ee
Refactor isDirectSubmissionSupported
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2021-11-25 13:40:41 +01:00
29f74a1a98
Rename cmake GEN variables
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2021-11-24 14:42:57 +01:00
de7195d174
Fix fusedEuDispatch programming and minimum wg size
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Related-To: NEO-6455
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2021-11-24 12:16:30 +01:00
7ea0a11c0a
Unify programming of partition registers
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Related-To: NEO-6262
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2021-11-18 16:52:51 +01:00
76b8f6296f
Move noop programming to dedicated encoder
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2021-11-18 10:28:56 +01:00
7bbb43a563
Move sharedSystemMemCapabilities to hwInfo
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
Related-To: NEO-6075
2021-11-17 14:42:05 +01:00
78609cd9f5
Optimize number of calls for pipe control post syncs
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Related-To: NEO-6262
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2021-11-10 18:36:21 +01:00
