07ac0809db
fix: put VRAM regions in the reporting order on xe
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Related-To: NEO-11165
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2024-04-18 22:06:01 +02:00
704ea18ce3
refactor: remove not needed code
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-18 15:38:22 +02:00
da9df9f0e7
Revert "performance: Reuse GPU timestamp instead of KMD escape"
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This reverts commit 9ca2091725
2024-04-18 10:25:15 +02:00
34544c35dc
refactor: add const and virtual to context methods
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Related-To: NEO-10920
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2024-04-17 19:20:03 +02:00
aa26694bad
refactor: remove not needed function
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Related-To: NEO-11160
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-17 10:52:14 +02:00
9ca2091725
performance: Reuse GPU timestamp instead of KMD escape
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Resolves: NEO-10615
Signed-off-by: Morek, Szymon <szymon.morek@intel.com>
2024-04-17 09:39:29 +02:00
15d7a31148
refactor: add separate function to create IoctlHelperXe
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unify ioctl helper xe logic
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-17 08:52:30 +02:00
ca70bb99b2
refactor: reduce the number of DrmAllocation constructors
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Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com>
2024-04-16 15:37:09 +02:00
c2b4699cb6
feature: Add mask of tiles to each memory region in Xe
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* Derive that information from GT list
* Use it to compute local memory size given the mask of tiles to account
for
* Leverage IoctlHelper to dispatch execution (i915 vs Xe)
Related-To: NEO-9754
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2024-04-16 14:22:40 +02:00
a230c762e0
feature: Adjust PATs for dc flush mitigation
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Related-To: NEO-10556
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-04-16 13:31:02 +02:00
5b6acb4f3f
fix: ignore unrecognized topology type in xe path
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Related-To: NEO-11125
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-15 12:16:38 +02:00
ff4a919004
fix: correct gt id in context param engines in xe path
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-15 12:07:48 +02:00
62390d3def
feature: add number of l3 banks to TopologyData
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Related-To: NEO-11125
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-15 11:20:43 +02:00
635d495767
fix: correct gtId when getting path to frequency files in xe path
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Related-To: NEO-11111
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-15 10:44:06 +02:00
27398c2b6f
fix: get timestamp frequency from default engine in xe path
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Related-To: NEO-11111
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-15 10:36:08 +02:00
8a0c425495
feature: Mark selected resources as UC when mitigating dc flush
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Related-To: NEO-10556
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-04-12 12:52:13 +02:00
b5435f7dfe
fix: store queried gt list data in ioctl helper xe
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with this commit we query the info only once
Related-To: NEO-11111
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-12 12:20:34 +02:00
8eb17a843b
fix: correct path to frequency files in xe path
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Related-To: NEO-11111
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-12 11:49:48 +02:00
5e8c71ca3d
refactor: remove not needed members from ioctl helper xe
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-12 11:35:54 +02:00
016529ac12
performance: Set WB cache mode for sysmem
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Related-To: NEO-10867
Signed-off-by: Morek, Szymon <szymon.morek@intel.com>
2024-04-12 09:01:56 +02:00
6a55bbe6cd
feature(sysman): Add pmt support in windows
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Related-To: NEO-8804
Signed-off-by: shubham kumar <shubham.kumar@intel.com>
2024-04-10 12:42:19 +02:00
5288100d86
Revert "feature(sysman): Add pmt support in windows"
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This reverts commit ebf88c92ca
2024-04-09 17:37:41 +02:00
cb2b572e94
feature: add support for null aub mode
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In this mode AUB csr will be created, however, no aub file will be created
Related-To: NEO-11097
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-09 16:59:42 +02:00
52411a1739
fix: Remove unrecoverable_if in IoctlHelperXe
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This method is always called to check if
debugger is enabled.
Signed-off-by: Morek, Szymon <szymon.morek@intel.com>
2024-04-09 09:49:01 +02:00
9568ee47e7
Revert "fix: remove compiler cache legacy implementation"
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This reverts commit 864f42116c
2024-04-09 02:06:51 +02:00
f40449b3e8
performance: revert usm pool chunk alignment
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Revert chunk alignment change (back to 512 bytes) - real cause of issues
was OOB access and need to be investigated by workload owner.
Remove unrecoverable in WddmInterface23 submit to pass errors to upper
layers.
Related-To: NEO-11005
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2024-04-08 18:46:50 +02:00
864f42116c
fix: remove compiler cache legacy implementation
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Related-To: NEO-10679
Signed-off-by: Kapusta, Weronika <weronika.kapusta@intel.com>
2024-04-08 16:40:57 +02:00
1627172e28
feature: add helper to check if device to host copy fence is required
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Related-To: NEO-10417
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-04-08 11:18:44 +02:00
b8d19ccfb5
refactor: Move logic for querying maxMemoryFillPatternSize to product helper
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Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
2024-04-05 09:35:01 +02:00
9468915768
fix: correct preemption support in xe path
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preemption is always supported by xe kmd
Related-To: NEO-10496, HSD-18037744953
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-04 13:29:02 +02:00
ebf88c92ca
feature(sysman): Add pmt support in windows
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Related-To: NEO-8804
Signed-off-by: shubham kumar <shubham.kumar@intel.com>
2024-04-04 11:08:58 +02:00
907129bb33
feature: disable scratch page by default
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Modified default values for disableScratch and gpuPageFault
to true and 10 respectively in drm_neo.cpp, in order to
disable scratch pages by default.
Modified to set gpuPageFault to 0 as a default value when
scratch page is not disabled.
Related-To: GSD-5673
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
2024-04-04 09:50:02 +02:00
420e1391b2
fix: handle not aligned gtt size reported by i915
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when i915 reports gtt size between 47 and 48 bits we consider
it as 48 bit VA space
Related-To: GSD-8215
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-29 07:51:06 +01:00
d6a14d4ed5
feature: support explicit memory locking
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Added lockMemory in context to explicitly locking memory,
Added a boolean flag in graphics_allocation to indicate the allocation
is locked, and modified memory_operations_handler to add lock().
Related-To: NEO-8277
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
2024-03-29 07:31:22 +01:00
2374ffa915
refactor: print errno from mmap and munmap calls
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Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2024-03-28 19:05:54 +01:00
6d945ad28b
fix: Update topology mapping
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Updates topology mapping to handle
case when no dual subslices
Resolves: NEO-10670
Signed-off-by: Jemale Lockett <jemale.lockett@intel.com>
2024-03-28 19:03:05 +01:00
35ca2bbea9
refactor: refactor logic for querying atomic FP capabilities
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- Move logic from product helper to compiler product helper
- Add method for adjusting fp16 and extra capabilities using release
helper (if present).
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
2024-03-28 15:27:45 +01:00
bcaa62bed3
build: refactor linux kernel headers
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Add cmake flags to provide path to headers to drm / i915 /i915 prelim / xe
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-28 14:48:09 +01:00
e3f50e8aa9
Revert "fix: handle not aligned gtt size reported by i915"
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This reverts commit dae901c13f
2024-03-28 12:03:23 +01:00
3b1e6b61e4
fix: remove setting scratch page flag in xe path
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Related-To: HSD-18037680815
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-28 09:16:48 +01:00
dae901c13f
fix: handle not aligned gtt size reported by i915
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when i915 reports gtt size between 47 and 48 bits we consider
it as 48 bit VA space
Related-To: GSD-8215
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-28 08:46:53 +01:00
e435a5cac4
fix: correct timeout for xe user fence
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Related-To: HSD-18037675531
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-28 08:34:24 +01:00
34a80e915c
fix: correct xe kmd flag for bind capture
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Related-To: NEO-10496
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-27 19:37:56 +01:00
2eecf29278
fix: correct setting scratch page in xe path
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Related-To: NEO-10496
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-27 16:44:21 +01:00
b722f3b579
feature: Add interface to bind resources as readonly
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Related-To: NEO-10398
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2024-03-27 14:24:58 +01:00
3914f60c96
refactor: remove not needed hardcoded values in xe path
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Related-To: NEO-10496
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-27 10:58:31 +01:00
8e44a46983
Revert "feature: bind resources as read only"
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This reverts commit f3d36d3350
2024-03-27 08:51:47 +01:00
5b6dd87fc3
refactor: remove not needed hardcoded values in xe path
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Related-To: NEO-10496
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-27 07:21:50 +01:00
0b57b0fb7a
fix: remove invalid hardcoded flags for vm create in xe path
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Related-To: NEO-10496
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-26 21:36:19 +01:00
1f96e6e251
fix: update uapi headers version to 6.8.1
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source of files: https://git.kernel.org/stable/h/v6.8.1
Related-To: NEO-10496
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-26 16:08:32 +01:00
Maciej Bielski