In TBX mode, the host could not write to host buffers after access from device
code due to the lack of a migration mechanism post-initial TBX upload.
Migration is unnecessary with real hardware, but required for TBX.
This patch introduces a new page fault manager type that extends the original
CPU fault manager, enabling automatic migration of host buffers in TBX mode.
Refactoring was necessary to avoid diamond inheritance, achieved by using a
template parameter as the base class for OS-specific fault managers.
Related-To: NEO-12268
Signed-off-by: Jack Myers <jack.myers@intel.com>
Leverage features of the mechanism to simplify implementation:
- The maximum number of possible cache-region reservations is a small
value known at compile-time
- Each reservation is unique (described by `CacheRegion`) so can have
a dedicated entry with either zero (free) or non-zero (reserved) value
So, there is no need for a dynamic collection (unordered_map here) to
keep track of reservations. A simple array is enough for that purpose.
Also, add some helper-code to enable array-indexing with the values of
`CacheRegion` enum.
Related-To: NEO-12837
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
Refactors the STATE_BASE_ADDRESS to align with the latest specification.
Removes redundant functionality for multiple GPU partial writes and
atomics.
Related-To: NEO-13147
Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
This PR handles the situation in which a component
has reserved a front window space for itself in the external heap,
so that the Compute Runtime cannot access this area.
In such a situation, we perform the following steps:
1. reserve 4GB chunk in heapStandard
2. split our chunk into 2 parts: heapFrontWindow, heapRegular
3. from this point on, map all linearStream allocations in reserved 4GB
chunk
Patch applies to Windows and WSL.
Patch only applies when the bindless global allocator is enabled.
Related-To: HSD-16025889919
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
- move available device calculcation into common helper
- change interface to have code available where no descriptor is available
- expand unit test for implementation of new inteface
Related-To: NEO-13350
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
- split the allocation code from command list or kernel
- allow to call allocation code in all parts of the driver
Related-To: NEO-13350
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
Performs minor renaming (mostly capitalization) in order to align with
specification.
Renames L1_CACHE_POLICY to L1_CACHE_CONTROL.
Related-To: NEO-13147
Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
- change additional size into local region size
- change walk order into dispatch walk order to distinguish for local id walk
Related-To: NEO-13350
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
PrintCalculatedTimestamps - print ts in level zero paths
PrintTimestampPacketContents - add logging also to level zero paths
ForceUseOnlyGlobalTimestamps - force using a global ts
Related-To: HSD-14023527252
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
L3 bank count should be queried from KMD
L3 bank size should be queried from device blob
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
This adds abbility to load different versions of the backend
compiler based on underlying device.
Related-To: NEO-12747
Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com>
This adds abbility to load different versions of the backend
compiler based on underlying device.
Related-To: NEO-12747
Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com>
- bitset is 64 bit in size, context ids may go beyond that limit
when multiple devices are available
- this change subtracts contextId of first context for a given root
device - tracked state dirty contexts ids are now zero-based
Resolves: GSD-10025
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
Add a constant to describe minimal size of SyncBuffer object.
Related-To: HSD-18039952263, HSD-18039940553, HSD-18039937640
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
mid thread preemption can be enabled only by ftrWalkerMTP flag
pre-Xe2 devices doesn't support MTP
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
Bartosz Dunajski