Lukasz Jobczyk
0b848a5fdb
fix: Don't use copy buffer rect middle builtin
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-08-27 12:01:58 +02:00
Compute-Runtime-Validation
ad0d6f5435
Revert "refactor: Add dc flush mitigation infrastructure"
...
This reverts commit e4412e385a
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-08-27 02:35:06 +02:00
Lukasz Jobczyk
e4412e385a
refactor: Add dc flush mitigation infrastructure
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-08-26 10:38:56 +02:00
Lukasz Jobczyk
c1a5fb089b
performance: Add copy buffer rect middle builtin
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-08-22 10:30:17 +02:00
Maciej Bielski
a4060013de
refactor: move CLOS-related steps from core- to product-helper
...
Future HW will not support cache reservation uniquely for the whole
platform. Implementation of some functions may vary between products.
Related-To: NEO-10158
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2024-08-12 09:27:04 +02:00
Compute-Runtime-Validation
e27efd701f
Revert "fix: correct calculating max subslice space"
...
This reverts commit 67f2500c03
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-08-02 12:28:13 +02:00
Mateusz Jablonski
67f2500c03
fix: correct calculating max subslice space
...
computeMaxNeededSubSliceSpace is no longer needed as getHighestEnabledSubSlice
already determines maximum index from all enabled subslices
Related-To: NEO-12073
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-08-01 16:38:24 +02:00
Compute-Runtime-Validation
2d1b263e9a
Revert "refactor: remove redundant function computeMaxNeededSubSliceSpace"
...
This reverts commit c0b96dcd6e
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-08-01 03:54:56 +02:00
Mateusz Jablonski
c0b96dcd6e
refactor: remove redundant function computeMaxNeededSubSliceSpace
...
use GfxCoreHelper::getHighestEnabledDualSubSlice instead
Related-To: NEO-12073
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-07-31 14:50:13 +02:00
Jack Myers
f5d00b2616
feature: 2d-block-load-transpose query
...
Implemented device property query API for determining
support capabilities regarding 2d-block-load-tranpose
features for which not all Intel devices support.
Related-To: NEO-11592
Signed-off-by: Jack Myers <jack.myers@intel.com>
2024-07-30 18:21:07 +02:00
Dominik Dabek
9b3ccf73b7
refactor: host usm recycle
...
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2024-07-23 16:20:21 +02:00
Szymon Morek
39ec7facee
performance: use BCS for transfers if CCS is busy
...
Related-To: NEO-11501
Also, if device is iGPU, don't use staging buffers
in that case.
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-07-22 15:36:26 +02:00
Szymon Morek
6a11e8a077
fix: revert changes around zero-copy
...
Related-To: NEO-12018
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-07-19 12:29:18 +02:00
Compute-Runtime-Validation
0cb2a22c55
Revert "fix: correct number of slice count in configureHwInfoDrm"
...
This reverts commit b597f47a70
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-07-19 04:35:03 +02:00
Szymon Morek
33ab962121
fix: adjust compression hint usage for ocl buffers
...
Related-To: NEO-11989
Also, use zero-copy on lnl
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-07-18 18:24:48 +02:00
Mateusz Jablonski
b597f47a70
fix: correct number of slice count in configureHwInfoDrm
...
adjust slice count to proper value based on previously calculated
max slices and max subslice counts
Related-To: NEO-12073
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-07-18 16:54:51 +02:00
Maciej Plewka
85e708819a
fix: Add per product cache line size property
...
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2024-07-18 12:47:47 +02:00
Mateusz Jablonski
1d7ce005d7
refactor: extract common logic from wddm and drm product helpers
...
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-07-17 11:03:02 +02:00
Compute-Runtime-Validation
e3053121cb
Revert "refactor: extract common logic from wddm and drm product helpers"
...
This reverts commit 585caab757
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-07-17 04:53:28 +02:00
Mateusz Jablonski
585caab757
refactor: extract common logic from wddm and drm product helpers
...
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-07-16 11:17:18 +02:00
Mateusz Jablonski
80afda1ac9
refactor: extract common logic of setting kmd notify properties
...
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-07-15 17:58:34 +02:00
Mateusz Jablonski
789a008470
fix: setup proper preemption surface size when forcing builtin SIP
...
when getting SIP kernel from IGC, setup related surface size based on IGC data
Related-To: NEO-8188
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-07-15 15:56:24 +02:00
Compute-Runtime-Validation
9a6403f3bc
Revert "refactor: Add dc flush mitigation infrastructure"
...
This reverts commit d6076941a8
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-07-15 11:47:30 +02:00
Lukasz Jobczyk
d6076941a8
refactor: Add dc flush mitigation infrastructure
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-07-12 14:45:51 +02:00
Compute-Runtime-Validation
38872b7e1b
Revert "refactor: Add dc flush mitigation infrastructure"
...
This reverts commit 1cba900ad9
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-07-04 08:20:18 +02:00
Lukasz Jobczyk
a96f2ea13a
performance: disable blit enqueue on LNL
...
Resolves: NEO-11471
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-07-04 05:41:31 +02:00
Lukasz Jobczyk
1cba900ad9
refactor: Add dc flush mitigation infrastructure
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-06-25 14:53:24 +02:00
Szymon Morek
29e3eb512c
performance: non-usm copy through staging buffers
...
Related-To: NEO-11501
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-06-25 07:18:53 +02:00
Compute-Runtime-Validation
33edd5f10e
Revert "refactor: Add dc flush mitigation infrastructure"
...
This reverts commit bd46361e26
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-06-19 03:48:33 +02:00
Lukasz Jobczyk
bd46361e26
refactor: Add dc flush mitigation infrastructure
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-06-18 14:03:27 +02:00
Lukasz Jobczyk
4ebb668d76
performance: Stop direct submission before removing host ptrs
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-06-03 14:40:55 +02:00
Compute-Runtime-Validation
78eda1e952
Revert "performance: Stop direct submission before removing host ptrs"
...
This reverts commit 7e6a08098b
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-06-03 08:55:35 +02:00
Compute-Runtime-Validation
166cdfedf5
Revert "refactor: Add dc flush mitigation infrastructure"
...
This reverts commit f2d56744e3
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-05-30 03:03:14 +02:00
Lukasz Jobczyk
f2d56744e3
refactor: Add dc flush mitigation infrastructure
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-29 12:13:44 +02:00
Lukasz Jobczyk
a1bd375237
fix: Do not defer MOCS to PAT on xe lpg
...
Related-To: NEO-10556, NEO-11553
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-29 10:49:37 +02:00
Lukasz Jobczyk
7e6a08098b
performance: Stop direct submission before removing host ptrs
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-28 11:43:12 +02:00
Compute-Runtime-Validation
ad2ff7972c
Revert "refactor: Add dc flush mitigation infrastructure"
...
This reverts commit 9dbf83c85a
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-05-23 02:26:17 +02:00
Compute-Runtime-Validation
85d0f2dd63
Revert "performance: Stop direct submission before removing host ptrs"
...
This reverts commit 0977d9e09d
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-05-22 21:00:18 +02:00
Katarzyna Cencelewska
12d1bce6b9
fix: change gmm resource for externalHostPtr
...
Resolves: NEO-10157
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-05-22 16:50:17 +02:00
Lukasz Jobczyk
0977d9e09d
performance: Stop direct submission before removing host ptrs
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-22 13:07:01 +02:00
Lukasz Jobczyk
9dbf83c85a
refactor: Add dc flush mitigation infrastructure
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-22 12:03:06 +02:00
Lukasz Jobczyk
c39b750790
performance: Cache host resources when mitigate dc flush
...
Related-To: NEO-10556
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-21 10:05:29 +02:00
Compute-Runtime-Validation
94a4bbac57
Revert "fix: change gmm resource for externalHostPtr"
...
This reverts commit 63843862df
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-05-21 07:43:53 +02:00
Katarzyna Cencelewska
63843862df
fix: change gmm resource for externalHostPtr
...
Resolves: NEO-10157
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-05-21 00:43:29 +02:00
Dominik Dabek
a236171f0d
performance(ocl): enable device usm alloc reuse
...
Enabling on MTL+
Limited to use max 2% of global device memory.
Related-To: NEO-6893, NEO-11463
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2024-05-17 13:32:45 +02:00
Compute-Runtime-Validation
902b611179
Revert "fix: Fix front end programming for cooperative dispatch"
...
This reverts commit 36ddfaaf4d
.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-05-08 11:14:37 +02:00
Katarzyna Cencelewska
e9f7df6ae6
refactor: create helper for maxPtssIndex
...
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-05-07 12:47:52 +02:00
Young Jin Yoon
07aa53fd87
fix: disable scratch page by default only on PVC
...
Disabled scratch paged by default only on PVC with productHelper.
Related-To: GSD-7742
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
2024-05-01 23:44:48 +02:00
Bartosz Dunajski
53f436095e
refactor: pass hwInfo to getSupportedLocalDispatchSizes
...
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-04-25 15:20:03 +02:00
Lukasz Jobczyk
36ddfaaf4d
fix: Fix front end programming for cooperative dispatch
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-04-25 12:55:46 +02:00