5bc98718b9
Add support for device allocation on Windows
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Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com >
2021-12-02 12:26:47 +01:00
fe08216102
Refactor: Update Drm::createDrmContext
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2021-12-01 17:04:09 +01:00
ce5f9c2214
Rename LocalMemoryHelper to IoctlHelper
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Related-To: NEO-6472
This helper class is not used only for local memory.
IoctlHelper is more appropriate.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2021-12-01 14:34:21 +01:00
caaa918705
Add missing maybe_unused keywords
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2021-12-01 12:59:17 +01:00
fa16cbceb9
Change size calculating for scratch on dg2
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Also add proper init for SliceInfo on Linux
Resolves: NEO-6449
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2021-12-01 12:36:41 +01:00
3218b784e8
Add override for gfxPartitionLayout in WSL DG1 path
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Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com >
2021-12-01 10:29:27 +01:00
e368e6c20b
Move free function to DrmMemoryManager
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Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2021-11-30 14:55:18 +01:00
383daf9dbe
Revert "Change size calculating for scratch on dg2"
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This reverts commit adc3ab5f24compute-runtime-validation@intel.com >
2021-11-30 04:22:55 +01:00
adc3ab5f24
Change size calculating for scratch on dg2
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Resolves: NEO-6449
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2021-11-29 14:07:38 +01:00
12777bd758
Move MemoryInfoImpl logic to MemoryInfo
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Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2021-11-29 13:13:11 +01:00
152ee4a627
Sysman Fix Multithread Access for zesMemoryGetState
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Signed-off-by: Joshua Santosh Ranjan <joshua.santosh.ranjan@intel.com >
Related-To: LOCI-2727
2021-11-27 02:35:46 +01:00
2319a56557
Move SystemInfoImpl logic to SystemInfo
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Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2021-11-25 19:05:35 +01:00
995cb88bfa
Improve ftr/wa flags packing
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2021-11-25 16:05:57 +01:00
fb376639ee
Refactor isDirectSubmissionSupported
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2021-11-25 13:40:41 +01:00
23f7a908d7
Add query system info on linux
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Source location of DRM_I915_QUERY_HWCONFIG_TABLE
and modified intel_hwconfig_types.h:
https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/tree/intel/IGTPW_6061/
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2021-11-24 17:38:15 +01:00
2e68f0abbd
lint revision update
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Related-To: NEO-6441
Signed-off-by: Grzegorz Choinski <grzegorz.choinski@intel.com >
2021-11-23 12:50:25 +01:00
31b339b873
Use VM Bind immediate when page faults supported
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Related-To: NEO-6355
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2021-11-22 18:11:18 +01:00
c4e802f01b
WSL - fixing resource cleanup on process shutdown
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Resolves issues with coexistance of NEO L0 and NEO OCL libraries
within a single process running in WSL and using WDDM GPU PV
Signed-off-by: Jaroslaw Chodor <jaroslaw.chodor@intel.com >
2021-11-20 21:51:51 +01:00
91dfa5c2ac
Initial DG2 support
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2021-11-19 10:01:29 +01:00
b8aa2871bd
Add mock function to check for page fault support
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Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2021-11-18 17:46:41 +01:00
49d1e04800
Revert "Disable render compressed buffers on xehp"
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This reverts commit 60787ef586compute-runtime-validation@intel.com >
2021-11-18 14:50:08 +01:00
4426d9d971
Remove getSharedSystemMemCapabilities from hwInfoConfig helper
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
Related-To: NEO-6075
2021-11-17 16:35:52 +01:00
60787ef586
Disable render compressed buffers on xehp
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Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2021-11-17 13:09:59 +01:00
3cf2e2e395
Use drm tip kernel headers as default 2/2
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Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2021-11-15 17:16:54 +01:00
4bd31de0f4
Moved query function to another cpp module
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Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2021-11-15 12:43:24 +01:00
bc4c64b095
Add unit test for query page fault support
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Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2021-11-15 10:33:51 +01:00
8cf3e8ca94
Improve control of explicit residency flag
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Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2021-11-09 10:54:00 +01:00
1186c1aae3
zesSysmanDeviceReset: Reinitialize device after device reset
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Before performing gpu device reset, first all level zero resources
and gpu device specific resources have to be cleaned up. Also as
after device reset, state of gpu device would be lost.
Hence after performing gpu device reset, level zero device have
to be reinitialized by querying gpu device again.
This change is aimed at reinitializing the level zero resources
after gpu device reset, so that user could continue using level zero
devices after device reset.
Related-To: LOCI-2627
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com >
2021-11-07 23:43:48 +01:00
8fdfc3b053
Use drm tip kernel headers as default 1/2
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Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2021-11-04 15:27:02 +01:00
ca4af1dde1
Add helpers for page fault support
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Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2021-11-03 13:39:38 +01:00
95610188af
Fallback to cpu copy when filling work partition allocation
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move some command stream receiver tests to shared
Related-To: NEO-6325
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2021-11-03 12:17:02 +01:00
c5d403d65a
Compile DG1 and XE_HP_SDV by default
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Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2021-11-03 09:31:46 +01:00
4ea452040d
Defer direct submission control until first submit
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2021-10-29 14:27:25 +02:00
782a287b27
Revert "Fallback to cpu copy when filling work partition allocation"
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This reverts commit 93e3d948f5compute-runtime-validation@intel.com >
2021-10-29 04:39:22 +02:00
93e3d948f5
Fallback to cpu copy when filling work partition allocation
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move some command stream receiver tests to shared
Related-To: NEO-6325
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2021-10-28 14:30:00 +02:00
3a2b018eb6
Enable blitterOperationsSupported on DG1
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2021-10-28 14:16:19 +02:00
32592d953b
Enable DG1 by default
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Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2021-10-27 19:52:23 +02:00
6769df2f5d
refactor regex when scanning pci paths
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2021-10-27 10:33:58 +02:00
4b7811d061
WSL - fixing alignment for 32bit path
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Signed-off-by: Jaroslaw Chodor <jaroslaw.chodor@intel.com >
2021-10-26 21:04:55 +02:00
bb6ed003e8
Don't use VM when ppGTT is invalid/unassigned
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Signed-off-by: Jan Beich <jbeich@FreeBSD.org >
2021-10-26 14:25:11 +02:00
83b099a48c
improve pci path search to use regex to make it more flexible
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Related-To: NEO-6364
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2021-10-26 07:49:22 +02:00
ee942190ab
Revert "improve pci path search to use regex to make it more flexible"
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This reverts commit dbffbbd193compute-runtime-validation@intel.com >
2021-10-25 22:15:31 +02:00
dbffbbd193
improve pci path search to use regex to make it more flexible
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Related-To: NEO-6364
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2021-10-25 15:20:04 +02:00
71ed3eba16
Add mapping based colouring
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2021-10-25 09:51:54 +02:00
1f2aa82c5b
Remove UNUSED_VARIABLE macro
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2021-10-22 18:56:33 +02:00
d1ca9b1dd7
Remove not used method
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2021-10-22 18:10:38 +02:00
d2a29ce458
DrmBO: canonize GPU addresses
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Related-To: NEO-6364
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2021-10-21 18:25:48 +02:00
28b37aea72
Correct handling unique_ptr in functions
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2021-10-21 18:17:14 +02:00
275ec1118e
break friendship between DrmMM and DrmBO
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Related-To: NEO-6364
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2021-10-21 15:09:57 +02:00
405fb760a7
Include domain when ordering with ZE_ENABLE_PCI_ID_DEVICE_ORDER (3)
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Fix for VA sharing.
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com >
2021-10-21 10:46:27 +02:00
