Media
/
compute-runtime
mirror of https://github.com/intel/compute-runtime.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
2,592 Commits 36 Branches 610 Tags 177 MiB
Commit Graph

121 Commits

Author SHA1 Message Date
Dunajski, Bartosz 4b592b2520 Don't take BCS path when Queue is blocked 
Change-Id: Ie6faa276ce1173ce075693bc81d1e91d1ace27fc
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
 2019-06-18 15:31:53 +02:00
Dunajski, Bartosz bea67a8bb3 Move queue dependency clearing query to helper method 
Change-Id: I0859d7f855020979b27ba5ee31c59cc8a7bd3f7a
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-06-13 15:04:18 +02:00
Dunajski, Bartosz 70f92cf03c Rename KernelCommandsHelper to HardwareCommandsHelper 
Change-Id: I0b92a2d74bc96658274e4a02fec0f322e87681b2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-06-12 13:45:12 +02:00
Milczarek, Slawomir 8e210941f8 AUB subcapture to work with multi CSRs 
Related-To: NEO-2747

Change-Id: I2149cafb59bd1a6374da140e3f7e76a4cb3bb417
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-06-05 10:52:05 +02:00
Milczarek, Slawomir 583d4d4c6c Add clearAllDependencies parameter to obtainNewTimestampPacketNodes 
The capability to clear Timestamp packet dependencies from command queue.

Related-To: NEO-2747

Change-Id: Id3812539a47b96e23d0b8b17b9b8f54878ee2ef2
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-05-24 12:29:49 +02:00
Milczarek, Slawomir 10d87404b6 AUB with kernel names in case of kernel split 
Related-To: NEO-2747

Change-Id: I49d3e4716db4634da6744fe91ecfb0763f67722a
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-05-07 10:14:32 +02:00
Piotr Fusik 603eee76e5 Use GPU pointers for HwPerfCounter. 
Related-To: NEO-2872

Change-Id: Ia30f2ee0d96a3da05b8e5ecf55e9b7fb5a34ace7
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-04-18 16:28:48 +02:00
Piotr Fusik 086ef7c461 Simplify code by introducing TimestampPacketStorage::Packet. 
Related-To: NEO-2872

Change-Id: Ifce455f1a48f2db2bf16af2dd32208ee4542204d
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-04-18 16:14:04 +02:00
Milczarek, Slawomir c6247873f5 Add comments with kernel names to AUB files 
Related-To: NEO-2783

Change-Id: Ib00e969b106301d712dc4c14af8208456bcabdb3
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-17 14:56:24 +02:00
Piotr Fusik 745c20c78a Rename TimestampPacket to TimestampPacketStorage. 
Related-To: NEO-2872

Change-Id: Id1f78491912c44890ae7ead2cac12ec8eb073628
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-04-16 15:34:28 +02:00
Mrozek, Michal 50270d74f7 Force blocking when device enqueue requires aux translation. 
Change-Id: Ia1af6d8d3f18fc0a40994ffe10d50573b884345c
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-15 16:13:35 +02:00
Maciej Plewka da19e924f5 Add events support for cache flushes 
Related-To: NEO-2536

Change-Id: Iea9e9b08df0225ce5a126ab950621576b3880bbe
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-04-15 15:44:25 +02:00
Mrozek, Michal 9ae29ecfc8 Move unrecoverable. 
Change-Id: Ia8460ac7d9acdd9e4180ab4b87d2adb18699a8a8
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-10 11:44:03 +02:00
Maciej Plewka 4eb48e3d06 Add function to flush caches 
Related-To: NEO-2536

Change-Id: Ifbf7e7a42514dd66eb0914f9d13407287481e123
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-04-05 09:48:50 +02:00
Mrozek, Michal 4cb060fc46 Remove not needed code. 
Change-Id: Idcbc53f22cc3a3f1c3acb4b2a620372d6102b12b
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-03 12:17:53 +02:00
Maciej Dziuban 68311588e6 Delete CommandQueue argument from dispatchScheduler 
Change-Id: Icbda4d6887d7f0001e3081aef1fa69edc1169782
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-04-01 11:13:37 +02:00
Maciej Plewka 9e52684f5b Change namespace from OCLRT to NEO 
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-26 15:48:19 +01:00
Liwei Wang ca4b47f7f4 Add support of GPU preemption (v1.00). 
https://github.com/intel/compute-runtime/pull/119

Change-Id: I3134d62b66751c8621b80002373a7a9b198e044e
 2019-03-22 08:49:11 +01:00
Koska, Andrzej fcdfcb3fc4 Pass enqueued values to enqueueHandler 
Change-Id: I991818657c7cafaf8911ce711a87a6c7b4531517
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
 2019-03-13 11:23:37 +01:00
Maciej Plewka e53a8e8709 Add postSyncAddress to flush after walker 
Change-Id: I7fdfaf8e0acc365998cc74306ab715ea3d9c7d72
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-04 14:47:53 +01:00
Mateusz Jablonski 6fb28dd828 Refactor GraphicsAllocation class 
move most of members to protected section
merge related members into structs

Change-Id: Ief2e092aa5e61ca6f13308f9d9b1937ea6c913b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-28 14:09:11 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes 
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 11:50:07 +01:00
Dunajski, Bartosz 4597759a65 Dont inherit TimestampPacket from Waitlist when doesnt exist 
Change-Id: I12b184353243f99ec7bacdf2dcd9da1ba09e3516
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-27 09:15:48 +01:00
Maciej Dziuban 0cf71414e2 Pass command stream to dispatch scheduler 
instead of taking it from CommandQueue

Change-Id: I8e43c3b7ed5cb46f79edf3290a84fc6ad41f3b57
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-25 14:35:19 +01:00
Mrozek, Michal 1ae92e995a Extract some code blocks to dedicated methods. 
Change-Id: I9e47631367b95ce4ff5479c463a3cb5085b66315
 2019-02-22 15:12:45 +01:00
Mrozek, Michal e4bffaa194 Route all enqueue without kernel calls directly to enqueueHandler. 
Change-Id: I4c4ab013ff9adbe0e32e2661b3091f319d36c9c3
 2019-02-22 14:19:22 +01:00
Zdanowicz, Zbigniew 51d34da7ec Add multiEngineQueue field to DispatchFlags and modify interfaces 
Change-Id: Iaa4754a22e9b88201aed7df01c7d6e5fd06c84a9
 2019-02-14 17:12:15 +01:00
Venevtsev, Igor 5e8fb19e5d Remove OCL Events concept from EnqueueOperation and dispatchWalker 
Change-Id: Iec55b0be673a2a40b9621212add224a33d4abc5d
 2019-02-12 08:46:18 +01:00
Dunajski, Bartosz dc181defba Use GpuAddress for TimestampPacket programming 
Change-Id: I1303605c33e2e0267a1716e12a0bfcb341fcfbd7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-11 15:31:17 +01:00
Venevtsev, Igor 66e3f3c16c Remove OCL Events concept from command stream receiver 
Change-Id: I4d5a97b41efe601c92c2f3f33e9e24bb7d4fa3d2
 2019-02-08 15:02:40 +01:00
Kamil Diedrich e1eab521e7 use release for cl-objects instead of delete 
- fix for data race in events
- modification of the addition child event

Change-Id: I6ea3a413f13f13a91d37d20d8b9fad37d0ffafb9
 2019-02-05 14:09:32 +01:00
Filip Hazubski d30cc221df Update disabling caching for a resource 
Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-01 10:50:21 +01:00
Stefanowski, Adam 1001f76085 Add logic for Events in multi-thread scenario 
- inc refCount when enqueue is blocked and dec after flushing

Change-Id: I9e8f8d226897124a7e51f2473939d53868bef7a2
 2019-01-14 19:45:26 +01:00
Kamil Diedrich fad2f8dbd1 Change auxTranslationDirectory 
Change-Id: I5d433d340e945b799dbec25a22fd610312f00c0a
 2018-12-28 16:46:42 +01:00
Artur Harasimiuk b5f443edc0 Revert commit cc1f4bed60. 
This reverts commit cc1f4bed60.
Revert "Revert "Use GPU instead of CPU address in programming commands
for HwTim(...)""

Change-Id: Iff122612bb46ba80bcc70b07b2609bfd5f0b9653
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 13:25:49 +01:00
Pawel Wilma cc1f4bed60 Revert "Use GPU instead of CPU address in programming commands for HwTim(...)" 
This reverts commit 6202b2222b.
"Use GPU instead of CPU address in programming commands for HwTimeStamps"

Change-Id: I085382d95538ae41068a21c628d606039bf9cdf0
 2018-12-21 01:16:46 +01:00
Kamil Diedrich 4b1871bf0e Add pipe control before and after buffer translation 
Change-Id: I4ee32c410e1ac2bcdb3ceae203cd461de79146a5
 2018-12-20 09:30:53 +01:00
Kamil Diedrich b2e0195663 Change Buffer to MemObj in BufferForAuxTranslation collection 
Change-Id: Icbdb8fecaa3fd8e19e993502f59c76156fe4ad2c
 2018-12-19 08:05:51 +01:00
Piotr Fusik e8a71132a4 Remove unnecessary casts. 
Change-Id: I2d293d065c7efa006efe7d60a625cba0c6116c86
 2018-12-18 13:42:14 +01:00
Dunajski, Bartosz 010e1a4738 VFE state programming cleanup 
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-13 17:44:40 +01:00
Pawel Wilma 6202b2222b Use GPU instead of CPU address in programming commands for HwTimeStamps 
Change-Id: If9ab4cbd052dfa46b5d901073df4c583c2ae361f
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-12-12 13:27:53 +01:00
Dunajski, Bartosz 481b83b436 Add throttle hint to unblocked enqueue path 
Change-Id: Id24e00f0f797d6245e897ba4e709d42f2ef0f5e8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-07 14:13:31 +01:00
Piotr Fusik 87bb6afa56 Move stamps allocators from memory manager to CSR. 
Change-Id: Ib399e462cdddad89fcc470df4c4f0f5e4591a6b2
 2018-11-27 14:52:06 +01:00
Dunajski, Bartosz 2d77b86e70 Allow Device creating multiple CSRs [5/n] 
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 14:25:04 +01:00
Dunajski, Bartosz 3ad33bf1b8 Allow Device creating multiple CSRs [3/n] 
Add CSR from Device to CommandQueue

Change-Id: Iaccf3c73d25e357242837677777d0513e81f520e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-23 10:51:34 +01:00
Dunajski, Bartosz d6870a896b Reduce tag pool size to 1 for AUBs 
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-20 11:42:32 +01:00
Piotr Fusik 76efeae9d8 Pass more information to programPipelineSelect. 
Change-Id: Iaabe60742269b721f8defe71306dd6e87d60d546
 2018-11-15 11:45:45 +01:00
Dunajski, Bartosz e0f782e77a Improve TimestampPacketWriteEnabled condition check 
Change-Id: I2117dbd7841e65ed87241c0b08fafe058019b690
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-13 13:40:33 +01:00
Dunajski, Bartosz 1e0064fc2f Allow ULTs to work with enabled TimestampPacketWrite 
Change-Id: Idd4622469220b859e8724d9179837c685377ce52
 2018-11-07 08:50:04 +01:00
Woloszyn, Wojciech 549b73510c Flush L3 for reduced address space platforms 
Change-Id: I5a73e72f8e309137328930920ab174ba6f1378dc
 2018-11-06 14:26:59 +01:00