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317 Commits

Author SHA1 Message Date
Dunajski, Bartosz 8263d488c6 Submit Semaphore dependency for enqueue read/write without Kernel 
Change-Id: I22e1743b4cbd6e8285527fdfe25424a6cb3ff462
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
 2019-06-25 14:21:57 +02:00
Venevtsev, Igor 165d1e4e55 Use GfxPartition for GPU address range allocations 
[2/n] - OsAgnosticMemoryManager

Related-To: NEO-2877

Change-Id: I887126362381ac960608a2150fae211631d3cd5b
Signed-off-by: Venevtsev, Igor <igor.venevtsev@intel.com>
 2019-06-25 12:54:20 +02:00
Filip Hazubski a9b8c07293 Update enqueueKernel 
Return CL_INVALID_GLOBAL_WORK_SIZE error if global_work_size contains 0 for
OpenCL older than 2.1
Do not throw exception if global_work_size contains 0

Related-To: NEO-3111

Change-Id: If7b7884465117d9c0615ace2bb682b3b1c7d8bdb
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-06-19 15:28:39 +02:00
Mrozek, Michal 2e8e625024 [5/n] Unified Shared Memory 
- Add kernel support for host um allocations
- During make resident call choose only appropriate resources for residency
- change resource types to binary bit friendly values
- enhance memory manager to only make resident compatible types

Related-To: NEO-3148

Change-Id: Ic711a4425a0d8db151a335e0357440312dc09b7e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-06-17 15:47:30 +02:00
Mrozek, Michal be48b56732 Kernel refactor. 
- Change function names to indicate they work on SVM allocations.
- Remove one function used only in tests.

Change-Id: I9b18d9fee3d4f2a46a7f458ca73d39b3863ce6d3
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-06-14 10:27:21 +02:00
Jobczyk, Lukasz 329d940285 Add multiStorageResource flag to AllocationProperties 
Related-To: NEO-3242

Change-Id: If31adaead389acd3bef6af1931b91396c43b305e
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-06-14 06:59:28 +02:00
Mrozek, Michal 4188f6dce8 [1/n] Unified Shared Memory 
- Add Internal Allocation type to differentiate SVM allocs from UM allocs.
- Add API to make internal allocations resident.
- Add API to allocate UM.

Related-To: NEO-3148

Change-Id: I9787891c5a0ffccac45c43bc5fde4ea50f37d703
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-06-13 14:48:02 +02:00
Milczarek, Slawomir 8998f89886 HostPtr allocation with life time of image object for CL_MEM_USE_HOST_PTR 
Related-To: NEO-3231

Change-Id: I4869e55b3c4b5217c83cc0b53d8c9f8c14b524b2
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-06-13 10:35:48 +02:00
Koska, Andrzej 9be74b5f3e Replace imageRowPitch with imageSlicePitch 
Related-To: NEO-2665
Replace imageRowPitch with imageSlicePitch
  for read/write CL_MEM_OBJECT_IMAGE1D_ARRAY
Change-Id: I0d5931629571f538f242e112c502e2f798ffd896
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
 2019-06-12 21:06:32 +02:00
Dunajski, Bartosz 70f92cf03c Rename KernelCommandsHelper to HardwareCommandsHelper 
Change-Id: I0b92a2d74bc96658274e4a02fec0f322e87681b2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-06-12 13:45:12 +02:00
Koska, Andrzej d11e61b5ee Revert "Replace imageRowPitch with imageSlicePitch" 
This reverts commit 4a49e7396a
Related-To: NEO-3265
Change-Id: Ia521f850e10bea174db282bd2de68ff626aea943
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
 2019-06-06 08:15:26 +02:00
Milczarek, Slawomir 8e210941f8 AUB subcapture to work with multi CSRs 
Related-To: NEO-2747

Change-Id: I2149cafb59bd1a6374da140e3f7e76a4cb3bb417
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-06-05 10:52:05 +02:00
Koska, Andrzej 4a49e7396a Replace imageRowPitch with imageSlicePitch 
Related-To: NEO-2665
Replace imageRowPitch with imageSlicePitch
  for read/write CL_MEM_OBJECT_IMAGE1D_ARRAY
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
Change-Id: I67bd0567dcee05027f3d25ef65796e332b9a4773
 2019-06-04 22:54:07 +02:00
Dunajski, Bartosz ab8e3e472f Remove redundant cpuCopyAllowed flag 
Change-Id: I8609af0c64d408b87a54d9ac082de7dd0cc83a79
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-30 13:15:23 +02:00
Jaime Arteaga b98b51b0d9 Move ptr.h to core folder 
Change-Id: Icf0db7c767b2b1ea44fccc02b135f0f6c1f78c8f
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2019-05-29 00:11:34 -07:00
Maciej Plewka f2a8fc7ea9 Print_formatter refactor 
Change-Id: Icb03697281b009c853d91a63d5d21ffcde545a8f
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-05-23 21:37:50 +02:00
Koska, Andrzej 3d3e6b9531 Testing enqueueSVMMemcpy with host pointer 
Related-To: NEO-3011
Change-Id: I179089e078361dd2449f78e75f1d6edd3f5235de
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
 2019-05-23 09:47:29 +02:00
Koska, Andrzej fa3d4f39f4 Enabling clEnqueueSVMMemcpy between SVM and host pointer 
Related-To: NEO-3011
Change-Id: I89aad599d7238ea2d319a4b1c72dffea2dba952b
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
 2019-05-20 09:10:56 +02:00
Hoppe, Mateusz 4d9db473a0 Skip ZeroSizeEnqueueHandlerTest SVM tests when ftrSVM == false 
Related-To: NEO-3157

Change-Id: I807dbe8a71faff6df5244a43a6451b00eb5a02c3
Signed-off-by: Hoppe, Mateusz <mateusz.hoppe@intel.com>
 2019-05-15 11:12:32 +02:00
Mateusz Jablonski b8fb5e683b Move basic_math.h and vec.h to core directory 
Change-Id: I143b7af450ff48d4958b4bc7137b393a2dc0eb64
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-05-14 21:32:55 +02:00
Filip Hazubski 8f17c70e9e Remove CommandQueueHw::requiresCacheFlushAfterWalkerBasedOnProperties 
Change-Id: Ibdc6f7b883bfef471926a4351ed7437173c4a6a6
Related-To: NEO-2535
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-05-14 17:31:53 +02:00
Hoppe, Mateusz 2b09ed85d6 Run EnqueueSvmMemFillTest only when SVM is supported 
Related-To: NEO-3157

Change-Id: I29d1a0bd99cef4644c31d896ff2dfe96a5fee81c
Signed-off-by: Hoppe, Mateusz <mateusz.hoppe@intel.com>
 2019-05-14 12:24:45 +02:00
Hoppe, Mateusz f6dfa1ac9d Skip EnqueueSvmTest / EnqueueSvmTestLocalMemory when SVM unavailable 
Related-To: NEO-3157

Change-Id: Icc1b2f4be099f4295c441a9042a004b314fef0b0
Signed-off-by: Hoppe, Mateusz <mateusz.hoppe@intel.com>
 2019-05-13 14:14:59 +02:00
Milczarek, Slawomir cc6a94b5b6 Fixed TBX with AUB dump mode without AubStream 
Related-To: NEO-3150

Change-Id: I9ee7fc3c44f3021c61db7c27c01522cbe7d7445d
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-05-10 14:23:17 +02:00
Dunajski, Bartosz 0f87e9aa1a Rename HardwareInfo members 
Change-Id: I85f56b677bafdd75dd958b488522393fc18b68af
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-09 09:13:55 +02:00
Dunajski, Bartosz bb80d327c7 Move HardwareInfo ownership to ExecutionEnvironment [1/n] 
Change-Id: I5e5b4cc45947a8841282c7d431fb69d9c397a2d4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-08 16:11:01 +02:00
Milczarek, Slawomir 10d87404b6 AUB with kernel names in case of kernel split 
Related-To: NEO-2747

Change-Id: I49d3e4716db4634da6744fe91ecfb0763f67722a
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-05-07 10:14:32 +02:00
Mrozek, Michal c269bc062f Limit overestimation in multi kernel scenarios. 
- There was overestimation that resulted in each kernel getting
page aligned estimation size.
- After this change every kernel aligns only to cache line and final
size is aligned to page size.

Change-Id: Iee06bdd0083724ea7e9415f3d0fe70198acca407
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-23 17:46:53 +02:00
Filip Hazubski fae1d882f8 Add SvmAllocationProperties 
Change-Id: Ie96aeab5597a1b3f2db8611a8a04597516730ce8
Related-To: NEO-2535
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-04-23 10:30:04 +02:00
Milczarek, Slawomir 1bf263f061 AUBDumpAllocsOnEnqueueReadOnly to not activate in path with map image 
Related-To: NEO-2717

Change-Id: Ida017557a58533323a214c59febfd8794ef4cf17
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-19 13:09:56 +02:00
Zbigniew Zdanowicz 0c6823afd6 Add map allocation for images 
Related-To: NEO-3097

Change-Id: I5bfd89fd597a8d55597ff7a2aa05b2abd278d5bd
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-04-18 14:46:06 +02:00
Milczarek, Slawomir c6247873f5 Add comments with kernel names to AUB files 
Related-To: NEO-2783

Change-Id: Ib00e969b106301d712dc4c14af8208456bcabdb3
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-17 14:56:24 +02:00
Venevtsev, Igor 2ca97d3881 Introduce MemoryManager::getExternalHeapBaseAddress() 
Related-To: NEO-2877

Change-Id: I4307224c3be9609f7fc60d7fcb4f91ccdc8a9883
Signed-off-by: Venevtsev, Igor <igor.venevtsev@intel.com>
 2019-04-16 13:30:10 +02:00
Milczarek, Slawomir 1b7014e10c AUBDumpAllocsOnEnqueueReadOnly to not activate in path with map buffer 
Related-To: NEO-2717

Change-Id: I7999928e23f8d9cb4a88978ec44e4615eebb97b6
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-15 17:27:53 +02:00
Mrozek, Michal 50270d74f7 Force blocking when device enqueue requires aux translation. 
Change-Id: Ia1af6d8d3f18fc0a40994ffe10d50573b884345c
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-15 16:13:35 +02:00
Maciej Plewka da19e924f5 Add events support for cache flushes 
Related-To: NEO-2536

Change-Id: Iea9e9b08df0225ce5a126ab950621576b3880bbe
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-04-15 15:44:25 +02:00
Piotr Fusik dd4b3a9f14 Simplify HwTimeStamps operations. 
Related-To: NEO-2872

Change-Id: Id8e49082b88d7233b9d3ceb9074ce093c100ec14
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-04-15 10:51:09 +02:00
Zbigniew Zdanowicz 971cbd55f3 Add new SVM types 
Related-To: NEO-2917

Change-Id: Ica127129799c1e617a326a110348c2f70160b15c
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-04-11 15:27:38 +02:00
Zbigniew Zdanowicz e201725dd5 Add dedicated map allocation 
Related-To: NEO-2917

Change-Id: Ieeca40f5faf29433a5c464d2c3ca3b8910695a9b
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-04-09 16:16:31 +02:00
Mateusz Jablonski 91a64c8518 Fix locking resource logic for enqueue read/write buffer call 
Change-Id: I261ed4904d617a2f4600ea2a5ec7fd34f534c191
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-04-09 13:16:59 +02:00
Mrozek, Michal 794fba189e Remove code. 
Change-Id: I7e578ab0bc7e490520159bfaa4f8f193db40b23e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-08 14:07:49 +02:00
Maciej Plewka d0abc34d97 Add override annotate to isCacheFlushCommand mock 
Related-To: NEO-2536

Change-Id: If006b53481d34df1348aa795520cc2a7d4002fd7
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-04-08 10:14:37 +02:00
Maciej Plewka 4eb48e3d06 Add function to flush caches 
Related-To: NEO-2536

Change-Id: Ifbf7e7a42514dd66eb0914f9d13407287481e123
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-04-05 09:48:50 +02:00
Mrozek, Michal 387fdc5682 Make sure that timestamp is properly connected to mapBuffer event. 
Related-To: NEO-2317

Change-Id: I607211e9e8bb05e0c4103a10087c10f6959f2008
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-04 11:36:06 +02:00
Filip Hazubski b2e16b7897 Update allocationForCacheFlush method 
Related-To: NEO-2535

Change-Id: Ia24556814188263e2ebb54b6419feddd5d8ed707
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-04-03 18:07:13 +02:00
Mateusz Jablonski f76c0e84fb Don't copy compressed buffer on CPU 
Change-Id: I9c36ee8f23284286bb846fd9a0fd196733d0f8f9
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-04-03 13:15:41 +02:00
Mrozek, Michal 4cb060fc46 Remove not needed code. 
Change-Id: Idcbc53f22cc3a3f1c3acb4b2a620372d6102b12b
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-03 12:17:53 +02:00
Mateusz Jablonski f3d17008ee TransferProperties: lock resource only when transfer on CPU is requested 
Change-Id: Ic93b4fd438e75f5d54cbae9bec332c4b18c6b1ee
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-04-01 14:02:49 +02:00
Jobczyk, Lukasz a025dc6985 Reverse logic of creating Memory Manager - part 6 
-Remove a redundant condition from the MemoryManager constructor

Change-Id: I4b6c56f30a19e77a7a20f68c6d85516aaa52d102
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-04-01 10:27:29 +02:00
Mateusz Hoppe 4296588aa9 Use GPU address to compare with SurfaceBaseAddress in ULTs 
- remove redundant casts

Change-Id: I175801869f24be47dc6703b61bf26c0f8a1c77c6
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-26 20:49:54 +01:00