Commit Graph

2096 Commits

Author SHA1 Message Date
ec40b6562e Add unit tests for completion fence
Related-To: NEO-6575

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-20 21:15:34 +01:00
570c4d4626 Correct comments and bitfield ranges in Render Surface State definition of Xe Hp
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-20 17:55:27 +01:00
8e03ce9c54 Correct programming of horizontal alignment on Xe Hp
for linear surfaces we should program value of 128

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-20 16:41:22 +01:00
fbc0666d1b Move setGrfInfo from HardwareCommandsHelper to EncodeDispatchKernel
unify grf info programming across APIs

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-20 15:42:06 +01:00
27c43b27f3 Remove not needed method.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-01-20 15:02:19 +01:00
6082865eb4 Revert "Optimize Level Zero indirect allocations handling."
This reverts commit 3ecbc55ba9.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-20 11:41:13 +01:00
c79b8f0e90 Correct programming of horizontal alignment on Xe Hpg
for linear surfaces we should program value of 128

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-20 11:08:04 +01:00
dfe23a08b2 Update RENDER_SURFACE_STATE for Xe Hp
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-20 10:53:54 +01:00
d44f3009b8 Add interface for user fence extension
Related-To: NEO-6575

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-19 19:58:22 +01:00
1b7949432f Add shareable allocation on windows dGPUs
Add default initialization for object members

Related-To: LOCI-2665

Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2022-01-19 19:03:18 +01:00
b75f5d4c8b Add debug flag ForceExtendedBufferSize
Forces extended buffer size by adding pageSize specify by number when
debug flag is >=1 in:
- clCreateBuffer
- clCreateBufferWithProperties
- clCreateBufferWithPropertiesINTEL

Usage:
ForceExtendedBufferSize=2
size += (2 * pageSize)

Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2022-01-19 18:52:10 +01:00
3162c52250 Remove not needed debug variable.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-01-19 18:20:44 +01:00
5cd76aef6a Refactor surface state programming, add enum value for default halign value
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-19 14:31:28 +01:00
3ecbc55ba9 Optimize Level Zero indirect allocations handling.
Make them resident directly instead of populating residency container
Remove finds, not needed, CSR resolves duplicates at makeResident calls
Observed gain is 32x for 10k indirect allocations.


Co-authored-by: Michal Mrozek <michal.mrozek@intel.com>

Co-authored-by: Dominik Dabek <dominik.dabek@intel.com>

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-01-19 13:08:35 +01:00
20f17f775e Remove device enqueue part 8
- remove hasDeviceEnqueue

Related-To: NEO-6559
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-01-19 11:16:35 +01:00
97765cd39f Remove device enqueue part 7
- mainly remove BlockKernelManager and ReflectionSurfaceHelper

Related-To: NEO-6559
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-01-19 10:41:57 +01:00
8ebef3769c Update RENDER_SURFACE_STATE for Xe Hpg
Program Multi Gpu params in surface state only on Xe Hp Sdv
Respect zero-size image scenario when programming surface state
Move XeHp-only tests to dedicated subdir

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-18 21:06:14 +01:00
10f329768f Fix multitile tag initialization for AubCsr
Before this change, only Tile0 tag was initialized

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-01-18 19:33:57 +01:00
c40153ec86 Clarify logic of walk order values for Xe Hp and later
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-18 13:36:15 +01:00
4238679078 Refactor implicit scaling device support
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-18 13:08:43 +01:00
40483acd17 Improve blitter programming
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-01-18 10:36:05 +01:00
95943dee0f Dont generate gen file by default
Ocloc can dump gen file when we add -gen_file flag to cmd.
Otherwise gen is not generated

Signed-off-by: Mateusz Borzyszkowski <mateusz.borzyszkowski@intel.com>
2022-01-17 18:14:50 +01:00
e5a18177c5 Add unit test helper function to set pipe control hdc flush
Separate unit test helper definitions bdw_and_later / xe_hp_and_later

Related-To: NEO-6466

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-17 15:45:29 +01:00
fc224202d6 Create debug zebin in OCL
This commit adds debug zebin creation in OCL.
- Added returning debug zebin in build/linking paths in OCL if
corresponding device binary format was detected.
- Refactored getZebinSegments() method - added common ctor for both
L0/OCL paths

Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
2022-01-17 14:27:23 +01:00
d9aae805c7 Do not apply L0 debugger WA (Disable L3 cache) for highest DG2 steppings
Related-To: NEO-6320

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2022-01-17 13:46:40 +01:00
9147d4c203 Fix SyncBuffer page tables cloning
multiOsContextCapable param was hardcoded to false and page tables were
not cloned to other SubDevices

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-01-17 12:19:09 +01:00
c36c083812 Refactor implicit scaling parameters for surface state
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-17 09:30:58 +01:00
79c8605ed2 Fix checking required DSH Size
This change simplifies calculating required DSH Size
and replaces wrong debug break conditiong causing
debug assertion fails in many tests with simple
check "calculatedDSHSize > allocatedDSHSize".

Related-To: NEO-6077

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-01-15 00:24:46 +01:00
ff79c84115 Correct INTERFACE_DESCRIPTOR_DATA definitions for XeHp and later
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-14 19:06:55 +01:00
b78bb26cbf Refactor partitioning of state base address
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-14 19:06:24 +01:00
e7f2676d5e Fix ThreadArbitrationMode programming
For non-kernel submission, TAM was incorrectly reprogrammed to default
mode. Correct programming should reuse value from previous submission.

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-01-14 13:09:11 +01:00
9c4f05387b Refactor partitioning of dispatched kernels
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-13 22:54:07 +01:00
201c3347ff Rename dispatchBlitCommandsRegion to dispatchBlitCommandsForImageRegion
As this function no longer applies to buffers it needed to be renamed.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2022-01-13 15:42:12 +01:00
9785ab7828 Refactor encode dispatch kernel class interface
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-13 12:08:38 +01:00
4fc365acca Create EngineInfo without MemoryInfo
Allow to create EngineInfo even if memoryInfo is
nullptr.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-01-13 10:03:34 +01:00
71746a2fff Register zebin binary in L0 debugger
Related-To: NEO-5571

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2022-01-12 23:17:59 +01:00
394c0e90e1 Return error when failing on submission
Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
2022-01-12 16:42:30 +01:00
37c78b9ef7 Disable bliter on DG1 Linux
move dg1 hw info config tests to shared

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-12 15:10:14 +01:00
45ae4fe881 Remove device enqueue part 3
- isSchedulerKernel

Related-To: NEO-6559
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-01-12 13:50:18 +01:00
af7cb3ff35 Test closing GEM worker is blocking during cleanup
Added test checking if closing GEM worker during
DRM memory manager clean up is blocking.

Related-To: NEO-6213

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-01-12 12:48:05 +01:00
dc534c84d7 Revert thread arbitration policy changes
This reverts commit eddac7451099fed9dd9838117983d85b15ccc602.

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-01-12 11:33:52 +01:00
7604a15abd Enable local memory for images for DG2 + WSL
Change GMM resource info params, so that buffers
remain in system memory while images are being
routed to local memory additionally, fixes single
sku builds


Related-To: NEO-6391

Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2022-01-11 20:06:53 +01:00
429fa1fbdd Delay releasing memory in createAllocWithAlignment
When padding memory is needed, store it and release only when
the related allocation is being released.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-01-11 20:02:43 +01:00
22588edf86 Add -force-stos-opt for stateful builtins
Related-To: NEO-6582
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-01-11 17:57:34 +01:00
61e5e0687d Patch all implicit args relocations within every kernel
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-11 14:34:28 +01:00
2194b647e9 PVC: Dont override default thread arbitration policy
This reverts commit 5af9dff74d.

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-01-11 14:16:17 +01:00
8729521769 Use dispatchBlitCommandsForBufferRegion when copying buffers in L0
First step to separate dispatch blit commands for buffers
from dispatch blit commands for images.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6134
2022-01-11 13:52:56 +01:00
325ae63d05 Sort program headers by virt addr
When encoding ELF binary sort program headers by
virtual addresses incrementally.
This change is needed for compatibility with GDB.

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-01-11 13:23:59 +01:00
34856747b4 Add implementation for reading logical subDevice from builtin
Related-To: NEO-6258
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
2022-01-11 13:06:15 +01:00
014fd1fb26 Enable BCS by default on supported platforms
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-01-10 15:36:48 +01:00