Commit Graph

26 Commits

Author SHA1 Message Date
Mateusz Jablonski 0da5e6f277 refactor l0: cleanup cmake file level_zero/core/source/CMakeLists.txt
Related-To: NEO-7507
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-03-16 12:38:15 +01:00
Mateusz Hoppe 0204761add feature: gpu assert implementation
- allocate assert buffer when kernel has assert
- track assert kernels in cmdlists and cmdqueues
- check and print assert at sync calls: cmdqueue synchronize(), fence
synchronize(), event hostSynchronize(), synchronous imm cmdlists
append()

Related-To: NEO-5753

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-03-15 19:22:09 +01:00
Mateusz Hoppe 87ea9473e4 fix: zeFenceHostSynchronize() to flush printf output
- zeFenceHostSynchronize() should flush printf output from GPU kernels

Related-To: NEO-7625

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-02-20 23:16:12 +01:00
Maciej Plewka 4b42b066f8 Use dedicated using type for TaskCount
Related-To: NEO-7155

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-11-28 16:44:44 +01:00
Milczarek, Slawomir 0192e8038f Check for GPU hang in path with wait for timestamps
Related-To: NEO-6868

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2022-09-19 15:01:46 +02:00
Patryk Wrobel 9f2cfc6f9d Limit files included by fence.h and csr_definitions.h
This change introduces usage of forward declarations
and removes unneeded includes from the mentioned files.

Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-08-30 13:13:40 +02:00
Zbigniew Zdanowicz e4d8dfcdd9 Implement fence creation flag
Related-To: NEO-6242

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-03-25 12:04:43 +01:00
Zbigniew Zdanowicz 814b0ecb87 Improve wait function for Fence object
Related-To: NEO-6242

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-03-24 10:48:49 +01:00
Zbigniew Zdanowicz 46f4472965 Refactor Fence class interface and implementation
Related-To: NEO-6242

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-03-21 10:35:26 +01:00
Patryk Wrobel 1275c4e200 Detect GPU hang in remaining blocking calls of L0
This change introduces detection of GPU hangs in
zeEventHostSynchronize and zeFenceHostSynchronize.
Furthermore, if CommandQueueHw::executeCommandLists
uses ZE_COMMAND_QUEUE_MODE_SYNCHRONOUS and hang occurs,
the information about it is propagated to the caller.

Related-To: NEO-6681
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-02-16 14:47:29 +01:00
Dominik Dabek fb1a008414 Change fences to use tag allocation
Instead of creating new allocation per fence, use the task count.
Fence synchronize will wait for task count update.

Related-To: NEO-6634

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-02-02 11:56:29 +01:00
Zbigniew Zdanowicz 3e1023fa1a Unify memory layout for all multi tile post sync operations
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-12-02 18:00:40 +01:00
Zbigniew Zdanowicz 3b35ba504f Adapt command stream receiver to multiple active partitions
Related-To: NEO-6244

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-09-23 14:32:20 +02:00
Rafal Maziejuk f6c8fb47bb Delete unused L0 function
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
2021-09-13 14:22:59 +02:00
Zbigniew Zdanowicz ddf76ef0b2 Add reset partition count and all partitions in Fence object
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-09-13 10:24:10 +02:00
Zbigniew Zdanowicz 6b299a3ab0 Make partitioned post sync operations for partitioned workloads
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-09-03 20:20:29 +02:00
lgotszal 3bd4bca911 Copyright header update
Dates corrected in copyright headers to reflect original publication date
(2018 for OpenCL, 2020 for Level Zero).

Signed-off-by: lgotszal <lukasz.gotszald@intel.com>
2021-05-17 20:38:19 +02:00
Aravind Gopalakrishnan 9b2399019c Add fence ULTs (2)
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2021-04-03 09:02:54 +02:00
Zbigniew Zdanowicz b9ed7de40a Parametrize wait operation
Related-To: NEO-4759


Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2021-03-31 15:12:59 +02:00
Mateusz Jablonski 83ed9d9ee4 Minor cleanup around L0 Fence
remove duplicated functions

Change-Id: I815221835b87ab05317b2ac4436ea1321ccd7cab
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2020-09-20 21:18:35 +02:00
Jaime Arteaga 902fc2f6c4 level-zero v1.0 (2/N)
Change-Id: I1419231a721fab210e166d26a264cae04d661dcd
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: macabral <matias.a.cabral@intel.com>
Signed-off-by: davidoli <david.olien@intel.com>
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@intel.com>
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
Signed-off-by: Latif, Raiyan <raiyan.latif@intel.com>
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2020-08-03 13:11:13 +02:00
Andrzej Swierczynski 77f50e5444 Always pass device bitfield to AllocationProperties in constructor
Related-To: NEO-4722

Change-Id: Ie2475bf92a3189bcb9073bec5bf5af709e597c5d
Signed-off-by: Andrzej Swierczynski <andrzej.swierczynski@intel.com>
2020-07-13 09:00:10 +02:00
Mateusz Hoppe ac426b5108 TBX csr downloads allocations on queryStatus calls
Change-Id: I57fd98f4227b6d03430db6b96cfd21dd726919a3
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2020-05-13 16:28:19 +02:00
Mateusz Hoppe ef4fae3903 Enable TBX mode in level zero
RelatedTo: NEO-4644

Change-Id: I76913d6b7c7d978a5a90a7a574778c67283497c1
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2020-05-06 16:33:15 +02:00
Filip Hazubski d0527e1049 Rename memory_constants.h to constants.h
Change-Id: I05b5d20bac12935dc6625b94adc3a03c98c19b49
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2020-04-02 14:19:39 +02:00
Jaime Arteaga d96e462754 Reorganize Level Zero Core API files
Change-Id: I95750b90748dd65310fa72b030ea3ab2f72d3f24
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-03-25 11:21:43 +01:00