move most of members to protected section
merge related members into structs
Change-Id: Ief2e092aa5e61ca6f13308f9d9b1937ea6c913b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library
Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
Updating files modified in 2018 only. Older files remain with old style
copyright header
Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
- do not always expect failures in tests with failure injections
there is retry mechanism for some cases
Change-Id: If7589d2dacc41216d2f3b08f861209bbab179615
- new ExtendableEnum struct that serves as enum but can
be extended with values
- decrease dependencies on graphics_allocation.h header -
use forward class declaration when possible
- memoryPool indicates what kind of memory is allocated
for a given GraphicsAllocation
Change-Id: I7a707c28dc4544cc73abc5f0ed5263ba5be17452
- Move indirect heap to internal allocator domain.
- Add logic in getIndirectHeap to allocate with proper API depending on
heap type
- Add State base Address programming, reflecting that now Indirect Object
Heap is placed in 4GB domain.
- For AddPatchInfoCommentsForAUBDump mode , keep all heaps in non 4GB mode.
Change-Id: I6862f6a249e444d0d6cfe7e499a10d43f284553e
- Add Indirect Heap function that will be used to program State Base Address.
- This is to allow indirect heaps to work in 2 modes, either heap will service
as whole indirect allocation OR offsets in 4GB space will be used.
Change-Id: Ic4ca1e907c1b30d2f98dc39e8ab945ce35ed6ad0
- Allow indirect heap to work in 2 modes:
first mode is when it will be used as an allocation from 4GB allocator.
In such scenario driver will return offset from base of the allocator region.
Second mode is the legacy mode which will be used by device enqueue, this
will results in heap CPU base address being programmed in State Base Address
commands and during programming heap offset base of 0 will be returned.
Change-Id: Ica098f3278b6b6ed5036b4c5ab7461dc61d8ee86
Add macro to add all subdirectories
Add macro to create project source tree based on target sources
Small cleanup runtime/CMakeLists.txt
Change-Id: I9b99145c544f648c4c3fe7421752d0c5d9504edf
- Instruction heap is currently heavily used as every kernel copies ISA into
it.
- It dries out very fast and each change to new heap requires whole pipeline
drain that prevents concurrency
- Problem is even larger when sip kernel is used as it limits the total heap
size
- In order to maximize heap re-use and to limit the count of pipeline drains
this change introduces new minimal size for instruction heap 512 KB.
Change-Id: Ic54e9ef4448b1d35dab01b084ee1d59b509642cb
- In various scenarios code was not programming the max heap size correctly
- It was possible for SSH to overcome the limit
- Size was programmed smaller then it really was, which resulted in smaller
reuse, which led to SBA reprogramming which led to lower performance in ooq
scenarios
- This change fixes the heap size programming by always utilizing full
allocation size and always limiting SSH at proper value
Change-Id: Ib703d2b0709ed8227a293def3a454bf1bb516dfd
Mateusz Jablonski