d29ed25f8b
Add support for global_operations in new sysman design
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Related-To: LOCI-4135
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
2023-04-05 17:25:03 +02:00
44649faa0f
Defer Sysman Engine Module Initialization
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With this change, init for sysman Engine API would not be done during zeInit.
init and thereby Engine API handle creation would be done only
when user explicitly requests to enumerate handles
using zesDeviceEnumEngineGroups
Related-To: LOCI-3127
Signed-off-by: Kulkarni, Ashwin Kumar <ashwin.kumar.kulkarni@intel.com>
2022-08-26 08:41:22 +02:00
49aaf62bbd
Lazy init implementation for RAS module
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Related-To: LOCI-3127
Signed-off-by: Kulkarni, Ashwin Kumar <ashwin.kumar.kulkarni@intel.com>
2022-07-04 18:29:57 +02:00
b79d9a8e10
Correct structs to explicitly initialize members
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Affected structs are DebugAreaHeader, Ras and APITracerImp.
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-03-14 15:40:28 +01:00
94d09f75b7
Get RAS HBM errors count using firmware interface
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-- master-commit
Add functionality to retrieve memory errors from Firmware
-- master-commit
Related-To: LOCI-2491, LOCI-2726
Signed-off-by: Mayank Raghuwanshi <mayank.raghuwanshi@intel.com>
2021-12-08 18:57:24 +01:00
46c51cb8a9
Sysman device reset stability fix
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Close PMT, and PMU fds created during Sysman's init before calling
device reset.
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
2021-04-15 11:53:10 +02:00
5cd5705239
Implement clear option for zesRasGetState
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Signed-off-by: Mayank Raghuwanshi <mayank.raghuwanshi@intel.com>
2021-01-21 15:00:13 +01:00
978003e96e
Add subdevice support for RAS module
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Change-Id: Iced5aeed86d6b19a4710992155257e420ae1296f
Signed-off-by: mraghuwa <mayank.raghuwanshi@intel.com>
2020-10-27 17:54:29 +01:00
a8a013b0c3
Implement zesRasGetState to retrieve cache errors
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Change-Id: I9fbba505db6551f510cb20ea71604af53db61960
Signed-off-by: mraghuwa <mayank.raghuwanshi@intel.com>
2020-10-20 15:45:36 +02:00
220c575850
Update Ras Api's as per latest spec
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Change-Id: I29b77eee0832fcca6d989f9ef41b01b17232a91e
Signed-off-by: mraghuwa <mayank.raghuwanshi@intel.com>
2020-08-06 08:31:03 +02:00
902fc2f6c4
level-zero v1.0 (2/N)
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Change-Id: I1419231a721fab210e166d26a264cae04d661dcd
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: macabral <matias.a.cabral@intel.com>
Signed-off-by: davidoli <david.olien@intel.com>
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@intel.com>
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
Signed-off-by: Latif, Raiyan <raiyan.latif@intel.com>
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2020-08-03 13:11:13 +02:00
92b15507b0
Initialize variables and validate pointers before actually using them
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Change-Id: Iae6fbeac124e1a02da419f5071e1ebc292b390cf
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
2020-07-14 11:17:58 +02:00
0c9c55cd17
add counter support for RAS.
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- added dual handle support for RAS Correctable and Uncorrectable Errors.
- added reset counter for RAS.
- added Os Specific ULT for RAS
Change-Id: Ia10115bf6720ab211f549571e810ec0d6c0801ec
2020-06-25 08:48:11 +02:00
324b1f5c60
RAS APIs boilerplate for Level Zero Sysman.
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-Implement zetSysmanRasGet API
Change-Id: Ib06e4a5d087a1e684c918413c3d98da2082e4f91
Signed-off-by: Vilvaraj, T J Vivek <t.j.vivek.vilvaraj@intel.com>
2020-04-21 20:04:53 +02:00
Jitendra Sharma