Commit Graph

101 Commits

Author SHA1 Message Date
Filip Hazubski befbffc967 Support offsets in blitter
Related-To: NEO-3020

Change-Id: I7ce13f0cf890c47fd40e92b5bb20c4f4ce291653
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-06-04 16:16:37 +02:00
Zbigniew Zdanowicz 7390e456a4 Add getter of Scratch Controller to the CommandStreamReceiver class
Change-Id: Iba0a9d7e4a9f141e1e31de428d50e7c745ad993a
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2019-05-21 17:25:05 +02:00
Dunajski, Bartosz b82cdd6b8e Program MI_SEMAPHORE_WAIT for dependencies during blit operations
Change-Id: I8b0e467886bfb23d026a0c13be514343a22a20a1
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-21 14:18:16 +02:00
Koska, Andrzej fa3d4f39f4 Enabling clEnqueueSVMMemcpy between SVM and host pointer
Related-To: NEO-3011
Change-Id: I89aad599d7238ea2d319a4b1c72dffea2dba952b
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
2019-05-20 09:10:56 +02:00
Dunajski, Bartosz 4f4ef14b9b Accept different copy directions during blit operations
Change-Id: Idb59458b46337ca0095056857dbd75bf116b6723
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-05-16 18:53:30 +02:00
Mrozek, Michal bc35cd250a Do not use max power saving mode in VA sharing scenarios.
-This can be achieved by passing CL_QUEUE_THROTTLE_LOW_KHR as throttle hint
to command queue.
- This gives much better control about the granularity of this feature
instead of triggering this for the whole context user may still have
power saving mode queues.

Change-Id: I066729f963119ddc1f62ad2785c342af2fea588e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2019-05-07 15:23:13 +02:00
Milczarek, Slawomir 20e0d8c7ab Add flag to control Binding Table Base Address programming
Related-To: NEO-2747

Change-Id: I30b52875f37b4f75a0b63eb199fc388d1e495dec
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-04-29 14:28:19 +02:00
Maciej Dziuban b7bd3aa793 Defer makeCoherent call to blocking calls
This allows flush() not to be blocking while using TBX

Resolves: NEO-3054
Change-Id: Ib3a408d4b5ec66f0848572841b3c60785fc28ad9
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-04-23 10:16:43 +02:00
Piotr Fusik 745c20c78a Rename TimestampPacket to TimestampPacketStorage.
Related-To: NEO-2872

Change-Id: Id1f78491912c44890ae7ead2cac12ec8eb073628
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-04-16 15:34:28 +02:00
Dunajski, Bartosz e40a82336c Flush constructed Blitter command buffer
Related-To: NEO-3020

Change-Id: Ib5f4e111b3a64964ff2c79d4c057a616cdbf8d07
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-04-16 09:55:53 +02:00
Dunajski, Bartosz ccd93e1ea8 Add method to dispatch blit operation from hostPtr to Buffer
Related-To: NEO-3020

Change-Id: If76f2c659c3ee343693a6d3ced86a47d7ed0bf61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-04-10 15:17:44 +02:00
Milczarek, Slawomir 17493426c1 AUB CSR with a capability to add AUB comment
Change-Id: Ia7e85468c3f1e937d34b67b0e279c013e8e3c190
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-04-01 14:14:58 +02:00
Maciej Dziuban 377aebce06 Move PIPE_CONTROL related functions to PipeControlHelper
Change-Id: Ie8220b06d2aa35a9fd0083b7db6925b577564d36
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-04-01 09:20:28 +02:00
Filip Hazubski 9bbf1daa0e Update CommandStreamReceiver::expectMemory()
Change-Id: I3362f8beee2430f2bf5ff797ec804448682e41ea
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-03-29 08:52:02 +01:00
Maciej Plewka 9e52684f5b Change namespace from OCLRT to NEO
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2019-03-26 15:48:19 +01:00
Stefanowski, Adam 16aee8cc46 [2/n] Move Hardware Info to Execution Environment
- remove hwInfo from the csr functions where it was passed as a parameter,
now csr functions have access to hwInfo by Execution Environment

Change-Id: I756ae63d9728c9c963571147bab97f9e1c15797b
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
2019-03-22 10:08:26 +01:00
Milczarek, Slawomir a3369a9679 AUB dump with HW mode to call pollForCompletion
Change-Id: I9a4345c47394f19ecc63e2d598266e0889a6f8f0
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2019-03-18 17:59:05 +01:00
Piotr Fusik ec72787b98 Remove MemoryManager::allocateGraphicsMemoryForHostPtr.
Change-Id: I629f2299a183fc135135dbaff89216b966554a95
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
2019-03-12 15:51:32 +01:00
Jobczyk, Lukasz 878fd43a1a Reverse logic of creating Memory Manager - part 1
-remove CSR::createMemoryManager method
-create MM from platform before creating devices

Change-Id: I0e7f091c53b0e60ae7101e82a305253af626330e
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
2019-03-08 09:47:29 +01:00
Maciej Dziuban fb78677d8d Add function for ensuring command buffer has allocation with given size
CommandStreamReceiver::ensureCommandBufferAllocation

Change-Id: Icb48c9beff4f087addda75e97b90d86e8481e7ff
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2019-03-04 09:39:00 +01:00
Filip Hazubski 8b57d28116 clang-format: enable sorting includes
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-27 11:50:07 +01:00
Jablonski, Mateusz 798137e4bb Add function to create devices bitfield based on allocation properties
Change-Id: Ic70443b1fb6106186efcff318690e434dc1db625
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
2019-02-26 12:07:09 +01:00
Kamil Diedrich 76276d4c23 Add unit test for events
Change-Id: I13d74626a244d234a5bbaff369ed09fb59d6e33f
2019-02-14 12:42:44 +01:00
Filip Hazubski d30cc221df Update disabling caching for a resource
Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-02-01 10:50:21 +01:00
Filip Hazubski ec03210687 Update clEnqueueVerifyMemory
- return success also for non aub CSRs

Change-Id: Iac7fdcd58e4b76a325ef67fd266f183d779ca956
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-01-14 14:37:09 +01:00
Dunajski, Bartosz 8ae7de7b0e Create HardwareContext only when osContext is available
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2019-01-13 15:12:07 +01:00
Filip Hazubski 7e3884e22d Add clEnqueueVerifyMemory API
Change-Id: I15a514b14b9efdaeb182c7abd98b8e236932d50f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2019-01-04 08:30:02 +01:00
Dunajski, Bartosz 010e1a4738 VFE state programming cleanup
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-12-13 17:44:40 +01:00
Dunajski, Bartosz b728526c4e Allow Device creating multiple CSRs [8/n]
Use OsContextId instead of DeviceIndex for residency

Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
2018-12-04 15:36:59 +01:00
Zdanowicz, Zbigniew 7dbd0ea4f3 Move Scratch Space functionality to dedicated class
Change-Id: Ic7655c4b971513961aba6823478a139ffc943466
2018-11-29 11:55:56 +01:00
Dunajski, Bartosz 3e7fa3754c Replicate OsContext to CommandStreamReceiverWithAUBDump
Change-Id: If2f83d01d58891209c6cf82f47e5634f8d348de4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-28 13:11:52 +01:00
Dunajski, Bartosz b0de2a11d2 Set OsContext as reference
Change-Id: I3b682fabde9c2ddb2c33a95aef77bf6ce400a21f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-27 15:32:14 +01:00
Piotr Fusik 87bb6afa56 Move stamps allocators from memory manager to CSR.
Change-Id: Ib399e462cdddad89fcc470df4c4f0f5e4591a6b2
2018-11-27 14:52:06 +01:00
Dunajski, Bartosz 2d77b86e70 Allow Device creating multiple CSRs [5/n]
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-27 14:25:04 +01:00
Dunajski, Bartosz d6870a896b Reduce tag pool size to 1 for AUBs
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-11-20 11:42:32 +01:00
Mrozek, Michal 08424d798f Enable power saving mode for queues created with throttle hint low.
- When queue is created with throttle hint low it should be power conservative
- With this change whenever queues with low throttle setting requests wait
for GPU completion, such wait will be handled in power conservative manner.
- Whenever GPU is not completed, waiting thread will be put to sleep and will
for GPU completion that triggers the wake up interrupt.

Change-Id: I9f34872a38ab9f5952f9d9623ea43503fc3dd587
2018-11-16 15:20:31 +01:00
Piotr Fusik 76efeae9d8 Pass more information to programPipelineSelect.
Change-Id: Iaabe60742269b721f8defe71306dd6e87d60d546
2018-11-15 11:45:45 +01:00
Hoppe, Mateusz 12ece3a220 Reorder STATE_BASE_ADDRESS and STATE_SIP
- STATE_SIP should be added after STATE_BASE_ADDRESS
- tests refactor.

Change-Id: I000316b70db714fb227b6174f793d4bf8806ea9a
2018-11-13 17:57:51 +01:00
Woloszyn, Wojciech 549b73510c Flush L3 for reduced address space platforms
Change-Id: I5a73e72f8e309137328930920ab174ba6f1378dc
2018-11-06 14:26:59 +01:00
Mateusz Jablonski 815ae851b7 Graphics Allocation: store task count per context id
Move definition of allocations list method to internal_allocation_storage.cpp

Change-Id: I4c6038df8fd1b9335e8a74edbab33b78f9293d8f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-11-06 12:43:47 +01:00
Mateusz Jablonski ead2e2ea6d Move createAllocationForHostPtr method to command stream receiver
Remove not needed includes from command_queue.h

Change-Id: I45963bf005471bd7716d55471474299a15e27b62
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-30 17:49:08 +01:00
Mateusz Jablonski d3f71cfb04 Move allocation lists to internal allocation storage
Change-Id: I543f1551c8fb161cf99c5870de44afec390415b2
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-30 13:49:31 +01:00
Mateusz Jablonski a531751001 Remove ULT code from runtime
Change-Id: I2faf52070f980d031788fc6946df8534d96c639b
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-24 17:45:08 +02:00
Mateusz Jablonski 7bd92190d9 Create class to operate on command stream receiver's allocation lists
Change-Id: I4262f46aa31948ed70d1152d172619b5619a2333
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-23 09:42:31 +02:00
Mateusz Jablonski 3bd8d71f0a Don't call command stream receiver's cleanupResources twice
Change-Id: I9cce3eacbb805770658be91c55e1fa69dc4bae5d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-19 15:31:01 +02:00
Dunajski, Bartosz 6d610983f1 Deferred Pipe Control programming and CSR flush on Barrier request
Change-Id: Iabae0f9159bb455518cedf7da068c7d3da72b840
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2018-10-17 09:31:34 +02:00
Mateusz Jablonski 4f028d13a1 Command stream receiver: use memory manager from execution environment
Change-Id: I236218a73bd7dac6e5744e3596f146b77b5ca1c8
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-16 12:14:55 +02:00
Mateusz Jablonski 8a9d0a81df Move temporary and reusable allocation lists to command stream receiver
Change-Id: I40df6fe39b367e243e3710c5fdeaab3c85198d9d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2018-10-11 15:32:12 +02:00
Maciej Dziuban bc4700a193 Add OsContext argument to MemoryManager::makeNonResidentEvictionAllocations
OsContext has to propagate through following calls first:
- WddmCommandStreamReceiver<GfxFamily>::processEviction
- CommandStreamReceiver::makeSurfacePackNonResident

Change-Id: I7559c7406b2860c51905c9961cec251fac231b08
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
2018-10-05 01:28:31 +02:00
Koska, Andrzej 2110ba6ca4 Passing correct taskCount to waitForTaskCountAndCleanAllocationList
Change-Id: Ib0d2474bcd5827f8030331f7ef45ffc2805b955b
2018-10-04 23:53:43 +02:00