Commit Graph

57 Commits

Author SHA1 Message Date
Katarzyna Cencelewska da7b03dd15 fix: to always use grfs count in calculateNumThreadsPerThreadGroup
grf size != grf count

Related-To: GSD-8437
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-03-22 11:03:18 +01:00
Katarzyna Cencelewska dd1d52259e refactor: add param rootDeviceEnvironment to calculateNumThreadsPerThreadGroup
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-03-21 22:25:14 +01:00
Zbigniew Zdanowicz 4fb4e731d7 refactor: add load register immediate encoder on command pointer
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2024-03-12 09:38:03 +01:00
Dunajski, Bartosz 51ae76a25f refactor: improve handling of in-order atomic signaling
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2024-03-01 15:59:25 +01:00
Dunajski, Bartosz ea2ad550a1 refactor: improve handling duplicated in-order host storage
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2024-03-01 13:54:28 +01:00
Lukasz Jobczyk cfd3edfb2c fix: Align IOH entry
Related-To: NEO-10036

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-02-26 14:36:31 +01:00
Lukasz Jobczyk cc1732c930 performance: make resident before lock
Resolves: NEO-10369

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-02-16 12:00:38 +01:00
Compute-Runtime-Validation 4d159bd06c Revert "performance: make resident before lock"
This reverts commit 7e7fac01e3.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-02-16 09:23:49 +01:00
Lukasz Jobczyk 7e7fac01e3 performance: make resident before lock
Resolves: NEO-10369

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-02-15 11:56:36 +01:00
Maciej Plewka ce17580b28 fix: Use Rcs engine in blender on DG2
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2024-02-07 18:21:54 +01:00
Fabian Zwolinski c51b656d2c fix: request instruction cache invalidation on module destroy
Invalidation is requested on both linux and windows,
on Csr's that used Isa allocation.

Related-To: NEO-10045
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2024-01-29 16:00:34 +01:00
Dunajski, Bartosz b266f1f3cc refactor: improve implicit scaling interface
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2024-01-19 14:09:04 +01:00
Jitendra Sharma aa191b6f88 feature: Set runalone mode for contexts with online debugging
Related-To: NEO-9139

Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
2024-01-17 09:01:30 +01:00
John Falkowski 10ef2a28ff fix: correct for default hierachry
Resolves: NEO-10006

Signed-off-by: John Falkowski <john.falkowski@intel.com>
2024-01-15 22:15:49 +01:00
Katarzyna Cencelewska 5d2d3ed899 refactor: modify sip kernel helpers
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-01-09 17:09:10 +01:00
Mateusz Jablonski a73fb4d2fe fix: correct reporing kernel private size on L0
unify the logic across APIs

Related-To: NEO-9944
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-01-09 09:54:05 +01:00
Dunajski, Bartosz d7b6f11ced refactor: improve creating 48b resources
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-12-29 10:05:42 +01:00
Mateusz Hoppe 31e9b5e9fa feature: add support for secondary contexts in group
Related-To: NEO-7824

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-12-28 13:31:08 +01:00
Mateusz Jablonski 36194c4e7d refactor: correct variable namings
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-11-29 23:49:03 +01:00
Mateusz Jablonski 8dd80efbb1 refactor: move getting thread per eu configs to release helper
Related-To: HSD-18034098647
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-11-21 09:44:32 +01:00
Dunajski, Bartosz 30777d4d4c feature: use indirect semaphore for 64b values
Related-To: NEO-8145

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-11-09 16:58:45 +01:00
Compute-Runtime-Validation fca2159430 Revert "fix: if device hierarchy is flat then getSubDevicesCount return 1u"
This reverts commit cb0bb57f49.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-10-26 15:40:29 +02:00
Baj, Tomasz cb0bb57f49 fix: if device hierarchy is flat then getSubDevicesCount return 1u
Related-To: NEO-9167

Signed-off-by: Baj, Tomasz <tomasz.baj@intel.com>
2023-10-25 15:51:52 +02:00
Mateusz Jablonski 6d2d16d68e fix: avoid overflow of gpu time stamp in ns
Related-To: NEO-8394
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-10-24 14:56:15 +02:00
Filip Hazubski 08e92d154f fix: Add getDefaultDeviceHierarchy call to GfxCoreHelper
Added getDefaultDeviceHierarchy call that describes default device
hierarchy for a gfx core. Refactored L0 and OCL paths to use this
value by default and override this value when user sets
ZE_FLAT_DEVICE_HIERARCHY environment variable or
ReturnSubDevicesAsApiDevices debug key.

Updated ReturnSubDevicesAsApiDevices to force COMPOSITE device hierarchy
when set to 0.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-10-06 12:32:41 +02:00
Mateusz Jablonski a033df33ff fix: remove preferSmallWorkgroupSizeForKernel method
Related-To: HSD-18033866078
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-09-29 11:55:09 +02:00
Mateusz Jablonski 09044dfbaa refactor: remove not needed code
Related-To: NEO-7527

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-09-27 14:35:49 +02:00
Maciej Bielski 97e7cda912 feature: Optimize intra-module kernel ISA allocations
So far, there is a separate page allocated for each kernel's ISA within
`KernelImmutableData::initialize()`. Apparently the ISA blocks are often
much smaller than a 64k page, which leads to poor memory utilization and
was even observed to cause the device OOM error if a single module has
several keys.

Improve the situation by reusing the parent allocation (owned by the
module instance) for modules, which kernel ISAs can fit together within
a single 64k page. This improves the memory utilization on a single
module level.

Related-To: NEO-7788
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2023-09-21 13:55:45 +02:00
Mateusz Hoppe 69f5ca6345 feature: bindless addressing - flush state cache after reusing SS slot
- when Surface State is reused for new resource, State Cache needs to be
invalidated

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2023-09-20 12:53:32 +02:00
Compute-Runtime-Validation 913a926fd4 Revert "feature: Optimize intra-module kernel ISA allocations"
This reverts commit c348831470.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-09-19 14:16:05 +02:00
Maciej Bielski c348831470 feature: Optimize intra-module kernel ISA allocations
So far, there is a separate page allocated for each kernel's ISA within
`KernelImmutableData::initialize()`. Apparently the ISA blocks are often
much smaller than a 64k page, which leads to poor memory utilization and
was even observed to cause the device OOM error if a single module has
several keys.

Improve the situation by reusing the parent allocation (owned by the
module instance) for modules, which kernel ISAs can fit together within
a single 64k page. This improves the memory utilization on a single
module level.

Related-To: NEO-7788
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2023-09-19 12:05:09 +02:00
Mrozek, Michal d9f938f3db refactor: remove not needed code
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
2023-09-12 14:25:04 +02:00
Jitendra Sharma 9818ef61a5 feature: Report correct GRF register count
Based on Large GRF enabled or not, report correct GRF
register.

Related-To: NEO-6788
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
2023-09-04 11:42:48 +02:00
Compute-Runtime-Validation 154530ad23 Revert "feature: Report correct GRF register count"
This reverts commit 8eb3fe222e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2023-09-01 15:12:57 +02:00
Jitendra Sharma 8eb3fe222e feature: Report correct GRF register count
Based on Large GRF enabled or not, report correct GRF
register.

Related-To: NEO-6788
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
2023-08-31 18:48:29 +02:00
Mateusz Jablonski 27e459dfd0 fix: add missing cache flushes on MTL and later integrated GPUs
hdc pipeline / untyped dataport cache flushes were applied only on discrete GPUs

Related-To: GSD-5085
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-07-28 19:30:13 +02:00
Kacper Nowak b908203001 fix: Compile built-ins per release
- Preserve releases on CMake level.
- Instead of generating builtins per platform, generate them per-release
(+ correct naming accordingly).
- Stop using revisions in builtin compilation logic path, as they are
already embedded in release (device ip).
- Remove platform names & revisions from names for generated files
(related to builtins).
- Remove unnecessary code, refactor ULT logic.

Related-To: NEO-7783
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
2023-07-11 16:02:36 +02:00
Cencelewska, Katarzyna 0d7aefe66b fix: Unify logic calculating threads per work group part 1
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-06-29 10:43:22 +02:00
Cencelewska, Katarzyna 68d81c82a7 fix: Use proper value about hw local id generations
- remove useless flag ForceNumberOfThreadsInGpgpuThreadGroup
- add new flag "RemoveRestrictionsOnNumberOfThreadsInGpgpuThreadGroup"
to restore old path without restrictions about number of threads in
thread group
- fix forwarding information about hw local ids generations to
calculate numOfThreadsInThreadGroup correctly

Related-To: NEO-7952, NEO-7982
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-06-26 16:35:42 +02:00
Cencelewska, Katarzyna 7cb3278eb3 fix: add function to calculate number of threads per tg
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-06-13 14:02:24 +02:00
Cencelewska, Katarzyna d2436a8231 fix: add limitations for setting gmm flag Cacheable
- move isCachingOnCpuAvailable to product helper
- isCachingOnCpuAvailable should return false on mtl
- if wsl, skip checking method from product helper

Related-To: NEO-7194
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-05-30 17:04:57 +02:00
Mateusz Jablonski 61055478d4 fix: adjust scope of disable L3 for debug WA
Related-To: HSD-1609398399
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-05-30 14:23:16 +02:00
Filip Hazubski d234bc970d refactor: Move getMaxNumSamplers function to ProductHelper
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-05-18 09:25:07 +02:00
Cencelewska, Katarzyna 5f22e9eaca fix: don't set Cacheable on xe_hp and later
Related-To: NEO-7194
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-05-18 09:17:32 +02:00
Milczarek, Slawomir 66eb1c9c0a refactor: Add helpers to control kmd migration support on PVC platform
This commit keeps KMD migration still disabled by default on PVC platform.

Related-To: NEO-6465

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2023-05-15 13:51:19 +02:00
Fabian Zwolinski cbce863dc2 refactor: Rename member variables to camelCase 3/n
Additionally enable clang-tidy check for member variables

Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2023-04-28 16:01:14 +02:00
Zbigniew Zdanowicz 4c7bc2ca98 [feature, perf] add alogrithm to chain command buffers in container
This feature is part of performance improvement to dispatch and start
command buffers as primary batch buffers.
When exhausted command buffer is closed, then reserve exact space for chained
batch buffer start and bind it to the next command buffer.
When closing command buffer, then save ending pointer and
reserve aligned space.

Related-To: NEO-7807

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2023-04-05 15:49:01 +02:00
Rafal Maziejuk b9828b543e feature: adjust maxWorkGroupSize value
Related-To: NEO-7357

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2023-03-28 15:19:52 +02:00
Mateusz Jablonski 5610eae710 refactor: fix typo Barrierl -> Barrier
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-03-21 15:58:24 +01:00
Filip Hazubski 0bee81c0c0 refactor: Move isLinearStoragePreferred function from gfx to product helper
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-03-15 18:51:59 +01:00