/* * Copyright (C) 2017-2018 Intel Corporation * * SPDX-License-Identifier: MIT * */ #pragma once #include "runtime/memory_manager/surface.h" #include "runtime/mem_obj/mem_obj.h" #include "runtime/utilities/vec.h" #include "runtime/utilities/stackvec.h" #include #include namespace OCLRT { class Kernel; class DispatchInfo { public: DispatchInfo() : gws(0, 0, 0), elws(0, 0, 0), offset(0, 0, 0), agws(0, 0, 0), lws(0, 0, 0), twgs(0, 0, 0), nwgs(0, 0, 0), swgs(0, 0, 0) {} DispatchInfo(Kernel *k, uint32_t d, Vec3 gws, Vec3 elws, Vec3 offset) : kernel(k), dim(d), gws(gws), elws(elws), offset(offset), agws(0, 0, 0), lws(0, 0, 0), twgs(0, 0, 0), nwgs(0, 0, 0), swgs(0, 0, 0) {} DispatchInfo(Kernel *k, uint32_t d, Vec3 gws, Vec3 elws, Vec3 offset, Vec3 agws, Vec3 lws, Vec3 twgs, Vec3 nwgs, Vec3 swgs) : kernel(k), dim(d), gws(gws), elws(elws), offset(offset), agws(agws), lws(lws), twgs(twgs), nwgs(nwgs), swgs(swgs) {} bool usesSlm() const; bool usesStatelessPrintfSurface() const; uint32_t getRequiredScratchSize() const; void setKernel(Kernel *kernel) { this->kernel = kernel; } Kernel *getKernel() const { return kernel; } uint32_t getDim() const { return dim; } void setDim(uint32_t dim) { this->dim = dim; } const Vec3 &getGWS() const { return gws; }; void setGWS(const Vec3 &gws) { this->gws = gws; } const Vec3 &getEnqueuedWorkgroupSize() const { return elws; }; void setEnqueuedWorkgroupSize(const Vec3 &elws) { this->elws = elws; } const Vec3 &getOffset() const { return offset; }; void setOffsets(const Vec3 &offset) { this->offset = offset; } const Vec3 &getActualWorkgroupSize() const { return agws; }; void setActualGlobalWorkgroupSize(const Vec3 &agws) { this->agws = agws; } const Vec3 &getLocalWorkgroupSize() const { return lws; }; void setLWS(const Vec3 &lws) { this->lws = lws; } const Vec3 &getTotalNumberOfWorkgroups() const { return twgs; }; void setTotalNumberOfWorkgroups(const Vec3 &twgs) { this->twgs = twgs; } const Vec3 &getNumberOfWorkgroups() const { return nwgs; }; void setNumberOfWorkgroups(const Vec3 &nwgs) { this->nwgs = nwgs; } const Vec3 &getStartOfWorkgroups() const { return swgs; }; void setStartOfWorkgroups(const Vec3 &swgs) { this->swgs = swgs; } protected: Kernel *kernel = nullptr; uint32_t dim = 0; Vec3 gws; //global work size Vec3 elws; //enqueued local work size Vec3 offset; //global offset Vec3 agws; //actual global work size Vec3 lws; //local work size Vec3 twgs; //total number of work groups Vec3 nwgs; //number of work groups Vec3 swgs; //start of work groups }; struct MultiDispatchInfo { ~MultiDispatchInfo() { for (MemObj *redescribedSurface : redescribedSurfaces) { redescribedSurface->release(); } } MultiDispatchInfo(Kernel *mainKernel) : mainKernel(mainKernel) {} MultiDispatchInfo() = default; MultiDispatchInfo &operator=(const MultiDispatchInfo &) = delete; MultiDispatchInfo(const MultiDispatchInfo &) = delete; bool empty() const { return dispatchInfos.size() == 0; } bool usesSlm() const { for (const auto &dispatchInfo : dispatchInfos) { if (dispatchInfo.usesSlm()) { return true; } } return false; } bool usesStatelessPrintfSurface() const { for (const auto &dispatchInfo : dispatchInfos) { if (dispatchInfo.usesStatelessPrintfSurface()) { return true; } } return false; } uint32_t getRequiredScratchSize() const { uint32_t ret = 0; for (const auto &dispatchInfo : dispatchInfos) { ret = std::max(ret, dispatchInfo.getRequiredScratchSize()); } return ret; } const DispatchInfo *begin() const { return dispatchInfos.begin(); } const DispatchInfo *end() const { return dispatchInfos.end(); } void push(const DispatchInfo &dispatchInfo) { dispatchInfos.push_back(dispatchInfo); } size_t size() const { return dispatchInfos.size(); } StackVec &getRedescribedSurfaces() { return redescribedSurfaces; } void pushRedescribedMemObj(std::unique_ptr memObj) { redescribedSurfaces.push_back(memObj.release()); } Kernel *peekParentKernel() const; Kernel *peekMainKernel() const; protected: StackVec dispatchInfos; StackVec redescribedSurfaces; Kernel *mainKernel = nullptr; }; } // namespace OCLRT