/* * Copyright (C) 2018-2020 Intel Corporation * * SPDX-License-Identifier: MIT * */ #include "shared/source/helpers/preamble_bdw_plus.inl" namespace NEO { template <> void PreambleHelper::addPipeControlBeforeVfeCmd(LinearStream *pCommandStream, const HardwareInfo *hwInfo, aub_stream::EngineType engineType) { auto pipeControl = pCommandStream->getSpaceForCmd(); PIPE_CONTROL cmd = BDWFamily::cmdInitPipeControl; cmd.setCommandStreamerStallEnable(true); cmd.setDcFlushEnable(true); *pipeControl = cmd; } template <> uint32_t PreambleHelper::getL3Config(const HardwareInfo &hwInfo, bool useSLM) { uint32_t l3Config = 0; switch (hwInfo.platform.eProductFamily) { case IGFX_BROADWELL: l3Config = getL3ConfigHelper(useSLM); break; default: l3Config = getL3ConfigHelper(true); } return l3Config; } template <> bool PreambleHelper::isL3Configurable(const HardwareInfo &hwInfo) { return getL3Config(hwInfo, true) != getL3Config(hwInfo, false); } template <> void PreambleHelper::programPipelineSelect(LinearStream *pCommandStream, const PipelineSelectArgs &pipelineSelectArgs, const HardwareInfo &hwInfo) { using PIPELINE_SELECT = typename BDWFamily::PIPELINE_SELECT; auto pCmd = pCommandStream->getSpaceForCmd(); PIPELINE_SELECT cmd = BDWFamily::cmdInitPipelineSelect; cmd.setMaskBits(pipelineSelectEnablePipelineSelectMaskBits); cmd.setPipelineSelection(PIPELINE_SELECT::PIPELINE_SELECTION_GPGPU); *pCmd = cmd; } template <> size_t PreambleHelper::getAdditionalCommandsSize(const Device &device) { return getKernelDebuggingCommandsSize(device.isDebuggerActive()); } template struct PreambleHelper; } // namespace NEO