/* * Copyright (C) 2018-2023 Intel Corporation * * SPDX-License-Identifier: MIT * */ #include "shared/source/gen8/hw_cmds_base.h" #include "shared/source/helpers/hw_info.h" #include "shared/source/helpers/pipe_control_args.h" #include "shared/source/helpers/pipeline_select_helper.h" #include "shared/source/helpers/preamble_bdw_and_later.inl" namespace NEO { using Family = Gen8Family; template <> void PreambleHelper::addPipeControlBeforeVfeCmd(LinearStream *pCommandStream, const HardwareInfo *hwInfo, EngineGroupType engineGroupType) { PipeControlArgs args = {}; args.dcFlushEnable = true; MemorySynchronizationCommands::addSingleBarrier(*pCommandStream, args); } template <> uint32_t PreambleHelper::getL3Config(const HardwareInfo &hwInfo, bool useSLM) { uint32_t l3Config = 0; switch (hwInfo.platform.eProductFamily) { case IGFX_BROADWELL: l3Config = getL3ConfigHelper(useSLM); break; default: l3Config = getL3ConfigHelper(true); } return l3Config; } template <> void PreambleHelper::programPipelineSelect(LinearStream *pCommandStream, const PipelineSelectArgs &pipelineSelectArgs, const RootDeviceEnvironment &rootDeviceEnvironment) { using PIPELINE_SELECT = typename Family::PIPELINE_SELECT; auto pCmd = pCommandStream->getSpaceForCmd(); PIPELINE_SELECT cmd = Family::cmdInitPipelineSelect; cmd.setMaskBits(pipelineSelectEnablePipelineSelectMaskBits); cmd.setPipelineSelection(PIPELINE_SELECT::PIPELINE_SELECTION_GPGPU); *pCmd = cmd; } template <> size_t PreambleHelper::getAdditionalCommandsSize(const Device &device) { bool debuggingEnabled = device.getDebugger() != nullptr; return getKernelDebuggingCommandsSize(debuggingEnabled); } template struct PreambleHelper; } // namespace NEO