114 lines
4.2 KiB
C++
114 lines
4.2 KiB
C++
/*
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* Copyright (C) 2018-2021 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#pragma once
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#include "shared/source/built_ins/built_ins.h"
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#include "shared/source/command_stream/command_stream_receiver.h"
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#include "opencl/source/command_queue/command_queue_hw.h"
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#include "opencl/source/helpers/hardware_commands_helper.h"
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#include "opencl/source/mem_obj/buffer.h"
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#include "opencl/source/memory_manager/mem_obj_surface.h"
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#include <new>
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namespace NEO {
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template <typename GfxFamily>
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cl_int CommandQueueHw<GfxFamily>::enqueueWriteBufferRect(
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Buffer *buffer,
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cl_bool blockingWrite,
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const size_t *bufferOrigin,
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const size_t *hostOrigin,
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const size_t *region,
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size_t bufferRowPitch,
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size_t bufferSlicePitch,
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size_t hostRowPitch,
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size_t hostSlicePitch,
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const void *ptr,
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cl_uint numEventsInWaitList,
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const cl_event *eventWaitList,
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cl_event *event) {
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const cl_command_type cmdType = CL_COMMAND_WRITE_BUFFER_RECT;
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CsrSelectionArgs csrSelectionArgs{cmdType, buffer, {}, device->getRootDeviceIndex(), region};
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CommandStreamReceiver &csr = selectCsrForBuiltinOperation(csrSelectionArgs);
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auto isMemTransferNeeded = true;
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if (buffer->isMemObjZeroCopy()) {
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size_t bufferOffset;
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size_t hostOffset;
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computeOffsetsValueForRectCommands(&bufferOffset, &hostOffset, bufferOrigin, hostOrigin, region, bufferRowPitch, bufferSlicePitch, hostRowPitch, hostSlicePitch);
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isMemTransferNeeded = buffer->checkIfMemoryTransferIsRequired(bufferOffset, hostOffset, ptr, cmdType);
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}
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if (!isMemTransferNeeded) {
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return enqueueMarkerForReadWriteOperation(buffer, const_cast<void *>(ptr), cmdType, blockingWrite,
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numEventsInWaitList, eventWaitList, event);
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}
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const size_t hostPtrSize = Buffer::calculateHostPtrSize(hostOrigin, region, hostRowPitch, hostSlicePitch);
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const uint32_t rootDeviceIndex = getDevice().getRootDeviceIndex();
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InternalMemoryType memoryType = InternalMemoryType::NOT_SPECIFIED;
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GraphicsAllocation *mapAllocation = nullptr;
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bool isCpuCopyAllowed = false;
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getContext().tryGetExistingHostPtrAllocation(ptr, hostPtrSize, rootDeviceIndex, mapAllocation, memoryType, isCpuCopyAllowed);
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auto eBuiltInOps = EBuiltInOps::CopyBufferRect;
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if (forceStateless(buffer->getSize())) {
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eBuiltInOps = EBuiltInOps::CopyBufferRectStateless;
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}
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void *srcPtr = const_cast<void *>(ptr);
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MemObjSurface dstBufferSurf(buffer);
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HostPtrSurface hostPtrSurf(srcPtr, hostPtrSize, true);
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GeneralSurface mapSurface;
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Surface *surfaces[] = {&dstBufferSurf, nullptr};
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if (region[0] != 0 && region[1] != 0 && region[2] != 0) {
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if (mapAllocation) {
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surfaces[1] = &mapSurface;
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mapSurface.setGraphicsAllocation(mapAllocation);
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srcPtr = convertAddressWithOffsetToGpuVa(srcPtr, memoryType, *mapAllocation);
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} else {
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surfaces[1] = &hostPtrSurf;
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bool status = csr.createAllocationForHostSurface(hostPtrSurf, false);
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if (!status) {
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return CL_OUT_OF_RESOURCES;
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}
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srcPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddress());
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}
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}
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void *alignedSrcPtr = alignDown(srcPtr, 4);
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size_t srcPtrOffset = ptrDiff(srcPtr, alignedSrcPtr);
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BuiltinOpParams dc;
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dc.srcPtr = alignedSrcPtr;
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dc.dstMemObj = buffer;
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dc.srcOffset = hostOrigin;
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dc.srcOffset.x += srcPtrOffset;
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dc.dstOffset = bufferOrigin;
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dc.transferAllocation = hostPtrSurf.getAllocation();
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dc.size = region;
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dc.srcRowPitch = hostRowPitch;
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dc.srcSlicePitch = hostSlicePitch;
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dc.dstRowPitch = bufferRowPitch;
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dc.dstSlicePitch = bufferSlicePitch;
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MultiDispatchInfo dispatchInfo(dc);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_BUFFER_RECT>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingWrite, csr);
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if (context->isProvidingPerformanceHints()) {
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context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL, CL_ENQUEUE_WRITE_BUFFER_RECT_REQUIRES_COPY_DATA, static_cast<cl_mem>(buffer));
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}
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return CL_SUCCESS;
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}
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} // namespace NEO
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