81 lines
2.6 KiB
C++
81 lines
2.6 KiB
C++
/*
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* Copyright (C) 2018-2021 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/source/command_container/command_encoder.h"
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#include "shared/source/gen8/hw_cmds.h"
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#include "shared/source/helpers/populate_factory.h"
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#include "opencl/source/device_queue/device_queue_hw.h"
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#include "opencl/source/device_queue/device_queue_hw_bdw_and_later.inl"
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namespace NEO {
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typedef BDWFamily Family;
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static auto gfxCore = IGFX_GEN8_CORE;
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template <>
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void populateFactoryTable<DeviceQueueHw<Family>>() {
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extern DeviceQueueCreateFunc deviceQueueFactory[IGFX_MAX_CORE];
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deviceQueueFactory[gfxCore] = DeviceQueueHw<Family>::create;
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}
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template <>
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size_t DeviceQueueHw<Family>::getWaCommandsSize() {
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return sizeof(Family::MI_ATOMIC) +
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sizeof(Family::MI_LOAD_REGISTER_IMM) +
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sizeof(Family::MI_LOAD_REGISTER_IMM);
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}
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template <>
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void DeviceQueueHw<Family>::addArbCheckCmdWa() {}
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template <>
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void DeviceQueueHw<Family>::addMiAtomicCmdWa(uint64_t atomicOpPlaceholder) {
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EncodeAtomic<Family>::programMiAtomic(slbCS,
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atomicOpPlaceholder,
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Family::MI_ATOMIC::ATOMIC_OPCODES::ATOMIC_8B_INCREMENT,
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Family::MI_ATOMIC::DATA_SIZE::DATA_SIZE_QWORD,
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0x1u, 0x1u, 0x0u, 0x0u);
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}
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template <>
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void DeviceQueueHw<Family>::addLriCmdWa(bool setArbCheck) {
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// CTXT_PREMP_DBG offset
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constexpr uint32_t registerAddress = 0x2248u;
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uint32_t value = 0u;
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if (setArbCheck) {
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// set only bit 8 (Preempt On MI_ARB_CHK Only)
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value = 0x00000100;
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}
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LriHelper<Family>::program(&slbCS,
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registerAddress,
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value,
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false);
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}
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template <>
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void DeviceQueueHw<Family>::addPipeControlCmdWa(bool isNoopCmd) {}
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template <>
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void DeviceQueueHw<Family>::addProfilingEndCmds(uint64_t timestampAddress) {
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auto pipeControlSpace = (PIPE_CONTROL *)slbCS.getSpace(sizeof(PIPE_CONTROL));
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auto pipeControlCmd = Family::cmdInitPipeControl;
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pipeControlCmd.setCommandStreamerStallEnable(true);
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pipeControlCmd.setPostSyncOperation(PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_TIMESTAMP);
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pipeControlCmd.setAddressHigh(timestampAddress >> 32);
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pipeControlCmd.setAddress(timestampAddress & (0xffffffff));
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*pipeControlSpace = pipeControlCmd;
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}
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template <>
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void DeviceQueueHw<Family>::addDcFlushToPipeControlWa(PIPE_CONTROL *pc) {
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pc->setDcFlushEnable(true);
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}
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template class DeviceQueueHw<Family>;
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} // namespace NEO
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