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Change-Id: I94a3c2bdfc90791b7f8eef7614967b19a964e9df Signed-off-by: Andrew Friedley <andrew.friedley@intel.com>
59 lines
1.9 KiB
C++
59 lines
1.9 KiB
C++
/*
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* Copyright (C) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#pragma once
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#include <stdint.h>
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constexpr uint32_t L3SQC_BIT_LQSC_RO_PERF_DIS = 0x08000000;
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constexpr uint32_t L3SQC_REG4 = 0xB118;
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constexpr uint32_t GPGPU_WALKER_COOKIE_VALUE_BEFORE_WALKER = 0xFFFFFFFF;
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constexpr uint32_t GPGPU_WALKER_COOKIE_VALUE_AFTER_WALKER = 0x00000000;
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//Threads Dimension X/Y/Z
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constexpr uint32_t GPUGPU_DISPATCHDIMX = 0x2500;
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constexpr uint32_t GPUGPU_DISPATCHDIMY = 0x2504;
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constexpr uint32_t GPUGPU_DISPATCHDIMZ = 0x2508;
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constexpr uint32_t CS_GPR_R0 = 0x2600;
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constexpr uint32_t CS_GPR_R1 = 0x2608;
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//Alu opcodes
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constexpr uint32_t NUM_ALU_INST_FOR_READ_MODIFY_WRITE = 4;
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constexpr uint32_t ALU_OPCODE_LOAD = 0x080;
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constexpr uint32_t ALU_OPCODE_STORE = 0x180;
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constexpr uint32_t ALU_OPCODE_ADD = 0x100;
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constexpr uint32_t ALU_OPCODE_SUB = 0x101;
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constexpr uint32_t ALU_OPCODE_AND = 0x102;
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constexpr uint32_t ALU_OPCODE_OR = 0x103;
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constexpr uint32_t ALU_REGISTER_R_0 = 0x0;
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constexpr uint32_t ALU_REGISTER_R_1 = 0x1;
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constexpr uint32_t ALU_REGISTER_R_2 = 0x2;
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constexpr uint32_t ALU_REGISTER_R_3 = 0x3;
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constexpr uint32_t ALU_REGISTER_R_4 = 0x4;
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constexpr uint32_t ALU_REGISTER_R_5 = 0x5;
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constexpr uint32_t ALU_REGISTER_R_6 = 0x6;
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constexpr uint32_t ALU_REGISTER_R_7 = 0x7;
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constexpr uint32_t ALU_REGISTER_R_8 = 0x8;
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constexpr uint32_t ALU_REGISTER_R_9 = 0x9;
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constexpr uint32_t ALU_REGISTER_R_10 = 0xA;
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constexpr uint32_t ALU_REGISTER_R_11 = 0xB;
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constexpr uint32_t ALU_REGISTER_R_12 = 0xC;
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constexpr uint32_t ALU_REGISTER_R_13 = 0xD;
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constexpr uint32_t ALU_REGISTER_R_14 = 0xE;
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constexpr uint32_t ALU_REGISTER_R_15 = 0xF;
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constexpr uint32_t ALU_REGISTER_R_SRCA = 0x20;
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constexpr uint32_t ALU_REGISTER_R_SRCB = 0x21;
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constexpr uint32_t ALU_REGISTER_R_ACCU = 0x31;
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constexpr uint32_t ALU_REGISTER_R_ZF = 0x32;
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constexpr uint32_t ALU_REGISTER_R_CF = 0x33;
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constexpr uint32_t GP_THREAD_TIME_REG_ADDRESS_OFFSET_LOW = 0x23A8;
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