118 lines
4.4 KiB
C++
118 lines
4.4 KiB
C++
/*
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* Copyright (C) 2018-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/source/command_container/command_encoder.h"
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#include "shared/source/command_stream/stream_properties.h"
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#include "shared/source/command_stream/thread_arbitration_policy.h"
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#include "shared/source/gen8/reg_configs.h"
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#include "shared/source/helpers/preamble.h"
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#include "shared/test/unit_test/preamble/preamble_fixture.h"
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using namespace NEO;
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typedef PreambleFixture BdwSlm;
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BDWTEST_F(BdwSlm, WhenL3ConfigIsDispatchedThenProperRegisterAddressAndValueAreProgrammed) {
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typedef BDWFamily::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
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LinearStream &cs = linearStream;
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uint32_t l3Config = PreambleHelper<BDWFamily>::getL3Config(*defaultHwInfo, true);
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PreambleHelper<BDWFamily>::programL3(&cs, l3Config);
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parseCommands<BDWFamily>(cs);
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auto itorLRI = find<MI_LOAD_REGISTER_IMM *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorLRI);
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const auto &lri = *reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*itorLRI);
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auto registerOffset = L3CNTLRegisterOffset<BDWFamily>::registerOffset;
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EXPECT_EQ(registerOffset, lri.getRegisterOffset());
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EXPECT_EQ(1u, lri.getDataDword() & 1);
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}
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typedef PreambleFixture Gen8L3Config;
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BDWTEST_F(Gen8L3Config, GivenNoSlmWhenProgrammingL3ThenProgrammingIsCorrect) {
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bool slmUsed = false;
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uint32_t l3Config = 0;
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l3Config = getL3ConfigHelper<IGFX_BROADWELL>(slmUsed);
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EXPECT_EQ(0x80000340u, l3Config);
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uint32_t errorDetectionBehaviorControlBit = 1 << 9;
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EXPECT_TRUE((l3Config & errorDetectionBehaviorControlBit) != 0);
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}
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BDWTEST_F(Gen8L3Config, GivenlmWhenProgrammingL3ThenProgrammingIsCorrect) {
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bool slmUsed = true;
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uint32_t l3Config = 0;
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l3Config = getL3ConfigHelper<IGFX_BROADWELL>(slmUsed);
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EXPECT_EQ(0x60000321u, l3Config);
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uint32_t errorDetectionBehaviorControlBit = 1 << 9;
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EXPECT_TRUE((l3Config & errorDetectionBehaviorControlBit) != 0);
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}
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BDWTEST_F(Gen8L3Config, WhenPreambleIsCreatedThenL3ProgrammingIsCorrect) {
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bool l3ConfigDifference;
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bool isL3Programmable;
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l3ConfigDifference =
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PreambleHelper<BDWFamily>::getL3Config(*defaultHwInfo, true) !=
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PreambleHelper<BDWFamily>::getL3Config(*defaultHwInfo, false);
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isL3Programmable =
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PreambleHelper<BDWFamily>::isL3Configurable(*defaultHwInfo);
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EXPECT_EQ(l3ConfigDifference, isL3Programmable);
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}
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typedef PreambleFixture ThreadArbitrationGen8;
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BDWTEST_F(ThreadArbitrationGen8, givenPolicyWhenThreadArbitrationProgrammedThenDoNothing) {
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typedef BDWFamily::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
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LinearStream &cs = linearStream;
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StreamProperties streamProperties{};
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streamProperties.stateComputeMode.threadArbitrationPolicy.set(ThreadArbitrationPolicy::RoundRobin);
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EncodeComputeMode<FamilyType>::programComputeModeCommand(linearStream, streamProperties.stateComputeMode, *defaultHwInfo, nullptr);
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EXPECT_EQ(0u, cs.getUsed());
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MockDevice device;
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EXPECT_EQ(0u, PreambleHelper<BDWFamily>::getAdditionalCommandsSize(device));
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EXPECT_EQ(ThreadArbitrationPolicy::AgeBased, HwHelperHw<BDWFamily>::get().getDefaultThreadArbitrationPolicy());
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}
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BDWTEST_F(ThreadArbitrationGen8, whenGetSupportThreadArbitrationPoliciesIsCalledThenEmptyVectorIsReturned) {
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auto supportedPolicies = PreambleHelper<BDWFamily>::getSupportedThreadArbitrationPolicies();
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EXPECT_EQ(0u, supportedPolicies.size());
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}
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typedef PreambleFixture Gen8UrbEntryAllocationSize;
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BDWTEST_F(Gen8UrbEntryAllocationSize, WhenPreambleIsCreatedThenUrbEntryAllocationSizeIsCorrect) {
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uint32_t actualVal = PreambleHelper<FamilyType>::getUrbEntryAllocationSize();
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EXPECT_EQ(0x782u, actualVal);
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}
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BDWTEST_F(PreambleVfeState, WhenProgrammingVfeStateThenProgrammingIsCorrect) {
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typedef BDWFamily::PIPE_CONTROL PIPE_CONTROL;
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LinearStream &cs = linearStream;
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auto pVfeCmd = PreambleHelper<BDWFamily>::getSpaceForVfeState(&linearStream, *defaultHwInfo, EngineGroupType::RenderCompute);
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StreamProperties emptyProperties{};
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PreambleHelper<BDWFamily>::programVfeState(pVfeCmd, *defaultHwInfo, 0u, 0, 168u, emptyProperties, nullptr);
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parseCommands<BDWFamily>(cs);
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auto itorPC = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorPC);
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const auto &pc = *reinterpret_cast<PIPE_CONTROL *>(*itorPC);
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EXPECT_TRUE(pc.getDcFlushEnable());
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EXPECT_EQ(1u, pc.getCommandStreamerStallEnable());
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}
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