113 lines
3.9 KiB
C++
113 lines
3.9 KiB
C++
/*
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* Copyright (C) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "runtime/aub/aub_helper_bdw_plus.inl"
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#include "runtime/gen12lp/helpers_gen12lp.h"
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#include "runtime/helpers/flat_batch_buffer_helper_hw.inl"
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#include "runtime/helpers/hw_helper_bdw_plus.inl"
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#include "engine_node.h"
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namespace NEO {
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typedef TGLLPFamily Family;
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template <>
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void HwHelperHw<Family>::adjustDefaultEngineType(HardwareInfo *pHwInfo) {
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if (!pHwInfo->featureTable.ftrCCSNode) {
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pHwInfo->capabilityTable.defaultEngineType = aub_stream::ENGINE_RCS;
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}
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}
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template <>
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uint32_t HwHelperHw<Family>::getComputeUnitsUsedForScratch(const HardwareInfo *pHwInfo) const {
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/* For ICL+ maxThreadCount equals (EUCount * 8).
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ThreadCount/EUCount=7 is no longer valid, so we have to force 8 in below formula.
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This is required to allocate enough scratch space. */
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return pHwInfo->gtSystemInfo.MaxSubSlicesSupported * pHwInfo->gtSystemInfo.MaxEuPerSubSlice * 8;
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}
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template <>
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uint32_t HwHelperHw<Family>::getConfigureAddressSpaceMode() {
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return 1u;
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}
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template <>
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bool HwHelperHw<Family>::isLocalMemoryEnabled(const HardwareInfo &hwInfo) const {
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return Gen12LPHelpers::isLocalMemoryEnabled(hwInfo);
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}
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template <>
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bool HwHelperHw<Family>::isPageTableManagerSupported(const HardwareInfo &hwInfo) const {
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return Gen12LPHelpers::isPageTableManagerSupported(hwInfo);
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}
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template <>
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bool HwHelperHw<Family>::obtainRenderBufferCompressionPreference(const HardwareInfo &hwInfo, const size_t size) const {
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return Gen12LPHelpers::obtainRenderBufferCompressionPreference(hwInfo, size);
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}
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template <>
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bool HwHelperHw<Family>::allowsIndependentForwardProgress() {
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return false;
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}
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template <>
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void HwHelperHw<Family>::checkResourceCompatibility(Buffer *buffer, cl_int &errorCode) {
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if (buffer->getGraphicsAllocation()->getAllocationType() == GraphicsAllocation::AllocationType::BUFFER_COMPRESSED) {
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errorCode = CL_INVALID_MEM_OBJECT;
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}
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}
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template <>
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void HwHelperHw<Family>::setCapabilityCoherencyFlag(const HardwareInfo *pHwInfo, bool &coherencyFlag) {
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coherencyFlag = true;
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if (pHwInfo->platform.eProductFamily == IGFX_TIGERLAKE_LP && pHwInfo->platform.usRevId == 0x0) {
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//stepping A0 devices - turn off coherency
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coherencyFlag = false;
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}
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Gen12LPHelpers::adjustCoherencyFlag(pHwInfo->platform.eProductFamily, coherencyFlag);
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}
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template <>
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uint32_t HwHelperHw<Family>::getPitchAlignmentForImage(const HardwareInfo *hwInfo) {
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if (Gen12LPHelpers::imagePitchAlignmentWaRequired(hwInfo->platform.eProductFamily)) {
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auto stepping = hwInfo->platform.usRevId;
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if (stepping == 0) {
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return 64u;
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}
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return 4u;
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}
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return 4u;
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}
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template <>
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const std::vector<aub_stream::EngineType> HwHelperHw<Family>::getGpgpuEngineInstances() const {
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constexpr std::array<aub_stream::EngineType, 3> gpgpuEngineInstances = {{aub_stream::ENGINE_RCS,
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aub_stream::ENGINE_RCS, // low priority
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aub_stream::ENGINE_CCS}};
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return std::vector<aub_stream::EngineType>(gpgpuEngineInstances.begin(), gpgpuEngineInstances.end());
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};
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template <>
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void PipeControlHelper<Family>::addPipeControlWA(LinearStream &commandStream, const HardwareInfo &hwInfo) {
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if (Gen12LPHelpers::pipeControlWaRequired(hwInfo.platform.eProductFamily)) {
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auto stepping = hwInfo.platform.usRevId;
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if (stepping == 0) {
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auto pCmd = static_cast<Family::PIPE_CONTROL *>(commandStream.getSpace(sizeof(Family::PIPE_CONTROL)));
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*pCmd = Family::cmdInitPipeControl;
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pCmd->setCommandStreamerStallEnable(true);
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}
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}
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}
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template class AubHelperHw<Family>;
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template class HwHelperHw<Family>;
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template class FlatBatchBufferHelperHw<Family>;
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template struct PipeControlHelper<Family>;
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} // namespace NEO
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