85 lines
2.9 KiB
C++
85 lines
2.9 KiB
C++
/*
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* Copyright (C) 2017-2018 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "runtime/command_queue/gpgpu_walker.h"
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#include "runtime/command_stream/csr_definitions.h"
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#include "runtime/helpers/preamble.inl"
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namespace OCLRT {
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template <>
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uint32_t PreambleHelper<CNLFamily>::getL3Config(const HardwareInfo &hwInfo, bool useSLM) {
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uint32_t l3Config = 0;
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switch (hwInfo.pPlatform->eProductFamily) {
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case IGFX_CANNONLAKE:
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l3Config = getL3ConfigHelper<IGFX_CANNONLAKE>(useSLM);
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break;
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default:
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l3Config = getL3ConfigHelper<IGFX_CANNONLAKE>(true);
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}
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return l3Config;
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}
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template <>
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uint32_t PreambleHelper<CNLFamily>::getDefaultThreadArbitrationPolicy() {
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return ThreadArbitrationPolicy::RoundRobinAfterDependency;
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}
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template <>
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void PreambleHelper<CNLFamily>::programThreadArbitration(LinearStream *pCommandStream, uint32_t requiredThreadArbitrationPolicy) {
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UNRECOVERABLE_IF(requiredThreadArbitrationPolicy == ThreadArbitrationPolicy::NotPresent);
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auto pipeControl = pCommandStream->getSpaceForCmd<PIPE_CONTROL>();
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*pipeControl = PIPE_CONTROL::sInit();
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pipeControl->setCommandStreamerStallEnable(true);
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auto pCmd = pCommandStream->getSpaceForCmd<MI_LOAD_REGISTER_IMM>();
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*pCmd = MI_LOAD_REGISTER_IMM::sInit();
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pCmd->setRegisterOffset(RowChickenReg4::address);
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pCmd->setDataDword(RowChickenReg4::regDataForArbitrationPolicy[requiredThreadArbitrationPolicy]);
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}
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template <>
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size_t PreambleHelper<CNLFamily>::getThreadArbitrationCommandsSize() {
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return sizeof(MI_LOAD_REGISTER_IMM) + sizeof(PIPE_CONTROL);
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}
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template <>
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uint32_t PreambleHelper<CNLFamily>::getUrbEntryAllocationSize() {
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return 1024;
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}
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template <>
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void PreambleHelper<CNLFamily>::addPipeControlBeforeVfeCmd(LinearStream *pCommandStream, const HardwareInfo *hwInfo) {
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auto pipeControl = pCommandStream->getSpaceForCmd<PIPE_CONTROL>();
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*pipeControl = PIPE_CONTROL::sInit();
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pipeControl->setCommandStreamerStallEnable(true);
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if (hwInfo->pWaTable->waSendMIFLUSHBeforeVFE) {
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pipeControl->setRenderTargetCacheFlushEnable(true);
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pipeControl->setDepthCacheFlushEnable(true);
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pipeControl->setDcFlushEnable(true);
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}
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}
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template <>
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void PreambleHelper<CNLFamily>::programPipelineSelect(LinearStream *pCommandStream, const DispatchFlags &dispatchFlags) {
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typedef typename CNLFamily::PIPELINE_SELECT PIPELINE_SELECT;
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auto pCmd = (PIPELINE_SELECT *)pCommandStream->getSpace(sizeof(PIPELINE_SELECT));
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*pCmd = PIPELINE_SELECT::sInit();
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auto mask = pipelineSelectEnablePipelineSelectMaskBits | pipelineSelectMediaSamplerDopClockGateMaskBits;
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pCmd->setMaskBits(mask);
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pCmd->setPipelineSelection(PIPELINE_SELECT::PIPELINE_SELECTION_GPGPU);
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pCmd->setMediaSamplerDopClockGateEnable(!dispatchFlags.mediaSamplerRequired);
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}
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template struct PreambleHelper<CNLFamily>;
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} // namespace OCLRT
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