138 lines
4.5 KiB
C
138 lines
4.5 KiB
C
/*
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* Copyright (C) 2017-2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#pragma once
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#include "CL/cl.h"
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/**********************************
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* Internal only queue properties *
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**********************************/
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// Intel evaluation now. Remove it after approval for public release
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#define CL_DEVICE_DRIVER_VERSION_INTEL 0x10010
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#define CL_DEVICE_DRIVER_VERSION_INTEL_NEO1 0x454E4831 // Driver version is ENH1
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/*********************************
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* cl_intel_debug_info extension *
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*********************************/
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#define cl_intel_debug_info 1
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// New queries for clGetProgramInfo:
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#define CL_PROGRAM_DEBUG_INFO_INTEL 0x4100
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#define CL_PROGRAM_DEBUG_INFO_SIZES_INTEL 0x4101
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// New queries for clGetKernelInfo:
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#define CL_KERNEL_BINARY_PROGRAM_INTEL 0x407D
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#define CL_KERNEL_BINARIES_INTEL 0x4102
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#define CL_KERNEL_BINARY_SIZES_INTEL 0x4103
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#define CL_KERNEL_BINARY_GPU_ADDRESS_INTEL 0x10010
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/********************************************
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* event properties for performance counter *
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********************************************/
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/* performance counter */
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#define CL_PROFILING_COMMAND_PERFCOUNTERS_INTEL 0x407F
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/**************************
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* Internal only cl types *
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**************************/
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using cl_mem_alloc_flags_intel = cl_bitfield;
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using cl_mem_properties_intel = cl_bitfield;
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using cl_mem_flags_intel = cl_mem_flags;
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using cl_mem_info_intel = cl_uint;
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using cl_mem_advice_intel = cl_uint;
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using cl_unified_shared_memory_type_intel = cl_uint;
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using cl_unified_shared_memory_capabilities_intel = cl_bitfield;
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/******************************
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* Internal only cl_mem_flags *
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******************************/
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#define CL_MEM_FLAGS_INTEL 0x10001
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#define CL_MEM_LOCALLY_UNCACHED_RESOURCE (1 << 18)
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#define CL_MEM_LOCALLY_UNCACHED_SURFACE_STATE_RESOURCE (1 << 25)
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// Used with clEnqueueVerifyMemory
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#define CL_MEM_COMPARE_EQUAL 0u
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#define CL_MEM_COMPARE_NOT_EQUAL 1u
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#define CL_MEM_FORCE_LINEAR_STORAGE_INTEL (1 << 19)
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#define CL_MEM_FORCE_SHARED_PHYSICAL_MEMORY_INTEL (1 << 20)
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#define CL_MEM_ALLOCATION_HANDLE_INTEL 0x10050
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//Used with createBuffer
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#define CL_MEM_ALLOW_UNRESTRICTED_SIZE_INTEL (1 << 23)
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typedef cl_uint cl_execution_info_intel;
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#define CL_EXECUTION_INFO_MAX_WORKGROUP_COUNT_INTEL 0x10100
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/******************************
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* UNIFIED MEMORY *
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*******************************/
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/* cl_device_info */
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#define CL_DEVICE_HOST_MEM_CAPABILITIES_INTEL 0x4190
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#define CL_DEVICE_DEVICE_MEM_CAPABILITIES_INTEL 0x4191
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#define CL_DEVICE_SINGLE_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4192
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#define CL_DEVICE_CROSS_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4193
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#define CL_DEVICE_SHARED_SYSTEM_MEM_CAPABILITIES_INTEL 0x4194
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/* cl_unified_shared_memory_capabilities_intel - bitfield */
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#define CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL (1 << 0)
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#define CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL (1 << 1)
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#define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ACCESS_INTEL (1 << 2)
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#define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ATOMIC_ACCESS_INTEL (1 << 3)
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/* cl_mem_properties_intel */
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#define CL_MEM_ALLOC_FLAGS_INTEL 0x4195
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/* cl_mem_alloc_flags_intel - bitfield */
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#define CL_MEM_ALLOC_DEFAULT_INTEL 0
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#define CL_MEM_ALLOC_WRITE_COMBINED_INTEL (1 << 0)
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/* cl_mem_alloc_info_intel */
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#define CL_MEM_ALLOC_TYPE_INTEL 0x419A
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#define CL_MEM_ALLOC_BASE_PTR_INTEL 0x419B
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#define CL_MEM_ALLOC_SIZE_INTEL 0x419C
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#define CL_MEM_ALLOC_DEVICE_INTEL 0x419D
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/* cl_unified_shared_memory_type_intel */
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#define CL_MEM_TYPE_UNKNOWN_INTEL 0x4196
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#define CL_MEM_TYPE_HOST_INTEL 0x4197
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#define CL_MEM_TYPE_DEVICE_INTEL 0x4198
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#define CL_MEM_TYPE_SHARED_INTEL 0x4199
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/* cl_kernel_exec_info */
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#define CL_KERNEL_EXEC_INFO_INDIRECT_HOST_ACCESS_INTEL 0x4200
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#define CL_KERNEL_EXEC_INFO_INDIRECT_DEVICE_ACCESS_INTEL 0x4201
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#define CL_KERNEL_EXEC_INFO_INDIRECT_SHARED_ACCESS_INTEL 0x4202
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#define CL_KERNEL_EXEC_INFO_USM_PTRS_INTEL 0x4203
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#define CL_KERNEL_EXEC_INFO_THREAD_ARBITRATION_POLICY_OLDEST_FIRST_INTEL 0x10022
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#define CL_KERNEL_EXEC_INFO_THREAD_ARBITRATION_POLICY_ROUND_ROBIN_INTEL 0x10023
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#define CL_KERNEL_EXEC_INFO_THREAD_ARBITRATION_POLICY_AFTER_DEPENDENCY_ROUND_ROBIN_INTEL 0x10024
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#define CL_KERNEL_EXEC_INFO_THREAD_ARBITRATION_POLICY_INTEL 0x10025
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/* cl_command_type */
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#define CL_COMMAND_MEMSET_INTEL 0x4204
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#define CL_COMMAND_MEMFILL_INTEL 0x4204
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#define CL_COMMAND_MEMCPY_INTEL 0x4205
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#define CL_COMMAND_MIGRATEMEM_INTEL 0x4206
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#define CL_COMMAND_MEMADVISE_INTEL 0x4207
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/******************************
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* SLICE COUNT SELECTING *
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*******************************/
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/* cl_device_info */
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#define CL_DEVICE_SLICE_COUNT_INTEL 0x10020
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/* cl_queue_properties */
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#define CL_QUEUE_SLICE_COUNT_INTEL 0x10021
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