160 lines
4.5 KiB
C++
160 lines
4.5 KiB
C++
/*
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* Copyright (C) 2017-2018 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "unit_tests/libult/mock_gfx_family.h"
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#include "runtime/command_queue/gpgpu_walker.inl"
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#include "runtime/command_stream/preemption.inl"
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#include "runtime/device_queue/device_queue_hw.h"
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#include "runtime/device_queue/device_queue_hw.inl"
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#include "runtime/gen_common/aub_mapper.h"
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#include "runtime/helpers/hw_helper_common.inl"
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#include "runtime/helpers/kernel_commands.inl"
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#include "runtime/helpers/preamble.inl"
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namespace OCLRT {
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static AubMemDump::LrcaHelperRcs rcs(0x000000);
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static AubMemDump::LrcaHelperBcs bcs(0x020000);
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static AubMemDump::LrcaHelperVcs vcs(0x010000);
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static AubMemDump::LrcaHelperVecs vecs(0x018000);
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const AubMemDump::LrcaHelper *AUBFamilyMapper<GENX>::csTraits[EngineType::NUM_ENGINES] = {
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&rcs,
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&bcs,
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&vcs,
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&vecs};
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const MMIOList AUBFamilyMapper<GENX>::globalMMIO;
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bool (*GENX::isSimulationFcn)(unsigned short) = nullptr;
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GENX::GPGPU_WALKER GENX::cmdInitGpgpuWalker = GENX::GPGPU_WALKER::sInit();
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GENX::INTERFACE_DESCRIPTOR_DATA GENX::cmdInitInterfaceDescriptorData = GENX::INTERFACE_DESCRIPTOR_DATA::sInit();
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GENX::MEDIA_STATE_FLUSH GENX::cmdInitMediaStateFlush = GENX::MEDIA_STATE_FLUSH::sInit();
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GENX::MEDIA_INTERFACE_DESCRIPTOR_LOAD GENX::cmdInitMediaInterfaceDescriptorLoad = GENX::MEDIA_INTERFACE_DESCRIPTOR_LOAD::sInit();
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template <>
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size_t HwHelperHw<GENX>::getMaxBarrierRegisterPerSlice() const {
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return 32;
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}
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template <>
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void HwHelperHw<GENX>::setCapabilityCoherencyFlag(const HardwareInfo *pHwInfo, bool &coherencyFlag) {
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PLATFORM *pPlatform = const_cast<PLATFORM *>(pHwInfo->pPlatform);
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if (pPlatform->usDeviceID == 20) {
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coherencyFlag = false;
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} else {
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coherencyFlag = true;
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}
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}
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template <>
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bool HwHelperHw<GENX>::setupPreemptionRegisters(HardwareInfo *pHwInfo, bool enable) {
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pHwInfo->capabilityTable.whitelistedRegisters.csChicken1_0x2580 = enable;
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return enable;
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}
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template <>
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const AubMemDump::LrcaHelper &HwHelperHw<GENX>::getCsTraits(EngineType engineType) const {
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return *AUBFamilyMapper<GENX>::csTraits[engineType];
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}
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struct hw_helper_static_init {
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hw_helper_static_init() {
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hwHelperFactory[IGFX_UNKNOWN_CORE] = &HwHelperHw<GENX>::get();
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}
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};
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template class HwHelperHw<GENX>;
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hw_helper_static_init si;
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template class GpgpuWalkerHelper<GENX>;
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template <>
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bool KernelCommandsHelper<GENX>::isPipeControlWArequired() {
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return false;
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}
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template struct KernelCommandsHelper<GENX>;
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template <>
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size_t PreemptionHelper::getRequiredCmdStreamSize<GENX>(PreemptionMode newPreemptionMode, PreemptionMode oldPreemptionMode) {
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return 0;
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}
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template <>
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void PreemptionHelper::programCmdStream<GENX>(LinearStream &cmdStream, PreemptionMode newPreemptionMode, PreemptionMode oldPreemptionMode,
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GraphicsAllocation *preemptionCsr, Device &device) {
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}
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template <>
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size_t PreemptionHelper::getRequiredPreambleSize<GENX>(const Device &device) {
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return 0;
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}
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template <>
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void PreemptionHelper::programPreamble<GENX>(LinearStream &preambleCmdStream, Device &device,
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const GraphicsAllocation *preemptionCsr) {
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}
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template <>
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size_t PreemptionHelper::getPreemptionWaCsSize<GENX>(const Device &device) {
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return 0;
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}
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template void PreemptionHelper::programInterfaceDescriptorDataPreemption<GENX>(INTERFACE_DESCRIPTOR_DATA<GENX> *idd, PreemptionMode preemptionMode);
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template <>
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size_t DeviceQueueHw<GENX>::getWaCommandsSize() {
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return (size_t)0;
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}
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template <>
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void DeviceQueueHw<GENX>::addArbCheckCmdWa() {
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}
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template <>
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void DeviceQueueHw<GENX>::addMiAtomicCmdWa(uint64_t atomicOpPlaceholder) {
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}
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template <>
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void DeviceQueueHw<GENX>::addLriCmdWa(bool setArbCheck) {
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}
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template <>
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void DeviceQueueHw<GENX>::addPipeControlCmdWa(bool isNoopCmd) {
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}
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template <>
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void DeviceQueueHw<GENX>::addProfilingEndCmds(uint64_t timestampAddress) {
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}
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template class DeviceQueueHw<GENX>;
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template <>
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void PreambleHelper<GENX>::addPipeControlBeforeVfeCmd(LinearStream *pCommandStream, const HardwareInfo *hwInfo) {
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}
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template <>
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uint32_t PreambleHelper<GENX>::getL3Config(const HardwareInfo &hwInfo, bool useSLM) {
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uint32_t l3Config = 0;
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return l3Config;
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}
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template <>
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void PreambleHelper<GENX>::programPipelineSelect(LinearStream *pCommandStream, bool mediaSamplerRequired) {
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}
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template <>
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struct L3CNTLRegisterOffset<GENX> {
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static const uint32_t registerOffset = 0x7034;
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};
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template struct PreambleHelper<GENX>;
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} // namespace OCLRT
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