61 lines
2.3 KiB
C++
61 lines
2.3 KiB
C++
/*
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* Copyright (C) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "runtime/memory_manager/gfx_partition.h"
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#include "runtime/helpers/aligned_memory.h"
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namespace NEO {
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const std::array<HeapIndex, 4> GfxPartition::heap32Names{{HeapIndex::HEAP_INTERNAL_DEVICE_MEMORY,
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HeapIndex::HEAP_INTERNAL,
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HeapIndex::HEAP_EXTERNAL_DEVICE_MEMORY,
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HeapIndex::HEAP_EXTERNAL}};
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void GfxPartition::init(uint64_t gpuAddressSpace) {
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// 1) Full Range SVM gfx layout:
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//
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// SVM H0 H1 H2 H3 STANDARD STANDARD64K
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// |__________________________________|____|____|____|____|________________|______________|
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// | | | | | | | |
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// | gfxBase gfxTop
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// 0x0 0x0000800000000000/0x10000000 for 32 bit 0x0000FFFFFFFFFFFFFFFF
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//
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// 2) Limited Range gfx layout (no SVM):
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//
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// H0 H1 H2 H3 STANDARD STANDARD64K
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// |____|____|____|____|____________________|__________________|
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// | | | | | | |
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// gfxBase gfxTop
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// 0x0 0xFFF...FFF < 48 bit
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uint64_t gfxTop = gpuAddressSpace + 1;
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uint64_t gfxBase = is64bit ? MemoryConstants::max64BitAppAddress + 1 : MemoryConstants::max32BitAddress + 1;
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const uint64_t gfxHeap32Size = 4 * MemoryConstants::gigaByte;
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if (gpuAddressSpace < MemoryConstants::max48BitAddress) {
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gfxBase = 0ull;
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}
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heapInit(HeapIndex::HEAP_SVM, 0ull, gfxBase);
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for (auto heap : GfxPartition::heap32Names) {
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heapInit(heap, gfxBase, gfxHeap32Size);
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gfxBase += gfxHeap32Size;
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}
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uint64_t gfxStandardSize = alignDown((gfxTop - gfxBase) >> 1, heapGranularity);
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heapInit(HeapIndex::HEAP_STANDARD, gfxBase, gfxStandardSize);
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gfxBase += gfxStandardSize;
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heapInit(HeapIndex::HEAP_STANDARD64KB, gfxBase, gfxStandardSize);
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}
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} // namespace NEO
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