100 lines
3.9 KiB
C++
100 lines
3.9 KiB
C++
/*
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* Copyright (C) 2018-2020 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#pragma once
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#include "shared/source/helpers/pipeline_select_helper.h"
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#include "engine_node.h"
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#include "igfxfmid.h"
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#include <cstddef>
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#include <cstdint>
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namespace NEO {
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struct HardwareInfo;
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class Device;
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struct DispatchFlags;
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class GraphicsAllocation;
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class LinearStream;
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struct PipelineSelectArgs;
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template <typename GfxFamily>
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struct PreambleHelper {
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using MI_LOAD_REGISTER_IMM = typename GfxFamily::MI_LOAD_REGISTER_IMM;
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using PIPE_CONTROL = typename GfxFamily::PIPE_CONTROL;
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using VFE_STATE_TYPE = typename GfxFamily::VFE_STATE_TYPE;
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static void programL3(LinearStream *pCommandStream, uint32_t l3Config);
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static void programPipelineSelect(LinearStream *pCommandStream,
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const PipelineSelectArgs &pipelineSelectArgs,
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const HardwareInfo &hwInfo);
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static void programThreadArbitration(LinearStream *pCommandStream, uint32_t requiredThreadArbitrationPolicy);
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static void programPreemption(LinearStream *pCommandStream, Device &device, GraphicsAllocation *preemptionCsr);
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static void addPipeControlBeforeVfeCmd(LinearStream *pCommandStream, const HardwareInfo *hwInfo, aub_stream::EngineType engineType);
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static uint64_t programVFEState(LinearStream *pCommandStream,
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const HardwareInfo &hwInfo,
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int scratchSize,
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uint64_t scratchAddress,
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uint32_t maxFrontEndThreads,
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aub_stream::EngineType engineType);
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static void programAdditionalFieldsInVfeState(VFE_STATE_TYPE *mediaVfeState, const HardwareInfo &hwInfo);
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static void programPreamble(LinearStream *pCommandStream, Device &device, uint32_t l3Config,
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uint32_t requiredThreadArbitrationPolicy, GraphicsAllocation *preemptionCsr, GraphicsAllocation *perDssBackedBuffer);
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static void programKernelDebugging(LinearStream *pCommandStream);
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static void programPerDssBackedBuffer(LinearStream *pCommandStream, const HardwareInfo &hwInfo, GraphicsAllocation *perDssBackBufferOffset);
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static void programSemaphoreDelay(LinearStream *pCommandStream);
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static uint32_t getL3Config(const HardwareInfo &hwInfo, bool useSLM);
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static bool isL3Configurable(const HardwareInfo &hwInfo);
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static size_t getAdditionalCommandsSize(const Device &device);
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static size_t getThreadArbitrationCommandsSize();
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static size_t getVFECommandsSize();
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static size_t getKernelDebuggingCommandsSize(bool debuggingActive);
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static void programGenSpecificPreambleWorkArounds(LinearStream *pCommandStream, const HardwareInfo &hwInfo);
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static uint32_t getUrbEntryAllocationSize();
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static size_t getPerDssBackedBufferCommandsSize(const HardwareInfo &hwInfo);
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static size_t getCmdSizeForPipelineSelect(const HardwareInfo &hwInfo);
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static size_t getSemaphoreDelayCommandSize();
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};
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template <PRODUCT_FAMILY ProductFamily>
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static uint32_t getL3ConfigHelper(bool useSLM);
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template <PRODUCT_FAMILY ProductFamily>
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struct L3CNTLREGConfig {
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static const uint32_t valueForSLM;
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static const uint32_t valueForNoSLM;
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};
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template <PRODUCT_FAMILY ProductFamily>
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uint32_t getL3ConfigHelper(bool useSLM) {
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if (!useSLM) {
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return L3CNTLREGConfig<ProductFamily>::valueForNoSLM;
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}
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return L3CNTLREGConfig<ProductFamily>::valueForSLM;
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}
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template <typename GfxFamily>
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struct L3CNTLRegisterOffset {
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static const uint32_t registerOffset;
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};
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template <typename GfxFamily>
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struct DebugModeRegisterOffset {
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enum {
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registerOffset = 0x20ec,
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debugEnabledValue = (1 << 6) | (1 << 22)
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};
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};
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namespace TdDebugControlRegisterOffset {
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static constexpr uint32_t registerOffset = 0xe400;
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static constexpr uint32_t debugEnabledValue = (1 << 4) | (1 << 7);
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}; // namespace TdDebugControlRegisterOffset
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} // namespace NEO
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