103 lines
3.8 KiB
C++
103 lines
3.8 KiB
C++
/*
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* Copyright (c) 2018, Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "runtime/command_stream/thread_arbitration_policy.h"
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#include "runtime/helpers/options.h"
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#include "runtime/helpers/preamble.h"
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#include "runtime/gen8/reg_configs.h"
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#include "unit_tests/preamble/preamble_fixture.h"
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#include "unit_tests/fixtures/platform_fixture.h"
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using namespace OCLRT;
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typedef PreambleFixture BdwSlm;
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BDWTEST_F(BdwSlm, shouldBeEnabledOnGen8) {
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typedef BDWFamily::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
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LinearStream &cs = linearStream;
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uint32_t l3Config = PreambleHelper<BDWFamily>::getL3Config(**platformDevices, true);
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PreambleHelper<BDWFamily>::programL3(&cs, l3Config);
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parseCommands<BDWFamily>(cs);
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auto itorLRI = find<MI_LOAD_REGISTER_IMM *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorLRI);
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const auto &lri = *reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*itorLRI);
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auto RegisterOffset = L3CNTLRegisterOffset<BDWFamily>::registerOffset;
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EXPECT_EQ(RegisterOffset, lri.getRegisterOffset());
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EXPECT_EQ(1u, lri.getDataDword() & 1);
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}
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typedef PreambleFixture Gen8L3Config;
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BDWTEST_F(Gen8L3Config, checkNoSLM) {
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bool slmUsed = false;
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uint32_t l3Config = 0;
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l3Config = getL3ConfigHelper<IGFX_BROADWELL>(slmUsed);
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EXPECT_EQ(0x80000140u, l3Config);
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}
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BDWTEST_F(Gen8L3Config, checkSLM) {
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bool slmUsed = true;
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uint32_t l3Config = 0;
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l3Config = getL3ConfigHelper<IGFX_BROADWELL>(slmUsed);
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EXPECT_EQ(0x60000121u, l3Config);
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}
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typedef PreambleFixture ThreadArbitrationGen8;
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BDWTEST_F(ThreadArbitrationGen8, givenPolicyWhenThreadArbitrationProgrammedThenDoNothing) {
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typedef BDWFamily::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
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LinearStream &cs = linearStream;
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PreambleHelper<BDWFamily>::programThreadArbitration(&cs, ThreadArbitrationPolicy::RoundRobin);
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EXPECT_EQ(0u, cs.getUsed());
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EXPECT_EQ(0u, PreambleHelper<BDWFamily>::getAdditionalCommandsSize(MockDevice(**platformDevices)));
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EXPECT_EQ(0u, PreambleHelper<BDWFamily>::getDefaultThreadArbitrationPolicy());
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}
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typedef PreambleFixture Gen8UrbEntryAllocationSize;
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BDWTEST_F(Gen8UrbEntryAllocationSize, getUrbEntryAllocationSize) {
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uint32_t actualVal = PreambleHelper<FamilyType>::getUrbEntryAllocationSize();
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EXPECT_EQ(0x782u, actualVal);
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}
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BDWTEST_F(PreambleVfeState, basic) {
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typedef BDWFamily::PIPE_CONTROL PIPE_CONTROL;
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LinearStream &cs = linearStream;
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PreambleHelper<BDWFamily>::programVFEState(&linearStream, **platformDevices, 0, 0);
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parseCommands<BDWFamily>(cs);
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auto itorPC = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
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ASSERT_NE(cmdList.end(), itorPC);
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const auto &pc = *reinterpret_cast<PIPE_CONTROL *>(*itorPC);
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EXPECT_TRUE(pc.getDcFlushEnable());
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EXPECT_EQ(1u, pc.getCommandStreamerStallEnable());
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}
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