37 lines
1.5 KiB
C++
37 lines
1.5 KiB
C++
/*
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* Copyright (C) 2018-2021 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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// clang-format off
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using namespace NEO;
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using GPGPU_CSR_BASE_ADDRESS = GenStruct::GPGPU_CSR_BASE_ADDRESS;
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using STATE_SIP = GenStruct::STATE_SIP;
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// clang-format on
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template <>
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GPGPU_CSR_BASE_ADDRESS *genCmdCast<GPGPU_CSR_BASE_ADDRESS *>(void *buffer) {
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auto pCmd = reinterpret_cast<GPGPU_CSR_BASE_ADDRESS *>(buffer);
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return GPGPU_CSR_BASE_ADDRESS::COMMAND_TYPE_GFXPIPE == pCmd->TheStructure.Common.CommandType &&
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GPGPU_CSR_BASE_ADDRESS::COMMAND_SUBTYPE_GFXPIPE_COMMON == pCmd->TheStructure.Common.CommandSubtype &&
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GPGPU_CSR_BASE_ADDRESS::_3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED == pCmd->TheStructure.Common._3DCommandOpcode &&
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GPGPU_CSR_BASE_ADDRESS::_3D_COMMAND_SUB_OPCODE_GPGPU_CSR_BASE_ADDRESS == pCmd->TheStructure.Common._3DCommandSubOpcode
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? pCmd
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: nullptr;
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}
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template <>
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STATE_SIP *genCmdCast<STATE_SIP *>(void *buffer) {
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auto pCmd = reinterpret_cast<STATE_SIP *>(buffer);
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return STATE_SIP::COMMAND_TYPE_GFXPIPE == pCmd->TheStructure.Common.CommandType &&
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STATE_SIP::COMMAND_SUBTYPE_GFXPIPE_COMMON == pCmd->TheStructure.Common.CommandSubtype &&
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STATE_SIP::_3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED == pCmd->TheStructure.Common._3DCommandOpcode &&
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STATE_SIP::_3D_COMMAND_SUB_OPCODE_STATE_SIP == pCmd->TheStructure.Common._3DCommandSubOpcode
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? pCmd
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: nullptr;
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}
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