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39 lines
1.3 KiB
C++
39 lines
1.3 KiB
C++
/*
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* Copyright (C) 2021-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/source/os_interface/hw_info_config.h"
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#include "opencl/source/helpers/cl_hw_helper.h"
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namespace NEO {
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template <typename GfxFamily>
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inline cl_command_queue_capabilities_intel ClHwHelperHw<GfxFamily>::getAdditionalDisabledQueueFamilyCapabilities(EngineGroupType type) const {
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return 0;
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}
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template <typename GfxFamily>
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cl_ulong ClHwHelperHw<GfxFamily>::getKernelPrivateMemSize(const KernelInfo &kernelInfo) const {
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const auto &kernelAttributes = kernelInfo.kernelDescriptor.kernelAttributes;
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return (kernelAttributes.perThreadScratchSize[1] > 0) ? kernelAttributes.perThreadScratchSize[1] : kernelAttributes.perHwThreadPrivateMemorySize;
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}
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template <typename GfxFamily>
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cl_device_feature_capabilities_intel ClHwHelperHw<GfxFamily>::getSupportedDeviceFeatureCapabilities(const HardwareInfo &hwInfo) const {
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auto &hwInfoConfig = *HwInfoConfig::get(hwInfo.platform.eProductFamily);
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if (hwInfoConfig.isMatrixMultiplyAccumulateSupported(hwInfo)) {
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return CL_DEVICE_FEATURE_FLAG_DPAS_INTEL | CL_DEVICE_FEATURE_FLAG_DP4A_INTEL;
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}
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return CL_DEVICE_FEATURE_FLAG_DP4A_INTEL;
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}
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template <typename GfxFamily>
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bool ClHwHelperHw<GfxFamily>::isFormatRedescribable(cl_image_format format) const {
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return false;
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}
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} // namespace NEO
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