mirror of
https://github.com/intel/compute-runtime.git
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a820e73dd7
With compiler LSC WAs this gives better performance. If debugger is active, policy will not be changed ie. will be WBP. Related-To: NEO-7003 Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
481 lines
23 KiB
C++
481 lines
23 KiB
C++
/*
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* Copyright (C) 2020-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#pragma once
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#include "shared/source/command_container/cmdcontainer.h"
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#include "shared/source/debugger/debugger.h"
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#include "shared/source/execution_environment/execution_environment.h"
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#include "shared/source/gmm_helper/gmm_lib.h"
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#include "shared/source/helpers/definitions/mi_flush_args.h"
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#include "shared/source/helpers/pipe_control_args.h"
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#include "shared/source/helpers/register_offsets.h"
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#include "shared/source/kernel/dispatch_kernel_encoder_interface.h"
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#include "shared/source/kernel/kernel_arg_descriptor.h"
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#include "encode_surface_state_args.h"
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namespace NEO {
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class BindlessHeapsHelper;
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class GmmHelper;
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class LogicalStateHelper;
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class IndirectHeap;
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class LogicalStateHelper;
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class Gmm;
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struct HardwareInfo;
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struct StateComputeModeProperties;
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struct EncodeDispatchKernelArgs {
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uint64_t eventAddress = 0ull;
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Device *device = nullptr;
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DispatchKernelEncoderI *dispatchInterface = nullptr;
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const void *threadGroupDimensions = nullptr;
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PreemptionMode preemptionMode = PreemptionMode::Initial;
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uint32_t partitionCount = 0u;
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bool isIndirect = false;
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bool isPredicate = false;
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bool isTimestampEvent = false;
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bool requiresUncachedMocs = false;
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bool useGlobalAtomics = false;
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bool isInternal = false;
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bool isCooperative = false;
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bool isHostScopeSignalEvent = false;
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bool isKernelUsingSystemAllocation = false;
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bool isKernelDispatchedFromImmediateCmdList = false;
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bool isRcs = false;
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};
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struct EncodeWalkerArgs {
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KernelExecutionType kernelExecutionType = KernelExecutionType::Default;
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bool requiredSystemFence = false;
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};
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template <typename GfxFamily>
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struct EncodeDispatchKernel {
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using WALKER_TYPE = typename GfxFamily::WALKER_TYPE;
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using INTERFACE_DESCRIPTOR_DATA = typename GfxFamily::INTERFACE_DESCRIPTOR_DATA;
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using BINDING_TABLE_STATE = typename GfxFamily::BINDING_TABLE_STATE;
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static void encode(CommandContainer &container, EncodeDispatchKernelArgs &args, LogicalStateHelper *logicalStateHelper);
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static void encodeAdditionalWalkerFields(const HardwareInfo &hwInfo, WALKER_TYPE &walkerCmd, const EncodeWalkerArgs &walkerArgs);
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static void appendAdditionalIDDFields(INTERFACE_DESCRIPTOR_DATA *pInterfaceDescriptor, const HardwareInfo &hwInfo,
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const uint32_t threadsPerThreadGroup, uint32_t slmTotalSize, SlmPolicy slmPolicy);
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static void setGrfInfo(INTERFACE_DESCRIPTOR_DATA *pInterfaceDescriptor, uint32_t numGrf, const size_t &sizeCrossThreadData,
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const size_t &sizePerThreadData, const HardwareInfo &hwInfo);
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static void *getInterfaceDescriptor(CommandContainer &container, uint32_t &iddOffset);
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static bool isRuntimeLocalIdsGenerationRequired(uint32_t activeChannels,
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const size_t *lws,
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std::array<uint8_t, 3> walkOrder,
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bool requireInputWalkOrder,
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uint32_t &requiredWalkOrder,
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uint32_t simd);
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static bool inlineDataProgrammingRequired(const KernelDescriptor &kernelDesc);
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static void encodeThreadData(WALKER_TYPE &walkerCmd,
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const uint32_t *startWorkGroup,
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const uint32_t *numWorkGroups,
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const uint32_t *workGroupSizes,
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uint32_t simd,
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uint32_t localIdDimensions,
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uint32_t threadsPerThreadGroup,
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uint32_t threadExecutionMask,
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bool localIdsGenerationByRuntime,
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bool inlineDataProgrammingRequired,
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bool isIndirect,
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uint32_t requiredWorkGroupOrder,
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const HardwareInfo &hwInfo);
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static void programBarrierEnable(INTERFACE_DESCRIPTOR_DATA &interfaceDescriptor, uint32_t value, const HardwareInfo &hwInfo);
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static void adjustInterfaceDescriptorData(INTERFACE_DESCRIPTOR_DATA &interfaceDescriptor, const HardwareInfo &hwInfo, const uint32_t threadGroupCount, const uint32_t numGrf);
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static void adjustBindingTablePrefetch(INTERFACE_DESCRIPTOR_DATA &interfaceDescriptor, uint32_t samplerCount, uint32_t bindingTableEntryCount);
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static void adjustTimestampPacket(WALKER_TYPE &walkerCmd, const HardwareInfo &hwInfo);
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static void setupPostSyncMocs(WALKER_TYPE &walkerCmd, const RootDeviceEnvironment &rootDeviceEnvironment);
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static void adjustWalkOrder(WALKER_TYPE &walkerCmd, uint32_t requiredWorkGroupOrder, const HardwareInfo &hwInfo);
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static constexpr bool shouldUpdateGlobalAtomics(bool ¤tVal, bool refVal, bool updateCurrent);
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};
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template <typename GfxFamily>
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struct EncodeStates {
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using BINDING_TABLE_STATE = typename GfxFamily::BINDING_TABLE_STATE;
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using INTERFACE_DESCRIPTOR_DATA = typename GfxFamily::INTERFACE_DESCRIPTOR_DATA;
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using SAMPLER_STATE = typename GfxFamily::SAMPLER_STATE;
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using SAMPLER_BORDER_COLOR_STATE = typename GfxFamily::SAMPLER_BORDER_COLOR_STATE;
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static const uint32_t alignIndirectStatePointer = MemoryConstants::cacheLineSize;
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static const size_t alignInterfaceDescriptorData = MemoryConstants::cacheLineSize;
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static uint32_t copySamplerState(IndirectHeap *dsh,
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uint32_t samplerStateOffset,
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uint32_t samplerCount,
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uint32_t borderColorOffset,
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const void *fnDynamicStateHeap,
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BindlessHeapsHelper *bindlessHeapHelper,
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const HardwareInfo &hwInfo);
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};
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template <typename GfxFamily>
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struct EncodeMath {
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using MI_MATH_ALU_INST_INLINE = typename GfxFamily::MI_MATH_ALU_INST_INLINE;
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using MI_MATH = typename GfxFamily::MI_MATH;
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constexpr static size_t streamCommandSize = sizeof(MI_MATH) + sizeof(MI_MATH_ALU_INST_INLINE) * NUM_ALU_INST_FOR_READ_MODIFY_WRITE;
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static uint32_t *commandReserve(CommandContainer &container);
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static uint32_t *commandReserve(LinearStream &cmdStream);
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static void greaterThan(CommandContainer &container,
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AluRegisters firstOperandRegister,
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AluRegisters secondOperandRegister,
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AluRegisters finalResultRegister);
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static void addition(CommandContainer &container,
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AluRegisters firstOperandRegister,
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AluRegisters secondOperandRegister,
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AluRegisters finalResultRegister);
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static void addition(LinearStream &cmdStream,
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AluRegisters firstOperandRegister,
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AluRegisters secondOperandRegister,
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AluRegisters finalResultRegister);
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static void bitwiseAnd(CommandContainer &container,
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AluRegisters firstOperandRegister,
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AluRegisters secondOperandRegister,
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AluRegisters finalResultRegister);
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};
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template <typename GfxFamily>
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struct EncodeMathMMIO {
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using MI_STORE_REGISTER_MEM = typename GfxFamily::MI_STORE_REGISTER_MEM;
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using MI_MATH_ALU_INST_INLINE = typename GfxFamily::MI_MATH_ALU_INST_INLINE;
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using MI_MATH = typename GfxFamily::MI_MATH;
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static const size_t size = sizeof(MI_STORE_REGISTER_MEM);
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static void encodeMulRegVal(CommandContainer &container, uint32_t offset, uint32_t val, uint64_t dstAddress);
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static void encodeGreaterThanPredicate(CommandContainer &container, uint64_t lhsVal, uint32_t rhsVal);
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static void encodeBitwiseAndVal(CommandContainer &container,
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uint32_t regOffset,
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uint32_t immVal,
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uint64_t dstAddress,
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bool workloadPartition);
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static void encodeAlu(MI_MATH_ALU_INST_INLINE *pAluParam, AluRegisters srcA, AluRegisters srcB, AluRegisters op, AluRegisters dest, AluRegisters result);
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static void encodeAluSubStoreCarry(MI_MATH_ALU_INST_INLINE *pAluParam, AluRegisters regA, AluRegisters regB, AluRegisters finalResultRegister);
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static void encodeAluAdd(MI_MATH_ALU_INST_INLINE *pAluParam,
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AluRegisters firstOperandRegister,
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AluRegisters secondOperandRegister,
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AluRegisters finalResultRegister);
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static void encodeAluAnd(MI_MATH_ALU_INST_INLINE *pAluParam,
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AluRegisters firstOperandRegister,
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AluRegisters secondOperandRegister,
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AluRegisters finalResultRegister);
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};
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template <typename GfxFamily>
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struct EncodeIndirectParams {
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using MI_LOAD_REGISTER_IMM = typename GfxFamily::MI_LOAD_REGISTER_IMM;
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using MI_LOAD_REGISTER_MEM = typename GfxFamily::MI_LOAD_REGISTER_MEM;
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using MI_LOAD_REGISTER_REG = typename GfxFamily::MI_LOAD_REGISTER_REG;
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using MI_STORE_REGISTER_MEM = typename GfxFamily::MI_STORE_REGISTER_MEM;
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using MI_MATH = typename GfxFamily::MI_MATH;
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using MI_MATH_ALU_INST_INLINE = typename GfxFamily::MI_MATH_ALU_INST_INLINE;
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static void encode(CommandContainer &container, uint64_t crossThreadDataGpuVa, DispatchKernelEncoderI *dispatchInterface, uint64_t implicitArgsGpuPtr);
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static void setGroupCountIndirect(CommandContainer &container, const NEO::CrossThreadDataOffset offsets[3], uint64_t crossThreadAddress);
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static void setWorkDimIndirect(CommandContainer &container, const NEO::CrossThreadDataOffset offset, uint64_t crossThreadAddress, const uint32_t *groupSize);
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static void setGlobalWorkSizeIndirect(CommandContainer &container, const NEO::CrossThreadDataOffset offsets[3], uint64_t crossThreadAddress, const uint32_t *lws);
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static size_t getCmdsSizeForSetWorkDimIndirect(const uint32_t *groupSize, bool misalignedPtr);
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};
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template <typename GfxFamily>
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struct EncodeSetMMIO {
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using MI_LOAD_REGISTER_IMM = typename GfxFamily::MI_LOAD_REGISTER_IMM;
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using MI_LOAD_REGISTER_MEM = typename GfxFamily::MI_LOAD_REGISTER_MEM;
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using MI_LOAD_REGISTER_REG = typename GfxFamily::MI_LOAD_REGISTER_REG;
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static const size_t sizeIMM = sizeof(MI_LOAD_REGISTER_IMM);
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static const size_t sizeMEM = sizeof(MI_LOAD_REGISTER_MEM);
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static const size_t sizeREG = sizeof(MI_LOAD_REGISTER_REG);
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static void encodeIMM(CommandContainer &container, uint32_t offset, uint32_t data, bool remap);
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static void encodeMEM(CommandContainer &container, uint32_t offset, uint64_t address);
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static void encodeREG(CommandContainer &container, uint32_t dstOffset, uint32_t srcOffset);
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static void encodeIMM(LinearStream &cmdStream, uint32_t offset, uint32_t data, bool remap);
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static void encodeMEM(LinearStream &cmdStream, uint32_t offset, uint64_t address);
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static void encodeREG(LinearStream &cmdStream, uint32_t dstOffset, uint32_t srcOffset);
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static bool isRemapApplicable(uint32_t offset);
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static void remapOffset(MI_LOAD_REGISTER_MEM *pMiLoadReg);
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static void remapOffset(MI_LOAD_REGISTER_REG *pMiLoadReg);
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};
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template <typename GfxFamily>
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struct EncodeL3State {
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static void encode(CommandContainer &container, bool enableSLM);
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};
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template <typename GfxFamily>
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struct EncodeMediaInterfaceDescriptorLoad {
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using INTERFACE_DESCRIPTOR_DATA = typename GfxFamily::INTERFACE_DESCRIPTOR_DATA;
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static void encode(CommandContainer &container);
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};
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template <typename GfxFamily>
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struct EncodeStateBaseAddressArgs {
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using STATE_BASE_ADDRESS = typename GfxFamily::STATE_BASE_ADDRESS;
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CommandContainer *container = nullptr;
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STATE_BASE_ADDRESS &sbaCmd;
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uint32_t statelessMocsIndex = 0;
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bool useGlobalAtomics = false;
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bool multiOsContextCapable = false;
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bool isRcs = false;
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};
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template <typename GfxFamily>
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struct EncodeStateBaseAddress {
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using STATE_BASE_ADDRESS = typename GfxFamily::STATE_BASE_ADDRESS;
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static void encode(EncodeStateBaseAddressArgs<GfxFamily> &args);
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static void setSbaAddressesForDebugger(NEO::Debugger::SbaAddresses &sbaAddress, const STATE_BASE_ADDRESS &sbaCmd);
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static size_t getRequiredSizeForStateBaseAddress(Device &device, CommandContainer &container, bool isRcs);
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};
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template <typename GfxFamily>
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struct EncodeStoreMMIO {
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using MI_STORE_REGISTER_MEM = typename GfxFamily::MI_STORE_REGISTER_MEM;
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static const size_t size = sizeof(MI_STORE_REGISTER_MEM);
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static void encode(LinearStream &csr, uint32_t offset, uint64_t address, bool workloadPartition);
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static void encode(MI_STORE_REGISTER_MEM *cmdBuffer, uint32_t offset, uint64_t address, bool workloadPartition);
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static void appendFlags(MI_STORE_REGISTER_MEM *storeRegMem, bool workloadPartition);
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};
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template <typename GfxFamily>
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struct EncodeSurfaceState {
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using R_SURFACE_STATE = typename GfxFamily::RENDER_SURFACE_STATE;
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using SURFACE_FORMAT = typename R_SURFACE_STATE::SURFACE_FORMAT;
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using AUXILIARY_SURFACE_MODE = typename R_SURFACE_STATE::AUXILIARY_SURFACE_MODE;
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using COHERENCY_TYPE = typename R_SURFACE_STATE::COHERENCY_TYPE;
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static void encodeBuffer(EncodeSurfaceStateArgs &args);
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static void encodeExtraBufferParams(EncodeSurfaceStateArgs &args);
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static void encodeImplicitScalingParams(const EncodeSurfaceStateArgs &args);
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static void encodeExtraCacheSettings(R_SURFACE_STATE *surfaceState, const EncodeSurfaceStateArgs &args);
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static void appendBufferSurfaceState(EncodeSurfaceStateArgs &args);
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static constexpr uintptr_t getSurfaceBaseAddressAlignmentMask() {
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return ~(getSurfaceBaseAddressAlignment() - 1);
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}
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static constexpr uintptr_t getSurfaceBaseAddressAlignment() { return 4; }
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static void getSshAlignedPointer(uintptr_t &ptr, size_t &offset);
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static bool doBindingTablePrefetch();
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static size_t pushBindingTableAndSurfaceStates(IndirectHeap &dstHeap, size_t bindingTableCount,
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const void *srcKernelSsh, size_t srcKernelSshSize,
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size_t numberOfBindingTableStates, size_t offsetOfBindingTable);
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static void appendImageCompressionParams(R_SURFACE_STATE *surfaceState, GraphicsAllocation *allocation, GmmHelper *gmmHelper,
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bool imageFromBuffer, GMM_YUV_PLANE_ENUM plane);
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static void setCoherencyType(R_SURFACE_STATE *surfaceState, COHERENCY_TYPE coherencyType);
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static void setBufferAuxParamsForCCS(R_SURFACE_STATE *surfaceState);
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static void setImageAuxParamsForCCS(R_SURFACE_STATE *surfaceState, Gmm *gmm);
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static bool isAuxModeEnabled(R_SURFACE_STATE *surfaceState, Gmm *gmm);
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static void setAuxParamsForMCSCCS(R_SURFACE_STATE *surfaceState);
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static void setClearColorParams(R_SURFACE_STATE *surfaceState, Gmm *gmm);
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static void setFlagsForMediaCompression(R_SURFACE_STATE *surfaceState, Gmm *gmm);
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static void disableCompressionFlags(R_SURFACE_STATE *surfaceState);
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static void appendParamsForImageFromBuffer(R_SURFACE_STATE *surfaceState);
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};
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template <typename GfxFamily>
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struct EncodeComputeMode {
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static size_t getCmdSizeForComputeMode(const HardwareInfo &hwInfo, bool hasSharedHandles, bool isRcs);
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static void programComputeModeCommandWithSynchronization(LinearStream &csr, StateComputeModeProperties &properties,
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const PipelineSelectArgs &args, bool hasSharedHandles,
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const HardwareInfo &hwInfo, bool isRcs, LogicalStateHelper *logicalStateHelper);
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static void programComputeModeCommand(LinearStream &csr, StateComputeModeProperties &properties, const HardwareInfo &hwInfo, LogicalStateHelper *logicalStateHelper);
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static void adjustPipelineSelect(CommandContainer &container, const NEO::KernelDescriptor &kernelDescriptor);
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};
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template <typename GfxFamily>
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struct EncodeWA {
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static void encodeAdditionalPipelineSelect(LinearStream &stream, const PipelineSelectArgs &args, bool is3DPipeline,
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const HardwareInfo &hwInfo, bool isRcs);
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static size_t getAdditionalPipelineSelectSize(Device &device, bool isRcs);
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static void addPipeControlPriorToNonPipelinedStateCommand(LinearStream &commandStream, PipeControlArgs args,
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const HardwareInfo &hwInfo, bool isRcs);
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static void setAdditionalPipeControlFlagsForNonPipelineStateCommand(PipeControlArgs &args);
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static void addPipeControlBeforeStateBaseAddress(LinearStream &commandStream, const HardwareInfo &hwInfo, bool isRcs);
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static void adjustCompressionFormatForPlanarImage(uint32_t &compressionFormat, GMM_YUV_PLANE_ENUM plane);
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};
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template <typename GfxFamily>
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struct EncodeSempahore {
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using MI_SEMAPHORE_WAIT = typename GfxFamily::MI_SEMAPHORE_WAIT;
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using COMPARE_OPERATION = typename GfxFamily::MI_SEMAPHORE_WAIT::COMPARE_OPERATION;
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static constexpr uint32_t invalidHardwareTag = -2;
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static void programMiSemaphoreWait(MI_SEMAPHORE_WAIT *cmd,
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uint64_t compareAddress,
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uint32_t compareData,
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COMPARE_OPERATION compareMode,
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bool registerPollMode);
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static void addMiSemaphoreWaitCommand(LinearStream &commandStream,
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uint64_t compareAddress,
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uint32_t compareData,
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COMPARE_OPERATION compareMode,
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bool registerPollMode);
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static void addMiSemaphoreWaitCommand(LinearStream &commandStream,
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uint64_t compareAddress,
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uint32_t compareData,
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COMPARE_OPERATION compareMode);
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static size_t getSizeMiSemaphoreWait();
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};
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template <typename GfxFamily>
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struct EncodeAtomic {
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using MI_ATOMIC = typename GfxFamily::MI_ATOMIC;
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using ATOMIC_OPCODES = typename GfxFamily::MI_ATOMIC::ATOMIC_OPCODES;
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using DATA_SIZE = typename GfxFamily::MI_ATOMIC::DATA_SIZE;
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static void programMiAtomic(LinearStream &commandStream,
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uint64_t writeAddress,
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ATOMIC_OPCODES opcode,
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DATA_SIZE dataSize,
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uint32_t returnDataControl,
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uint32_t csStall,
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uint32_t operand1dword0,
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uint32_t operand1dword1);
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static void programMiAtomic(MI_ATOMIC *atomic,
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uint64_t writeAddress,
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ATOMIC_OPCODES opcode,
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DATA_SIZE dataSize,
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uint32_t returnDataControl,
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uint32_t csStall,
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uint32_t operand1dword0,
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uint32_t operand1dword1);
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static void setMiAtomicAddress(MI_ATOMIC &atomic, uint64_t writeAddress);
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};
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template <typename GfxFamily>
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struct EncodeBatchBufferStartOrEnd {
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using MI_BATCH_BUFFER_START = typename GfxFamily::MI_BATCH_BUFFER_START;
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using MI_BATCH_BUFFER_END = typename GfxFamily::MI_BATCH_BUFFER_END;
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static void programBatchBufferStart(LinearStream *commandStream,
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uint64_t address,
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bool secondLevel);
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static void programBatchBufferEnd(CommandContainer &container);
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};
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template <typename GfxFamily>
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struct EncodeMiFlushDW {
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using MI_FLUSH_DW = typename GfxFamily::MI_FLUSH_DW;
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static void programMiFlushDw(LinearStream &commandStream, uint64_t immediateDataGpuAddress, uint64_t immediateData,
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MiFlushArgs &args, const HardwareInfo &hwInfo);
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static void programMiFlushDwWA(LinearStream &commandStream);
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static void appendMiFlushDw(MI_FLUSH_DW *miFlushDwCmd, const HardwareInfo &hwInfo);
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static size_t getMiFlushDwCmdSizeForDataWrite();
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static size_t getMiFlushDwWaSize();
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};
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template <typename GfxFamily>
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struct EncodeMemoryPrefetch {
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static void programMemoryPrefetch(LinearStream &commandStream, const GraphicsAllocation &graphicsAllocation, uint32_t size, size_t offset, const HardwareInfo &hwInfo);
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static size_t getSizeForMemoryPrefetch(size_t size, const HardwareInfo &hwInfo);
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};
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template <typename GfxFamily>
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struct EncodeMiArbCheck {
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using MI_ARB_CHECK = typename GfxFamily::MI_ARB_CHECK;
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|
|
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static void program(LinearStream &commandStream);
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static void adjust(MI_ARB_CHECK &miArbCheck);
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|
static size_t getCommandSize();
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|
};
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|
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|
template <typename GfxFamily>
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|
struct EncodeEnableRayTracing {
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|
static void programEnableRayTracing(LinearStream &commandStream, uint64_t backBuffer);
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|
static void append3dStateBtd(void *ptr3dStateBtd);
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|
};
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|
|
|
template <typename GfxFamily>
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|
struct EncodeNoop {
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|
static void alignToCacheLine(LinearStream &commandStream);
|
|
static void emitNoop(LinearStream &commandStream, size_t bytesToUpdate);
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|
};
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|
|
|
template <typename GfxFamily>
|
|
struct EncodeStoreMemory {
|
|
using MI_STORE_DATA_IMM = typename GfxFamily::MI_STORE_DATA_IMM;
|
|
static void programStoreDataImm(LinearStream &commandStream,
|
|
uint64_t gpuAddress,
|
|
uint32_t dataDword0,
|
|
uint32_t dataDword1,
|
|
bool storeQword,
|
|
bool workloadPartitionOffset);
|
|
|
|
static void programStoreDataImm(MI_STORE_DATA_IMM *cmdBuffer,
|
|
uint64_t gpuAddress,
|
|
uint32_t dataDword0,
|
|
uint32_t dataDword1,
|
|
bool storeQword,
|
|
bool workloadPartitionOffset);
|
|
|
|
static size_t getStoreDataImmSize() {
|
|
return sizeof(MI_STORE_DATA_IMM);
|
|
}
|
|
};
|
|
|
|
template <typename GfxFamily>
|
|
struct EncodeMemoryFence {
|
|
static size_t getSystemMemoryFenceSize();
|
|
|
|
static void encodeSystemMemoryFence(LinearStream &commandStream, const GraphicsAllocation *globalFenceAllocation, LogicalStateHelper *logicalStateHelper);
|
|
};
|
|
|
|
template <typename GfxFamily>
|
|
struct EncodeKernelArgsBuffer {
|
|
static size_t getKernelArgsBufferCmdsSize(const GraphicsAllocation *kernelArgsBufferAllocation, LogicalStateHelper *logicalStateHelper);
|
|
|
|
static void encodeKernelArgsBufferCmds(const GraphicsAllocation *kernelArgsBufferAllocation, LogicalStateHelper *logicalStateHelper);
|
|
};
|
|
|
|
} // namespace NEO
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