247 lines
11 KiB
C++
247 lines
11 KiB
C++
/*
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* Copyright (C) 2017-2018 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "runtime/built_ins/built_ins.h"
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#include "runtime/command_queue/enqueue_kernel.h"
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#include "runtime/device_queue/device_queue.h"
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#include "runtime/memory_manager/surface.h"
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#include "runtime/scheduler/scheduler_kernel.h"
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#include "unit_tests/fixtures/execution_model_fixture.h"
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#include "unit_tests/helpers/debug_manager_state_restore.h"
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#include "unit_tests/helpers/hw_parse.h"
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#include "unit_tests/mocks/mock_kernel.h"
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#include "unit_tests/mocks/mock_program.h"
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#include "unit_tests/mocks/mock_command_queue.h"
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#include "unit_tests/mocks/mock_context.h"
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#include "unit_tests/mocks/mock_device_queue.h"
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using namespace OCLRT;
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class ExecutionModelSchedulerFixture : public ExecutionModelSchedulerTest,
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public testing::Test {
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void SetUp() override {
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ExecutionModelSchedulerTest::SetUp();
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}
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void TearDown() override {
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ExecutionModelSchedulerTest::TearDown();
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}
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};
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HWCMDTEST_F(IGFX_GEN8_CORE, ExecutionModelSchedulerFixture, dispatchScheduler) {
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using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
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using GPGPU_WALKER = typename FamilyType::GPGPU_WALKER;
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using PIPELINE_SELECT = typename FamilyType::PIPELINE_SELECT;
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using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
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using MEDIA_INTERFACE_DESCRIPTOR_LOAD = typename FamilyType::MEDIA_INTERFACE_DESCRIPTOR_LOAD;
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using MEDIA_VFE_STATE = typename FamilyType::MEDIA_VFE_STATE;
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using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
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using MI_BATCH_BUFFER_START = typename FamilyType::MI_BATCH_BUFFER_START;
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if (pDevice->getSupportedClVersion() >= 20) {
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DeviceQueueHw<FamilyType> *pDevQueueHw = castToObject<DeviceQueueHw<FamilyType>>(pDevQueue);
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SchedulerKernel &scheduler = pDevice->getExecutionEnvironment()->getBuiltIns()->getSchedulerKernel(*context);
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auto *executionModelDshAllocation = pDevQueueHw->getDshBuffer();
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auto *dshHeap = pDevQueueHw->getIndirectHeap(IndirectHeap::DYNAMIC_STATE);
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void *executionModelDsh = executionModelDshAllocation->getUnderlyingBuffer();
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EXPECT_NE(nullptr, executionModelDsh);
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size_t minRequiredSizeForSchedulerSSH = KernelCommandsHelper<FamilyType>::template getSizeRequiredForExecutionModel<IndirectHeap::SURFACE_STATE>(*parentKernel);
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// Setup heaps in pCmdQ
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LinearStream &commandStream = getCommandStream<FamilyType, CL_COMMAND_NDRANGE_KERNEL>(*pCmdQ, false, false, &scheduler);
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pCmdQ->getIndirectHeap(IndirectHeap::SURFACE_STATE, minRequiredSizeForSchedulerSSH);
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GpgpuWalkerHelper<FamilyType>::dispatchScheduler(
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*pCmdQ,
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*pDevQueueHw,
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pDevice->getPreemptionMode(),
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scheduler,
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&pCmdQ->getIndirectHeap(IndirectHeap::SURFACE_STATE, 0u),
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pDevQueueHw->getIndirectHeap(IndirectHeap::DYNAMIC_STATE));
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EXPECT_EQ(0u, *scheduler.globalWorkOffsetX);
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EXPECT_EQ(0u, *scheduler.globalWorkOffsetY);
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EXPECT_EQ(0u, *scheduler.globalWorkOffsetZ);
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EXPECT_EQ((uint32_t)scheduler.getLws(), *scheduler.localWorkSizeX);
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EXPECT_EQ(1u, *scheduler.localWorkSizeY);
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EXPECT_EQ(1u, *scheduler.localWorkSizeZ);
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EXPECT_EQ((uint32_t)scheduler.getLws(), *scheduler.localWorkSizeX2);
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EXPECT_EQ(1u, *scheduler.localWorkSizeY2);
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EXPECT_EQ(1u, *scheduler.localWorkSizeZ2);
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if (scheduler.enqueuedLocalWorkSizeX != &Kernel::dummyPatchLocation) {
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EXPECT_EQ((uint32_t)scheduler.getLws(), *scheduler.enqueuedLocalWorkSizeX);
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}
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EXPECT_EQ(1u, *scheduler.enqueuedLocalWorkSizeY);
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EXPECT_EQ(1u, *scheduler.enqueuedLocalWorkSizeZ);
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EXPECT_EQ((uint32_t)(scheduler.getGws() / scheduler.getLws()), *scheduler.numWorkGroupsX);
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EXPECT_EQ(0u, *scheduler.numWorkGroupsY);
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EXPECT_EQ(0u, *scheduler.numWorkGroupsZ);
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HardwareParse hwParser;
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hwParser.parseCommands<FamilyType>(commandStream, 0);
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hwParser.findHardwareCommands<FamilyType>();
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ASSERT_NE(hwParser.cmdList.end(), hwParser.itorWalker);
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// Before Walker There must be PC
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PIPE_CONTROL *pc = hwParser.getCommand<PIPE_CONTROL>(hwParser.cmdList.begin(), hwParser.itorWalker);
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ASSERT_NE(nullptr, pc);
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ASSERT_NE(hwParser.cmdList.end(), hwParser.itorMediaInterfaceDescriptorLoad);
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auto *interfaceDescLoad = (MEDIA_INTERFACE_DESCRIPTOR_LOAD *)*hwParser.itorMediaInterfaceDescriptorLoad;
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uint32_t addressOffsetProgrammed = interfaceDescLoad->getInterfaceDescriptorDataStartAddress();
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uint32_t interfaceDescriptorSizeProgrammed = interfaceDescLoad->getInterfaceDescriptorTotalLength();
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uint32_t addressOffsetExpected = pDevQueueHw->colorCalcStateSize;
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uint32_t intDescSizeExpected = DeviceQueue::interfaceDescriptorEntries * sizeof(INTERFACE_DESCRIPTOR_DATA);
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EXPECT_EQ(addressOffsetExpected, addressOffsetProgrammed);
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EXPECT_EQ(intDescSizeExpected, interfaceDescriptorSizeProgrammed);
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auto *walker = (GPGPU_WALKER *)*hwParser.itorWalker;
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size_t workGroups[3] = {(scheduler.getGws() / scheduler.getLws()), 1, 1};
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size_t numWorkgroupsProgrammed[3] = {0, 0, 0};
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uint32_t threadsPerWorkGroup = walker->getThreadWidthCounterMaximum();
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EXPECT_EQ(scheduler.getLws() / scheduler.getKernelInfo().getMaxSimdSize(), threadsPerWorkGroup);
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numWorkgroupsProgrammed[0] = walker->getThreadGroupIdXDimension();
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numWorkgroupsProgrammed[1] = walker->getThreadGroupIdYDimension();
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numWorkgroupsProgrammed[2] = walker->getThreadGroupIdZDimension();
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EXPECT_EQ(workGroups[0], numWorkgroupsProgrammed[0]);
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EXPECT_EQ(workGroups[1], numWorkgroupsProgrammed[1]);
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EXPECT_EQ(workGroups[2], numWorkgroupsProgrammed[2]);
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typename FamilyType::GPGPU_WALKER::SIMD_SIZE simdSize = walker->getSimdSize();
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EXPECT_EQ(FamilyType::GPGPU_WALKER::SIMD_SIZE::SIMD_SIZE_SIMD8, simdSize);
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EXPECT_EQ(0u, walker->getThreadGroupIdStartingX());
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EXPECT_EQ(0u, walker->getThreadGroupIdStartingY());
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EXPECT_EQ(0u, walker->getThreadGroupIdStartingResumeZ());
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uint32_t offsetCrossThreadDataProgrammed = walker->getIndirectDataStartAddress();
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assert(offsetCrossThreadDataProgrammed % 64 == 0);
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size_t curbeSize = scheduler.getCurbeSize();
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size_t offsetCrossThreadDataExpected = dshHeap->getMaxAvailableSpace() - curbeSize - 4096; // take additional page for padding into account
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EXPECT_EQ((uint32_t)offsetCrossThreadDataExpected, offsetCrossThreadDataProgrammed);
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EXPECT_EQ(62u, walker->getInterfaceDescriptorOffset());
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auto numChannels = 3;
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auto sizePerThreadDataTotal = PerThreadDataHelper::getPerThreadDataSizeTotal(scheduler.getKernelInfo().getMaxSimdSize(), numChannels, scheduler.getLws());
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auto sizeCrossThreadData = scheduler.getCrossThreadDataSize();
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auto IndirectDataLength = alignUp((uint32_t)(sizeCrossThreadData + sizePerThreadDataTotal), GPGPU_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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EXPECT_EQ(IndirectDataLength, walker->getIndirectDataLength());
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ASSERT_NE(hwParser.cmdList.end(), hwParser.itorBBStartAfterWalker);
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auto *bbStart = (MI_BATCH_BUFFER_START *)*hwParser.itorBBStartAfterWalker;
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uint64_t slbAddress = pDevQueueHw->getSlbBuffer()->getGpuAddress();
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EXPECT_EQ(slbAddress, bbStart->getBatchBufferStartAddressGraphicsaddress472());
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}
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}
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HWCMDTEST_F(IGFX_GEN8_CORE, ExecutionModelSchedulerFixture, dispatchSchedulerDoesNotUseStandardCmdQIOH) {
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using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
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using GPGPU_WALKER = typename FamilyType::GPGPU_WALKER;
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using PIPELINE_SELECT = typename FamilyType::PIPELINE_SELECT;
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using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
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using MEDIA_INTERFACE_DESCRIPTOR_LOAD = typename FamilyType::MEDIA_INTERFACE_DESCRIPTOR_LOAD;
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using MEDIA_VFE_STATE = typename FamilyType::MEDIA_VFE_STATE;
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using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
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if (pDevice->getSupportedClVersion() >= 20) {
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DeviceQueueHw<FamilyType> *pDevQueueHw = castToObject<DeviceQueueHw<FamilyType>>(pDevQueue);
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SchedulerKernel &scheduler = pDevice->getExecutionEnvironment()->getBuiltIns()->getSchedulerKernel(*context);
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size_t minRequiredSizeForSchedulerSSH = KernelCommandsHelper<FamilyType>::template getSizeRequiredForExecutionModel<IndirectHeap::SURFACE_STATE>(*parentKernel);
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// Setup heaps in pCmdQ
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getCommandStream<FamilyType, CL_COMMAND_NDRANGE_KERNEL>(*pCmdQ, false, false, &scheduler);
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pCmdQ->getIndirectHeap(IndirectHeap::SURFACE_STATE, minRequiredSizeForSchedulerSSH);
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GpgpuWalkerHelper<FamilyType>::dispatchScheduler(
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*pCmdQ,
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*pDevQueueHw,
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pDevice->getPreemptionMode(),
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scheduler,
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&pCmdQ->getIndirectHeap(IndirectHeap::SURFACE_STATE, 0u),
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pDevQueueHw->getIndirectHeap(IndirectHeap::DYNAMIC_STATE));
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auto &ioh = pCmdQ->getIndirectHeap(IndirectHeap::INDIRECT_OBJECT, 0u);
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EXPECT_EQ(0u, ioh.getUsed());
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}
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}
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HWCMDTEST_F(IGFX_GEN8_CORE, ParentKernelCommandQueueFixture, dispatchSchedulerWithEarlyReturnSetToFirstInstanceDoesNotPutBBStartCmd) {
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if (device->getSupportedClVersion() >= 20) {
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cl_queue_properties properties[3] = {0};
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MockDeviceQueueHw<FamilyType> mockDevQueue(context, device, properties[0]);
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auto *igilQueue = mockDevQueue.getIgilQueue();
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ASSERT_NE(nullptr, igilQueue);
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igilQueue->m_controls.m_SchedulerEarlyReturn = 1;
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SchedulerKernel &scheduler = device->getExecutionEnvironment()->getBuiltIns()->getSchedulerKernel(*context);
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size_t minRequiredSizeForSchedulerSSH = KernelCommandsHelper<FamilyType>::getSizeRequiredSSH(scheduler);
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// Setup heaps in pCmdQ
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LinearStream &commandStream = getCommandStream<FamilyType, CL_COMMAND_NDRANGE_KERNEL>(*pCmdQ, false, false, &scheduler);
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pCmdQ->getIndirectHeap(IndirectHeap::SURFACE_STATE, minRequiredSizeForSchedulerSSH);
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GpgpuWalkerHelper<FamilyType>::dispatchScheduler(
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*pCmdQ,
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mockDevQueue,
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device->getPreemptionMode(),
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scheduler,
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&pCmdQ->getIndirectHeap(IndirectHeap::SURFACE_STATE, 0u),
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mockDevQueue.getIndirectHeap(IndirectHeap::DYNAMIC_STATE));
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HardwareParse hwParser;
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hwParser.parseCommands<FamilyType>(commandStream, 0);
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hwParser.findHardwareCommands<FamilyType>();
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EXPECT_NE(hwParser.cmdList.end(), hwParser.itorWalker);
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EXPECT_EQ(hwParser.cmdList.end(), hwParser.itorBBStartAfterWalker);
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}
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}
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HWTEST_F(ExecutionModelSchedulerFixture, ForceDispatchSchedulerEnqueuesSchedulerKernel) {
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if (pDevice->getSupportedClVersion() >= 20) {
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DebugManagerStateRestore dbgRestorer;
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DebugManager.flags.ForceDispatchScheduler.set(true);
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size_t offset[3] = {0, 0, 0};
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size_t gws[3] = {1, 1, 1};
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MockCommandQueueHw<FamilyType> *mockCmdQ = new MockCommandQueueHw<FamilyType>(context, pDevice, 0);
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mockCmdQ->enqueueKernel(parentKernel, 1, offset, gws, gws, 0, nullptr, nullptr);
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EXPECT_TRUE(mockCmdQ->lastEnqueuedKernels.front()->isSchedulerKernel);
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delete mockCmdQ;
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}
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}
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