157 lines
4.9 KiB
C++
157 lines
4.9 KiB
C++
/*
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* Copyright (c) 2017 - 2018, Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "unit_tests/libult/mock_gfx_family.h"
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#include "runtime/command_queue/gpgpu_walker.inl"
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#include "runtime/command_stream/preemption.inl"
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#include "runtime/device_queue/device_queue_hw.h"
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#include "runtime/device_queue/device_queue_hw.inl"
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#include "runtime/helpers/hw_helper.inl"
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#include "runtime/helpers/kernel_commands.inl"
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#include "runtime/helpers/preamble.inl"
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namespace OCLRT {
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bool (*GENX::isSimulationFcn)(unsigned short) = nullptr;
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GENX::GPGPU_WALKER GENX::cmdInitGpgpuWalker = GENX::GPGPU_WALKER::sInit();
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GENX::INTERFACE_DESCRIPTOR_DATA GENX::cmdInitInterfaceDescriptorData = GENX::INTERFACE_DESCRIPTOR_DATA::sInit();
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GENX::MEDIA_STATE_FLUSH GENX::cmdInitMediaStateFlush = GENX::MEDIA_STATE_FLUSH::sInit();
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GENX::MEDIA_INTERFACE_DESCRIPTOR_LOAD GENX::cmdInitMediaInterfaceDescriptorLoad = GENX::MEDIA_INTERFACE_DESCRIPTOR_LOAD::sInit();
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template <>
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size_t HwHelperHw<GENX>::getMaxBarrierRegisterPerSlice() const {
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return 32;
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}
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template <>
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void HwHelperHw<GENX>::setCapabilityCoherencyFlag(const HardwareInfo *pHwInfo, bool &coherencyFlag) {
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PLATFORM *pPlatform = const_cast<PLATFORM *>(pHwInfo->pPlatform);
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if (pPlatform->usDeviceID == 20) {
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coherencyFlag = false;
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} else {
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coherencyFlag = true;
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}
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}
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template <>
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bool HwHelperHw<GENX>::setupPreemptionRegisters(HardwareInfo *pHwInfo, bool enable) {
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pHwInfo->capabilityTable.whitelistedRegisters.csChicken1_0x2580 = enable;
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return enable;
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}
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struct hw_helper_static_init {
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hw_helper_static_init() {
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hwHelperFactory[IGFX_UNKNOWN_CORE] = &HwHelperHw<GENX>::get();
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}
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};
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template class HwHelperHw<GENX>;
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hw_helper_static_init si;
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template class GpgpuWalkerHelper<GENX>;
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template <>
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bool KernelCommandsHelper<GENX>::isPipeControlWArequired() {
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return false;
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}
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template struct KernelCommandsHelper<GENX>;
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template <>
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size_t PreemptionHelper::getRequiredCmdStreamSize<GENX>(PreemptionMode newPreemptionMode, PreemptionMode oldPreemptionMode) {
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return 0;
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}
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template <>
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void PreemptionHelper::programCmdStream<GENX>(LinearStream &cmdStream, PreemptionMode newPreemptionMode, PreemptionMode oldPreemptionMode,
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GraphicsAllocation *preemptionCsr, Device &device) {
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}
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template <>
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size_t PreemptionHelper::getRequiredPreambleSize<GENX>(const Device &device) {
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return 0;
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}
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template <>
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void PreemptionHelper::programPreamble<GENX>(LinearStream &preambleCmdStream, Device &device,
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const GraphicsAllocation *preemptionCsr) {
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}
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template <>
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size_t PreemptionHelper::getPreemptionWaCsSize<GENX>(const Device &device) {
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return 0;
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}
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template void PreemptionHelper::programInterfaceDescriptorDataPreemption<GENX>(INTERFACE_DESCRIPTOR_DATA<GENX> *idd, PreemptionMode preemptionMode);
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template <>
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size_t DeviceQueueHw<GENX>::getWaCommandsSize() {
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return (size_t)0;
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}
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template <>
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void DeviceQueueHw<GENX>::addArbCheckCmdWa() {
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}
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template <>
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void DeviceQueueHw<GENX>::addMiAtomicCmdWa(uint64_t atomicOpPlaceholder) {
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}
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template <>
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void DeviceQueueHw<GENX>::addLriCmdWa(bool setArbCheck) {
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}
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template <>
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void DeviceQueueHw<GENX>::addPipeControlCmdWa(bool isNoopCmd) {
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}
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template <>
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void DeviceQueueHw<GENX>::addProfilingEndCmds(uint64_t timestampAddress) {
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}
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template class DeviceQueueHw<GENX>;
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template <>
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void PreambleHelper<GENX>::addPipeControlBeforeVfeCmd(LinearStream *pCommandStream, const HardwareInfo *hwInfo) {
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}
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template <>
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uint32_t PreambleHelper<GENX>::getL3Config(const HardwareInfo &hwInfo, bool useSLM) {
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uint32_t l3Config = 0;
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return l3Config;
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}
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template <>
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void PreambleHelper<GENX>::programPipelineSelect(LinearStream *pCommandStream, bool mediaSamplerRequired) {
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}
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template <>
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struct L3CNTLRegisterOffset<GENX> {
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static const uint32_t registerOffset = 0x7034;
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};
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template struct PreambleHelper<GENX>;
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} // namespace OCLRT
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