mirror of
https://github.com/intel/compute-runtime.git
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8eaa9d690e
This change prepares infrastructure for pipeline select handling in command lists and queues by optimization of number of commands dispatched. State is synchronized between flush-task immediate and regular command lists. Next step is to add optimization itself which disables legacy hw command dispatch algorithm. This change corrects ADL-P support for systolic mode changes. Related-To: NEO-5019 Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
137 lines
5.8 KiB
C++
137 lines
5.8 KiB
C++
/*
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* Copyright (C) 2020-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#include "shared/source/command_container/command_encoder.h"
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#include "shared/source/command_stream/stream_properties.h"
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#include "shared/source/gen12lp/hw_cmds_base.h"
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#include "shared/source/gen12lp/reg_configs.h"
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#include "shared/source/gmm_helper/gmm_helper.h"
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#include "shared/source/helpers/preamble.h"
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using Family = NEO::Gen12LpFamily;
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#include "shared/source/command_container/command_encoder.inl"
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#include "shared/source/command_container/command_encoder_bdw_and_later.inl"
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#include "shared/source/command_container/command_encoder_tgllp_and_later.inl"
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#include "shared/source/command_container/encode_compute_mode_tgllp_and_later.inl"
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#include "shared/source/command_container/image_surface_state/compression_params_bdw_and_later.inl"
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#include "shared/source/command_container/image_surface_state/compression_params_tgllp_and_later.inl"
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#include "shared/source/command_stream/command_stream_receiver.h"
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namespace NEO {
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template <>
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size_t EncodeWA<Family>::getAdditionalPipelineSelectSize(Device &device, bool isRcs) {
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size_t size = 0;
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const auto &hwInfoConfig = *HwInfoConfig::get(device.getHardwareInfo().platform.eProductFamily);
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if (isRcs && hwInfoConfig.is3DPipelineSelectWARequired()) {
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size += 2 * PreambleHelper<Family>::getCmdSizeForPipelineSelect(device.getHardwareInfo());
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}
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return size;
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}
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template <>
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void EncodeComputeMode<Family>::programComputeModeCommand(LinearStream &csr, StateComputeModeProperties &properties, const HardwareInfo &hwInfo, LogicalStateHelper *logicalStateHelper) {
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using STATE_COMPUTE_MODE = typename Family::STATE_COMPUTE_MODE;
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using FORCE_NON_COHERENT = typename STATE_COMPUTE_MODE::FORCE_NON_COHERENT;
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STATE_COMPUTE_MODE stateComputeMode = Family::cmdInitStateComputeMode;
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auto maskBits = stateComputeMode.getMaskBits();
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FORCE_NON_COHERENT coherencyValue = (properties.isCoherencyRequired.value == 1) ? FORCE_NON_COHERENT::FORCE_NON_COHERENT_FORCE_DISABLED
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: FORCE_NON_COHERENT::FORCE_NON_COHERENT_FORCE_GPU_NON_COHERENT;
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stateComputeMode.setForceNonCoherent(coherencyValue);
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maskBits |= Family::stateComputeModeForceNonCoherentMask;
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stateComputeMode.setMaskBits(maskBits);
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auto buffer = csr.getSpace(sizeof(STATE_COMPUTE_MODE));
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*reinterpret_cast<STATE_COMPUTE_MODE *>(buffer) = stateComputeMode;
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}
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template <>
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void EncodeWA<Family>::encodeAdditionalPipelineSelect(LinearStream &stream, const PipelineSelectArgs &args,
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bool is3DPipeline, const HardwareInfo &hwInfo, bool isRcs) {
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const auto &hwInfoConfig = *HwInfoConfig::get(hwInfo.platform.eProductFamily);
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if (hwInfoConfig.is3DPipelineSelectWARequired() && isRcs) {
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PipelineSelectArgs pipelineSelectArgs = args;
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pipelineSelectArgs.is3DPipelineRequired = is3DPipeline;
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PreambleHelper<Family>::programPipelineSelect(&stream, pipelineSelectArgs, hwInfo);
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}
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}
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template <>
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void EncodeSurfaceState<Family>::encodeExtraBufferParams(EncodeSurfaceStateArgs &args) {
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auto surfaceState = reinterpret_cast<R_SURFACE_STATE *>(args.outMemory);
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const bool isL3Allowed = surfaceState->getMemoryObjectControlState() == args.gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
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if (isL3Allowed) {
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const bool isConstantSurface = args.allocation && args.allocation->getAllocationType() == AllocationType::CONSTANT_SURFACE;
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bool useL1 = args.isReadOnly || isConstantSurface;
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if (DebugManager.flags.ForceL1Caching.get() != 1) {
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useL1 = false;
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}
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if (useL1) {
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surfaceState->setMemoryObjectControlState(args.gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST));
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}
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}
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}
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template <>
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bool EncodeSurfaceState<Family>::isBindingTablePrefetchPreferred() {
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return false;
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}
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template <>
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void EncodeL3State<Family>::encode(CommandContainer &container, bool enableSLM) {
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}
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template <>
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void EncodeStoreMMIO<Family>::appendFlags(MI_STORE_REGISTER_MEM *storeRegMem, bool workloadPartition) {
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storeRegMem->setMmioRemapEnable(true);
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}
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template <>
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void EncodeComputeMode<Family>::adjustPipelineSelect(CommandContainer &container, const NEO::KernelDescriptor &kernelDescriptor) {
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auto &hwInfo = container.getDevice()->getHardwareInfo();
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PipelineSelectArgs pipelineSelectArgs;
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pipelineSelectArgs.systolicPipelineSelectMode = kernelDescriptor.kernelAttributes.flags.usesSystolicPipelineSelectMode;
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pipelineSelectArgs.systolicPipelineSelectSupport = container.systolicModeSupport;
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PreambleHelper<Family>::programPipelineSelect(container.getCommandStream(),
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pipelineSelectArgs,
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hwInfo);
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}
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template struct EncodeDispatchKernel<Family>;
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template struct EncodeStates<Family>;
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template struct EncodeMath<Family>;
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template struct EncodeMathMMIO<Family>;
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template struct EncodeIndirectParams<Family>;
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template struct EncodeSetMMIO<Family>;
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template struct EncodeL3State<Family>;
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template struct EncodeMediaInterfaceDescriptorLoad<Family>;
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template struct EncodeStateBaseAddress<Family>;
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template struct EncodeStoreMMIO<Family>;
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template struct EncodeSurfaceState<Family>;
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template struct EncodeAtomic<Family>;
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template struct EncodeSempahore<Family>;
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template struct EncodeBatchBufferStartOrEnd<Family>;
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template struct EncodeMiFlushDW<Family>;
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template struct EncodeWA<Family>;
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template struct EncodeMemoryPrefetch<Family>;
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template struct EncodeMiArbCheck<Family>;
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template struct EncodeComputeMode<Family>;
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template struct EncodeEnableRayTracing<Family>;
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template struct EncodeNoop<Family>;
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template struct EncodeStoreMemory<Family>;
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template struct EncodeMemoryFence<Family>;
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template struct EncodeKernelArgsBuffer<Family>;
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} // namespace NEO
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