mirror of https://github.com/intel/gmmlib.git
Xe_HP_SDV Unembargoed. (#43)
This commit is contained in:
parent
da1c8961a1
commit
cac1a15c98
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@ -25,14 +25,14 @@ project(igfx_gmmumd)
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# GmmLib Api Version used for so naming
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set(GMMLIB_API_MAJOR_VERSION 11)
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set(GMMLIB_API_MINOR_VERSION 2)
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set(GMMLIB_API_MINOR_VERSION 3)
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if(NOT DEFINED MAJOR_VERSION)
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set(MAJOR_VERSION 11)
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endif()
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if(NOT DEFINED MINOR_VERSION)
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set(MINOR_VERSION 2)
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set(MINOR_VERSION 3)
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endif()
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if(NOT DEFINED PATCH_VERSION)
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@ -48,11 +48,13 @@ int32_t GmmLib::GmmGen12dGPUCachePolicy::IsSpecialMOCSUsage(GMM_RESOURCE_USAGE_T
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switch(Usage)
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{
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case GMM_RESOURCE_USAGE_CCS:
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__GMM_ASSERT(pCachePolicy[Usage].L3 == 0) //Architecturally, CCS isn't L3-cacheable.
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__GMM_ASSERT(pCachePolicy[Usage].L3 == 0 && //Architecturally, CCS isn't L3-cacheable.
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pCachePolicy[Usage].UcLookup == 0); // On DG1/XE_HP_SDV, CCS Resource is never cached in L3, so LookUp is N/A
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MocsIdx = 60;
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break;
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case GMM_RESOURCE_USAGE_MOCS_62:
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__GMM_ASSERT(pCachePolicy[Usage].L3 == 0); //Architecturally, TR/Aux-TT node isn't L3-cacheable.
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__GMM_ASSERT(pCachePolicy[Usage].L3 == 0 &&
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pCachePolicy[Usage].UcLookup == 0); //Architecturally, TR/Aux-TT node isn't L3-cacheable.
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MocsIdx = 62;
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break;
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case GMM_RESOURCE_USAGE_L3_EVICTION:
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@ -87,7 +89,7 @@ GMM_STATUS GmmLib::GmmGen12dGPUCachePolicy::InitCachePolicy()
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__GMM_ASSERTPTR(pCachePolicy, GMM_ERROR);
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#define DEFINE_CACHE_ELEMENT(usage, l3, l3_scc, hdcl1) DEFINE_CP_ELEMENT(usage, 0, 0, l3, 0, 0, 0, 0, l3_scc, 0, 0, 0, hdcl1, 0, 0, 0, 0)
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#define DEFINE_CACHE_ELEMENT(usage, l3, l3_scc, hdcl1, go, uclookup) DEFINE_CP_ELEMENT(usage, 0, 0, l3, 0, 0, 0, 0, l3_scc, 0, 0, 0, hdcl1, 0, 0, go, uclookup)
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#include "GmmGen12dGPUCachePolicy.h"
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@ -131,6 +133,7 @@ GMM_STATUS GmmLib::GmmGen12dGPUCachePolicy::InitCachePolicy()
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switch(GFX_GET_CURRENT_PRODUCT(pGmmGlobalContext->GetPlatformInfo().Platform))
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{
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case IGFX_DG1:
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case IGFX_XE_HP_SDV:
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StartMocsIdx = 1; // Index 0 is reserved for Error
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break;
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default:
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@ -139,14 +142,14 @@ GMM_STATUS GmmLib::GmmGen12dGPUCachePolicy::InitCachePolicy()
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}
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// No Special MOCS handling for next platform
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if(GFX_GET_CURRENT_PRODUCT(pGmmGlobalContext->GetPlatformInfo().Platform) <= IGFX_DG1)
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if(GFX_GET_CURRENT_PRODUCT(pGmmGlobalContext->GetPlatformInfo().Platform) <= IGFX_XE_HP_SDV)
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{
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CPTblIdx = IsSpecialMOCSUsage((GMM_RESOURCE_USAGE_TYPE)Usage, SpecialMOCS);
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}
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// Applicable upto only
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if(pCachePolicy[Usage].HDCL1 &&
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(GFX_GET_CURRENT_PRODUCT(pGmmGlobalContext->GetPlatformInfo().Platform) <= IGFX_DG1))
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(GFX_GET_CURRENT_PRODUCT(pGmmGlobalContext->GetPlatformInfo().Platform) <= IGFX_XE_HP_SDV))
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{
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UsageEle.HDCL1 = 1;
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}
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@ -163,6 +166,22 @@ GMM_STATUS GmmLib::GmmGen12dGPUCachePolicy::InitCachePolicy()
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UsageEle.L3.SCC = (uint16_t)pCachePolicy[Usage].L3_SCC;
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}
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// Go/Lookup
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// N/A for SpecialMOCS
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// N/A for DG1, RKL
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// Applicable for IGFX_XE_HP_SDV only
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if(!SpecialMOCS &&
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(FROMPRODUCT(XE_HP_SDV)))
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{
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if(pCachePolicy[Usage].L3 == 0)
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{
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UsageEle.L3.GlobalGo = pCachePolicy[Usage].GlbGo;
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}
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UsageEle.L3.UCLookup = pCachePolicy[Usage].UcLookup;
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__GMM_ASSERT((pCachePolicy[Usage].UcLookup) || (pCachePolicy[Usage].L3 == 0 && pCachePolicy[Usage].UcLookup == 0));
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}
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//Special-case MOCS handling for MOCS Table Index 60-63
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if(CPTblIdx >= GMM_GEN12_MAX_NUMBER_MOCS_INDEXES)
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{
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@ -194,7 +213,9 @@ GMM_STATUS GmmLib::GmmGen12dGPUCachePolicy::InitCachePolicy()
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{
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for(j = StartMocsIdx; j <= CurrentMaxMocsIndex; j++)
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{
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if(pCachePolicy[Usage].L3 == 0)
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if(pCachePolicy[Usage].L3 == 0 &&
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pCachePolicy[Usage].GlbGo == 0 &&
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pCachePolicy[Usage].UcLookup == 0)
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{
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CPTblIdx = StartMocsIdx;
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break;
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@ -270,11 +291,13 @@ void GmmLib::GmmGen12dGPUCachePolicy::SetUpMOCSTable()
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CurrentMaxL1HdcMocsIndex = 0;
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CurrentMaxSpecialMocsIndex = 0;
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#define GMM_DEFINE_MOCS(Index, L3_ESC, L3_SCC, L3_CC, _HDCL1) \
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#define GMM_DEFINE_MOCS(Index, L3_ESC, L3_SCC, L3_CC, L3_Go, L3_LookUp, _HDCL1) \
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{ \
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pCachePolicyTlbElement[Index].L3.ESC = L3_ESC; \
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pCachePolicyTlbElement[Index].L3.SCC = L3_SCC; \
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pCachePolicyTlbElement[Index].L3.Cacheability = L3_CC; \
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pCachePolicyTlbElement[Index].L3.GlobalGo = L3_Go; \
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pCachePolicyTlbElement[Index].L3.UCLookup = L3_LookUp; \
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pCachePolicyTlbElement[Index].LeCC.Cacheability = 1; \
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pCachePolicyTlbElement[Index].LeCC.TargetCache = 0; \
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pCachePolicyTlbElement[Index].LeCC.LRUM = 0; \
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@ -294,31 +317,58 @@ void GmmLib::GmmGen12dGPUCachePolicy::SetUpMOCSTable()
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{
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//Default MOCS Table
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for(int index = 0; index < GMM_MAX_NUMBER_MOCS_INDEXES; index++)
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{ // Index ESC SCC L3CC HDCL1
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GMM_DEFINE_MOCS( index , 0 , 0 , 3 , 0 )
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{ // Index ESC SCC L3CC Go LookUp HDCL1
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GMM_DEFINE_MOCS( index , 0 , 0 , 3 , 0 , 0 , 0 )
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}
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// Fixed MOCS Table
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// Index ESC SCC L3CC HDCL1
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GMM_DEFINE_MOCS( 1 , 0 , 0 , 1 , 0 )
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GMM_DEFINE_MOCS( 2 , 0 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 3 , 0 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 4 , 0 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 5 , 0 , 0 , 3 , 0 )
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GMM_DEFINE_MOCS( 6 , 1 , 1 , 3 , 0 )
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GMM_DEFINE_MOCS( 7 , 1 , 3 , 3 , 0 )
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GMM_DEFINE_MOCS( 8 , 1 , 7 , 3 , 0 )
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GMM_DEFINE_MOCS( 48 , 0 , 0 , 3 , 1 )
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GMM_DEFINE_MOCS( 49 , 0 , 0 , 1 , 1 )
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GMM_DEFINE_MOCS( 60 , 0 , 0 , 1 , 0 )
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GMM_DEFINE_MOCS( 61 , 0 , 0 , 1 , 0 )
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GMM_DEFINE_MOCS( 62 , 0 , 0 , 1 , 0 )
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GMM_DEFINE_MOCS( 63 , 0 , 0 , 1 , 0 )
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// Index ESC SCC L3CC Go LookUp HDCL1
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GMM_DEFINE_MOCS( 0 , 0 , 0 , 1 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 1 , 0 , 0 , 1 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 2 , 0 , 0 , 0 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 3 , 0 , 0 , 0 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 4 , 0 , 0 , 0 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 5 , 0 , 0 , 3 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 6 , 1 , 1 , 3 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 7 , 1 , 3 , 3 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 8 , 1 , 7 , 3 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 48 , 0 , 0 , 3 , 0 , 0 , 1 )
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GMM_DEFINE_MOCS( 49 , 0 , 0 , 1 , 0 , 0 , 1 )
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GMM_DEFINE_MOCS( 60 , 0 , 0 , 1 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 61 , 0 , 0 , 1 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 62 , 0 , 0 , 1 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 63 , 0 , 0 , 1 , 0 , 0 , 0 )
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CurrentMaxMocsIndex = 8;
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CurrentMaxL1HdcMocsIndex = 49;
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CurrentMaxSpecialMocsIndex = 63;
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}
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else if (GFX_GET_CURRENT_PRODUCT(pGmmGlobalContext->GetPlatformInfo().Platform) == IGFX_XE_HP_SDV)
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{
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//Default MOCS Table
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for(int index = 0; index < GMM_MAX_NUMBER_MOCS_INDEXES; index++)
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{ // Index ESC SCC L3CC Go LookUp HDCL1
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GMM_DEFINE_MOCS( index , 0 , 0 , 3 , 0 , 1 , 0 )
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}
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// Fixed MOCS Table
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// Index ESC SCC L3CC Go LookUp HDCL1
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GMM_DEFINE_MOCS( 1 , 0 , 0 , 1 , 0 , 1 , 0 )
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GMM_DEFINE_MOCS( 2 , 0 , 0 , 1 , 1 , 1 , 0 )
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GMM_DEFINE_MOCS( 3 , 0 , 0 , 1 , 1 , 0 , 0 )
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GMM_DEFINE_MOCS( 4 , 0 , 0 , 1 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 5 , 0 , 0 , 3 , 0 , 1 , 0 )
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GMM_DEFINE_MOCS( 48 , 0 , 0 , 3 , 0 , 1 , 1 )
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GMM_DEFINE_MOCS( 49 , 0 , 0 , 1 , 0 , 1 , 1 )
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GMM_DEFINE_MOCS( 60 , 0 , 0 , 1 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 61 , 0 , 0 , 1 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 62 , 0 , 0 , 1 , 0 , 0 , 0 )
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GMM_DEFINE_MOCS( 63 , 0 , 0 , 1 , 0 , 0 , 0 )
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CurrentMaxMocsIndex = 5;
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CurrentMaxL1HdcMocsIndex = 49;
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CurrentMaxSpecialMocsIndex = 63;
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}
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// clang-format on
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@ -30,258 +30,261 @@ OTHER DEALINGS IN THE SOFTWARE.
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// L3_SCC = L3 skip caching control (disabled if L3_SCC = 0)
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// HDCL1 = HDC L1 cache control (1 = cached in HDC L1, 0 = not cached in HDC L1)
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// Faster PushWrite(Gen10+) used iff !WT, eLLC-only cacheable - Globally visible surface (eg display surface) should be marked WT
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//**************************************************************************************************************************************************/
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// USAGE TYPE , L3 , L3_SCC, HDCL1)
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/***************************************************************************************************************************************************/
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// GO = Global observable point for L3-uncached (0=Default is L3, 1= Memory)
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// UcLookup = Snoop L3 for uncached (0=Default is no-snoop, 1 =Snoop)
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//***********************************************************************************************************************************************************/
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// USAGE TYPE , L3 , L3_SCC, HDCL1, GO, UcLookup)
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/************************************************************************************************************************************************************/
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// KMD Usages
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BATCH_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COMP_FRAME_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONTEXT_SWITCH_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CURSOR , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DISPLAY_STATIC_IMG_FOR_SMOOTH_ROTATION_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DUMMY_PAGE , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GDI_SURFACE , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GENERIC_KMD_RESOURCE , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BATCH_BUFFER , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COMP_FRAME_BUFFER , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONTEXT_SWITCH_BUFFER , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CURSOR , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DISPLAY_STATIC_IMG_FOR_SMOOTH_ROTATION_BUFFER , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DUMMY_PAGE , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GDI_SURFACE , 1 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GENERIC_KMD_RESOURCE , 0 , 0 , 0, 0, 1);
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// GMM_RESOURCE_USAGE_GFX_RING is only used if WaEnableRingHostMapping is enabled.
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GFX_RING , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GTT_TRANSFER_REGION , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HW_CONTEXT , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STATE_MANAGER_KERNEL_STATE , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_KMD_STAGING_SURFACE , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MBM_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_NNDI_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OVERLAY_MBM , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PRIMARY_SURFACE , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SCREEN_PROTECTION_INTERMEDIATE_SURFACE , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADOW_SURFACE , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SM_SCRATCH_STATE , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STATUS_PAGE , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TIMER_PERF_QUEUE , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UNKNOWN , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UNMAP_PAGING_RESERVED_GTT_DMA_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VSC_BATCH_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_WA_BATCH_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_KMD_OCA_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GFX_RING , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GTT_TRANSFER_REGION , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HW_CONTEXT , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STATE_MANAGER_KERNEL_STATE , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_KMD_STAGING_SURFACE , 1 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MBM_BUFFER , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_NNDI_BUFFER , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OVERLAY_MBM , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PRIMARY_SURFACE , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SCREEN_PROTECTION_INTERMEDIATE_SURFACE , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADOW_SURFACE , 1 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SM_SCRATCH_STATE , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STATUS_PAGE , 1 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TIMER_PERF_QUEUE , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UNKNOWN , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UNMAP_PAGING_RESERVED_GTT_DMA_BUFFER , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VSC_BATCH_BUFFER , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_WA_BATCH_BUFFER , 0 , 0 , 0, 0, 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_KMD_OCA_BUFFER , 0 , 0 , 0, 0, 1);
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//
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// 3D Usages
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//
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UMD_BATCH_BUFFER , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BINDING_TABLE_POOL , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CCS , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONSTANT_BUFFER_POOL , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEPTH_BUFFER , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DISPLAYABLE_RENDER_TARGET , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GATHER_POOL , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_SURFACE_STATE , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_DYNAMIC_STATE , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_GENERAL_STATE , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_GENERAL_STATE_UC , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_STATELESS_DATA_PORT , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_INDIRECT_OBJECT , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_INSTRUCTION , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HIZ , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INDEX_BUFFER , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INDEX_BUFFER_L3_COHERENT_UC , 0 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INDEX_BUFFER_L3_CACHED , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MCS , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PUSH_CONSTANT_BUFFER , 1 , 0 , 0);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PULL_CONSTANT_BUFFER , 1 , 0 , 1);
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DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_QUERY , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_RENDER_TARGET , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADER_RESOURCE , 1 , 0 , 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STAGING , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STENCIL_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STREAM_OUTPUT_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILE_POOL , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADER_RESOURCE_LLC_BYPASS , 1 , 0 , 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MOCS_62 , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_L3_EVICTION , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_L3_EVICTION_SPECIAL , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UMD_BATCH_BUFFER , 0 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BINDING_TABLE_POOL , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CCS , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONSTANT_BUFFER_POOL , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEPTH_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DISPLAYABLE_RENDER_TARGET , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_GATHER_POOL , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_SURFACE_STATE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_DYNAMIC_STATE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_GENERAL_STATE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_GENERAL_STATE_UC , 0 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_STATELESS_DATA_PORT , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_INDIRECT_OBJECT , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HEAP_INSTRUCTION , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HIZ , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INDEX_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INDEX_BUFFER_L3_COHERENT_UC , 0 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INDEX_BUFFER_L3_CACHED , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MCS , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PUSH_CONSTANT_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PULL_CONSTANT_BUFFER , 1 , 0 , 1, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_QUERY , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_RENDER_TARGET , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADER_RESOURCE , 1 , 0 , 1, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STAGING , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STENCIL_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STREAM_OUTPUT_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILE_POOL , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SHADER_RESOURCE_LLC_BYPASS , 1 , 0 , 1, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MOCS_62 , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_L3_EVICTION , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_L3_EVICTION_SPECIAL , 0 , 0 , 0, 1, 0);
|
||||
|
||||
// Tiled Resource
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_DEPTH_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_HIZ , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_MCS , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_CCS , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_RENDER_TARGET , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_RENDER_TARGET_AND_SHADER_RESOURCE , 1 , 0 , 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_SHADER_RESOURCE , 1 , 0 , 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_UAV , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_DEPTH_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_HIZ , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_MCS , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_CCS , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_RENDER_TARGET , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_RENDER_TARGET_AND_SHADER_RESOURCE , 1 , 0 , 1, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_SHADER_RESOURCE , 1 , 0 , 1, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILED_UAV , 1 , 0 , 0, 0, 1);
|
||||
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UAV , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VERTEX_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VERTEX_BUFFER_L3_COHERENT_UC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VERTEX_BUFFER_L3_CACHED , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OGL_WSTN_VERTEX_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_POSH_VERTEX_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_RENDER_TARGET_AND_SHADER_RESOURCE , 1 , 0 , 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_WDDM_HISTORY_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONTEXT_SAVE_RESTORE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PTBR_PAGE_POOL , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PTBR_BATCH_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_UAV , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VERTEX_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VERTEX_BUFFER_L3_COHERENT_UC , 0 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VERTEX_BUFFER_L3_CACHED , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OGL_WSTN_VERTEX_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_POSH_VERTEX_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_RENDER_TARGET_AND_SHADER_RESOURCE , 1 , 0 , 1, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_WDDM_HISTORY_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CONTEXT_SAVE_RESTORE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PTBR_PAGE_POOL , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PTBR_BATCH_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
|
||||
//
|
||||
// CM USAGES
|
||||
//
|
||||
// USAGE TYPE , L3 , L3_SCC, HDCL1)
|
||||
DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_SurfaceState, 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_L1_Enabled_SurfaceState, 1 , 0 , 1);
|
||||
DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_StateHeap, 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_L3_SurfaceState, 0 , 0 , 1);
|
||||
DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_CACHE_SurfaceState, 0 , 0 , 0);
|
||||
// USAGE TYPE , L3 , L3_SCC, HDCL1, GO, UcLookup)
|
||||
DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_SurfaceState, 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_L1_Enabled_SurfaceState, 1 , 0 , 1, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_StateHeap, 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_L3_SurfaceState, 0 , 0 , 1, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(CM_RESOURCE_USAGE_NO_CACHE_SurfaceState, 0 , 0 , 0, 1, 0);
|
||||
|
||||
//
|
||||
// MP USAGES
|
||||
//
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_BEGIN, 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_DEFAULT, 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_DEFAULT_FF, 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_DEFAULT_RCS, 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_SurfaceState, 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_SurfaceState_FF, 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_SurfaceState_RCS, 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_END, 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_BEGIN, 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_DEFAULT, 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_DEFAULT_FF, 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_DEFAULT_RCS, 0 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_SurfaceState, 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_SurfaceState_FF, 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_SurfaceState_RCS, 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(MP_RESOURCE_USAGE_END, 0 , 0 , 0, 1, 0);
|
||||
|
||||
// MHW - SFC
|
||||
DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_CurrentOutputSurface, 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_AvsLineBufferSurface, 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_IefLineBufferSurface, 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_CurrentOutputSurface, 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_AvsLineBufferSurface, 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(MHW_RESOURCE_USAGE_Sfc_IefLineBufferSurface, 0 , 0 , 0, 1, 0);
|
||||
|
||||
//Media GMM Resource USAGES
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PRE_DEBLOCKING_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_POST_DEBLOCKING_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_ENCODE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_DECODE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STREAMOUT_DATA_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INTRA_ROWSTORE_SCRATCH_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_SCRATCH_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MACROBLOCK_STATUS_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFX_INDIRECT_BITSTREAM_OBJECT_DECODE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFX_INDIRECT_MV_OBJECT_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFD_INDIRECT_IT_COEF_OBJECT_DECODE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFC_INDIRECT_PAKBASE_OBJECT_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BSDMPC_ROWSTORE_SCRATCH_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MPR_ROWSTORE_SCRATCH_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BITPLANE_READ_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_AACSBIT_VECTOR_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DIRECTMV_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_CURR_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_REF_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_HME_DOWNSAMPLED_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_HME_DOWNSAMPLED_ENCODE_FF , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_HME_DOWNSAMPLED_ENCODE_DST , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_ME_DISTORTION_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PAK_OBJECT_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_FLATNESS_CHECK_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MBENC_CURBE_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VDENC_ROW_STORE_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VDENC_STREAMIN_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PRE_DEBLOCKING_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_POST_DEBLOCKING_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_ENCODE , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_DECODE , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_STREAMOUT_DATA_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_INTRA_ROWSTORE_SCRATCH_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_SCRATCH_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MACROBLOCK_STATUS_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFX_INDIRECT_BITSTREAM_OBJECT_DECODE , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFX_INDIRECT_MV_OBJECT_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFD_INDIRECT_IT_COEF_OBJECT_DECODE , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MFC_INDIRECT_PAKBASE_OBJECT_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BSDMPC_ROWSTORE_SCRATCH_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MPR_ROWSTORE_SCRATCH_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_BITPLANE_READ_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_AACSBIT_VECTOR_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DIRECTMV_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_CURR_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_REF_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_HME_DOWNSAMPLED_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_HME_DOWNSAMPLED_ENCODE_FF , 0 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_HME_DOWNSAMPLED_ENCODE_DST , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_ME_DISTORTION_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PAK_OBJECT_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_FLATNESS_CHECK_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MBENC_CURBE_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VDENC_ROW_STORE_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VDENC_STREAMIN_CODEC , 0 , 0 , 0, 1, 0);
|
||||
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_MD_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_SAO_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_MV_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_STATUS_ERROR_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_LCU_ILDB_STREAMOUT_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_PROBABILITY_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_SEGMENT_ID_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_HVD_ROWSTORE_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_MD_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_SAO_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_MV_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_STATUS_ERROR_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_LCU_ILDB_STREAMOUT_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_PROBABILITY_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_SEGMENT_ID_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_HVD_ROWSTORE_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MACROBLOCK_ILDB_STREAM_OUT_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SSE_SRC_PIXEL_ROW_STORE_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SLICE_STATE_STREAM_OUT_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CABAC_SYNTAX_STREAM_OUT_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PRED_COL_STORE_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MACROBLOCK_ILDB_STREAM_OUT_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SSE_SRC_PIXEL_ROW_STORE_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SLICE_STATE_STREAM_OUT_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CABAC_SYNTAX_STREAM_OUT_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PRED_COL_STORE_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_UNCACHED , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ELLC_ONLY , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ELLC_LLC_ONLY , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ELLC_LLC_L3 , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CCS_MEDIA_WRITABLE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_UNCACHED , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ELLC_ONLY , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ELLC_LLC_ONLY , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ELLC_LLC_L3 , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_CCS_MEDIA_WRITABLE , 0 , 0 , 0, 1, 0);
|
||||
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_HISTORY_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_SOFTWARE_SCOREBOARD_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ME_MV_DATA_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MV_DISTORTION_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_4XME_DISTORTION_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_INTRA_DISTORTION_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MB_STATS_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_PAK_STATS_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_PIC_STATE_READ_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_PIC_STATE_WRITE_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_COMBINED_ENC_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_CONSTANT_DATA_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_INTERMEDIATE_CU_RECORD_SURFACE_ENCODE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_SCRATCH_ENCODE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_LCU_LEVEL_DATA_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_HISTORY_INPUT_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_HISTORY_OUTPUT_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_DEBUG_ENCODE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_CONSTANT_TABLE_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_CU_RECORD_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_MV_TEMPORAL_BUFFER_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_CU_PACKET_FOR_PAK_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_BCOMBINED1_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_BCOMBINED2_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_FRAME_STATS_STREAMOUT_DATA_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_TILE_LINE_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_TILE_COLUMN_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_MD_TILE_LINE_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_MD_TILE_COLUMN_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_SAO_TILE_LINE_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_SAO_TILE_COLUMN_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_PROBABILITY_COUNTER_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HUC_VIRTUAL_ADDR_REGION_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SIZE_STREAMOUT_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COMPRESSED_HEADER_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PROBABILITY_DELTA_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILE_RECORD_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILE_SIZE_STAS_BUFFER_CODEC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MAD_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_PAK_IMAGESTATE_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MBENC_BRC_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MB_BRC_CONST_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_MB_QP_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_ROI_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MBDISABLE_SKIPMAP_CODEC , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_SLICE_MAP_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_WP_DOWNSAMPLED_ENCODE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_VDENC_IMAGESTATE_ENCODE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_HISTORY_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_SOFTWARE_SCOREBOARD_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ME_MV_DATA_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MV_DISTORTION_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_4XME_DISTORTION_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_INTRA_DISTORTION_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MB_STATS_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_PAK_STATS_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_PIC_STATE_READ_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_PIC_STATE_WRITE_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_COMBINED_ENC_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_CONSTANT_DATA_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_INTERMEDIATE_CU_RECORD_SURFACE_ENCODE , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_SCRATCH_ENCODE , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_LCU_LEVEL_DATA_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_HISTORY_INPUT_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_HISTORY_OUTPUT_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_DEBUG_ENCODE , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_CONSTANT_TABLE_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_CU_RECORD_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_MV_TEMPORAL_BUFFER_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_CU_PACKET_FOR_PAK_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_BCOMBINED1_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_ENC_BCOMBINED2_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_FRAME_STATS_STREAMOUT_DATA_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_TILE_LINE_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_TILE_COLUMN_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_MD_TILE_LINE_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_MD_TILE_COLUMN_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_SAO_TILE_LINE_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HCP_SAO_TILE_COLUMN_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_VP9_PROBABILITY_COUNTER_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_HUC_VIRTUAL_ADDR_REGION_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SIZE_STREAMOUT_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COMPRESSED_HEADER_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_PROBABILITY_DELTA_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILE_RECORD_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_TILE_SIZE_STAS_BUFFER_CODEC , 0 , 0 , 0, 1, 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MAD_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_PAK_IMAGESTATE_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MBENC_BRC_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_MB_BRC_CONST_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_MB_QP_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_BRC_ROI_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_MBDISABLE_SKIPMAP_CODEC , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_SLICE_MAP_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_WP_DOWNSAMPLED_ENCODE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_SURFACE_VDENC_IMAGESTATE_ENCODE , 0 , 0 , 0, 1, 0);
|
||||
|
||||
/**********************************************************************************/
|
||||
|
||||
//
|
||||
// OCL Usages
|
||||
//
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST , 1 , 0 , 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CSR_UC , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_IMAGE , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_INLINE_CONST , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_INLINE_CONST_HDC , 1 , 0 , 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SCRATCH , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_PRIVATE_MEM , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_PRINTF_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_STATE_HEAP_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SYSTEM_MEMORY_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SYSTEM_MEMORY_BUFFER_CACHELINE_MISALIGNED , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_ISH_HEAP_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_TAG_MEMORY_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_TEXTURE_BUFFER , 1 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SELF_SNOOP_BUFFER , 1 , 0 , 0);
|
||||
// USAGE TYPE , L3 , L3_SCC, HDCL1, GO, UcLookup)
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST , 1 , 0 , 1, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CSR_UC , 0 , 0 , 0, 1, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED , 0 , 0 , 0, 1, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_IMAGE , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_INLINE_CONST , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_INLINE_CONST_HDC , 1 , 0 , 1, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SCRATCH , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_PRIVATE_MEM , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_PRINTF_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_STATE_HEAP_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SYSTEM_MEMORY_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SYSTEM_MEMORY_BUFFER_CACHELINE_MISALIGNED , 0 , 0 , 0, 1, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_ISH_HEAP_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_TAG_MEMORY_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_TEXTURE_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_OCL_SELF_SNOOP_BUFFER , 1 , 0 , 0, 0, 1);
|
||||
/**********************************************************************************/
|
||||
|
||||
// Cross Adapter
|
||||
DEFINE_CACHE_ELEMENT( GMM_RESOURCE_USAGE_XADAPTER_SHARED_RESOURCE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_XADAPTER_SHARED_RESOURCE , 1 , 0 , 0, 0, 1);
|
||||
/**********************************************************************************/
|
||||
// Uncacheable copies
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COPY_SOURCE , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COPY_DEST , 0 , 0 , 0);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COPY_SOURCE , 0 , 0 , 0, 0, 1);
|
||||
DEFINE_CACHE_ELEMENT(GMM_RESOURCE_USAGE_COPY_DEST , 0 , 0 , 0, 0, 1);
|
||||
|
||||
#include "GmmCachePolicyUndefineConditionals.h"
|
||||
|
||||
|
|
|
@ -437,10 +437,10 @@ GMM_CLIENT ClientType)
|
|||
this->WaTable = *pWaTable;
|
||||
this->GtSysInfo = *pGtSysInfo;
|
||||
|
||||
OverrideSkuWa();
|
||||
|
||||
pGmmGlobalContext->pPlatformInfo = GmmLib::PlatformInfo::Create(Platform, false);
|
||||
|
||||
OverrideSkuWa();
|
||||
|
||||
this->pGmmCachePolicy = GmmLib::GmmCachePolicyCommon::Create();
|
||||
if(this->pGmmCachePolicy == NULL)
|
||||
{
|
||||
|
@ -497,7 +497,10 @@ void GMM_STDCALL GmmLib::Context::DestroyContext()
|
|||
|
||||
void GMM_STDCALL GmmLib::Context::OverrideSkuWa()
|
||||
{
|
||||
SkuTable.FtrTileY = true;
|
||||
if((GFX_GET_CURRENT_PRODUCT(this->GetPlatformInfo().Platform) < IGFX_XE_HP_SDV))
|
||||
{
|
||||
SkuTable.FtrTileY = true;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef __GMM_KMD__ /*LINK CONTEXT TO GLOBAL*/
|
||||
|
|
|
@ -34,6 +34,7 @@ SET (GMMLIB_COMPILER_FLAGS_COMMON
|
|||
-Wno-parentheses
|
||||
-Wno-missing-braces
|
||||
-Wno-sign-compare
|
||||
-Wno-enum-compare
|
||||
-Werror=address
|
||||
-Werror=format-security
|
||||
-Werror=non-virtual-dtor
|
||||
|
|
|
@ -76,7 +76,7 @@ GmmLib::PlatformInfoGen12::PlatformInfoGen12(PLATFORM &Platform)
|
|||
//Compression format update
|
||||
GMM_RESOURCE_FORMAT GmmFormat;
|
||||
#define GMM_FORMAT_SKU(FtrXxx) (pGmmGlobalContext->GetSkuTable().FtrXxx != 0)
|
||||
#define GMM_COMPR_FORMAT_INVALID (static_cast<uint8_t>(GMM_E2ECOMP_FORMAT_INVALID))
|
||||
#define GMM_COMPR_FORMAT_INVALID ((pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS != 0) ? static_cast<uint8_t>(GMM_FLATCCS_FORMAT_INVALID) : static_cast<uint8_t>(GMM_E2ECOMP_FORMAT_INVALID))
|
||||
#define GMM_FORMAT(Name, bpe, _Width, _Height, _Depth, IsRT, IsASTC, RcsSurfaceFormat, SSCompressionFmt, Availability) \
|
||||
\
|
||||
{ \
|
||||
|
@ -136,6 +136,44 @@ GmmLib::PlatformInfoGen12::PlatformInfoGen12(PLATFORM &Platform)
|
|||
Data.TexAlign.CCS.MaxPitchinTiles = 1024;
|
||||
|
||||
// clang-format off
|
||||
SET_TILE_MODE_INFO(TILE4, 128, 32, 1, 0, 0, 0)
|
||||
|
||||
// TILE__64 1D
|
||||
SET_TILE_MODE_INFO(TILE__64_1D_128bpe, 4096, 1, 1, 1024, 1, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_1D_64bpe, 8192, 1, 1, 2048, 1, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_1D_32bpe, 16384, 1, 1, 4096, 1, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_1D_16bpe, 32768, 1, 1, 8192, 1, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_1D_8bpe, 65536, 1, 1, 16384, 1, 1)
|
||||
|
||||
// TILE__64 2D
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_128bpe, 1024, 64, 1, 32, 64, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_64bpe, 1024, 64, 1, 64, 64, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_32bpe, 512, 128, 1, 64, 128, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_16bpe, 512, 128, 1, 128, 128, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_8bpe, 256, 256, 1, 128, 256, 1)
|
||||
|
||||
// TILE__64 2D 2X
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_2X_128bpe, 512, 64, 1, 32, 32, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_2X_64bpe, 512, 64, 1, 64, 32, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_2X_32bpe, 256, 128, 1, 64, 64, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_2X_16bpe, 256, 128, 1, 128, 64, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_2X_8bpe, 128, 256, 1, 128, 128, 1)
|
||||
|
||||
// TILE__64 2D 4X
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_4X_128bpe, 512, 32, 1, 16, 32, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_4X_64bpe, 512, 32, 1, 32, 32, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_4X_32bpe, 256, 64, 1, 32, 64, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_4X_16bpe, 256, 64, 1, 64, 64, 1)
|
||||
SET_TILE_MODE_INFO(TILE__64_2D_4X_8bpe, 128, 128, 1, 64, 128, 1)
|
||||
|
||||
// TILE__64 3D
|
||||
SET_TILE_MODE_INFO(TILE__64_3D_128bpe, 256, 16, 16, 8, 16, 16)
|
||||
SET_TILE_MODE_INFO(TILE__64_3D_64bpe, 256, 16, 16, 16, 16, 16)
|
||||
SET_TILE_MODE_INFO(TILE__64_3D_32bpe, 128, 32, 16, 16, 32, 16)
|
||||
SET_TILE_MODE_INFO(TILE__64_3D_16bpe, 64, 32, 32, 16, 32, 32)
|
||||
SET_TILE_MODE_INFO(TILE__64_3D_8bpe, 64, 32, 32, 32, 32, 32)
|
||||
// clang-format off
|
||||
|
||||
//Extended CCS alignment for per bpp/Tiling CCS alignment
|
||||
#define CCSRTALIGN(TileMode, HAlign, VAlign, DAlign, HDownscale, VDownscale) \
|
||||
{ \
|
||||
|
@ -252,13 +290,25 @@ FCRECTALIGN(TILE_YS_2D_16bpe , 16, 128, 64, 64, 32);
|
|||
FCRECTALIGN(TILE_YS_2D_32bpe , 32, 64, 64, 32, 32);
|
||||
FCRECTALIGN(TILE_YS_2D_64bpe , 64, 64, 32, 32, 16);
|
||||
FCRECTALIGN(TILE_YS_2D_128bpe, 128, 32, 32, 16, 16);
|
||||
|
||||
FCRECTALIGN(TILE4 , 8, 1024, 16, 1024, 16);
|
||||
FCRECTALIGN(TILE4 , 16, 512, 16, 512, 16);
|
||||
FCRECTALIGN(TILE4 , 32, 256, 16, 256, 16);
|
||||
FCRECTALIGN(TILE4 , 64, 128, 16, 128, 16);
|
||||
FCRECTALIGN(TILE4 , 128, 64, 16, 64, 16);
|
||||
|
||||
FCRECTALIGN(TILE__64_2D_8bpe , 8, 128, 128, 128, 128);
|
||||
FCRECTALIGN(TILE__64_2D_16bpe , 16, 128, 64, 128, 64);
|
||||
FCRECTALIGN(TILE__64_2D_32bpe , 32, 64, 64, 64, 64);
|
||||
FCRECTALIGN(TILE__64_2D_64bpe , 64, 64, 32, 64, 32);
|
||||
FCRECTALIGN(TILE__64_2D_128bpe, 128, 32, 32, 32, 32);
|
||||
#undef FCRECTALIGN
|
||||
|
||||
// clang-format on
|
||||
Data.NoOfBitsSupported = 39;
|
||||
Data.HighestAcceptablePhysicalAddress = GFX_MASK_LARGE(0, 38);
|
||||
if(GFX_GET_CURRENT_PRODUCT(Data.Platform) == IGFX_ALDERLAKE_S ||
|
||||
(GFX_GET_CURRENT_PRODUCT(Data.Platform) == IGFX_ALDERLAKE_P))
|
||||
(GFX_GET_CURRENT_PRODUCT(Data.Platform) == IGFX_ALDERLAKE_P) || (GFX_GET_CURRENT_PRODUCT(Data.Platform) >= IGFX_XE_HP_SDV))
|
||||
{
|
||||
Data.NoOfBitsSupported = 46;
|
||||
Data.HighestAcceptablePhysicalAddress = GFX_MASK_LARGE(0, 45);
|
||||
|
@ -432,5 +482,55 @@ uint8_t GmmLib::PlatformInfoGen12::CheckFmtDisplayDecompressible(GMM_TEXTURE_INF
|
|||
//-----------------------------------------------------------------------------
|
||||
uint8_t GmmLib::PlatformInfoGen12::OverrideCompressionFormat(GMM_RESOURCE_FORMAT Format, uint8_t IsMC)
|
||||
{
|
||||
return Data.FormatTable[Format].CompressionFormat.CompressionFormat;
|
||||
|
||||
uint8_t CompressionFormat = Data.FormatTable[Format].CompressionFormat.CompressionFormat;
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS)
|
||||
{
|
||||
if(!IsMC &&
|
||||
(CompressionFormat < GMM_FLATCCS_MIN_RC_FORMAT ||
|
||||
CompressionFormat > GMM_FLATCCS_MAX_RC_FORMAT))
|
||||
{
|
||||
CompressionFormat = GMM_FLATCCS_FORMAT_INVALID;
|
||||
}
|
||||
|
||||
if(IsMC)
|
||||
{
|
||||
if(CompressionFormat >= GMM_FLATCCS_MIN_MC_FORMAT && CompressionFormat <= GMM_FLATCCS_MAX_MC_FORMAT)
|
||||
{
|
||||
//True MC format encodings, drop MC-identify bit (ie bit5)
|
||||
CompressionFormat -= (GMM_FLATCCS_MIN_MC_FORMAT - 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
// RC format encoding, needs MC format encoding for MC usage
|
||||
switch(CompressionFormat)
|
||||
{
|
||||
case GMM_FLATCCS_FORMAT_RGB10A2:
|
||||
CompressionFormat = GMM_FLATCCS_FORMAT_RGB10b;
|
||||
break;
|
||||
case GMM_FLATCCS_FORMAT_RGBA16U:
|
||||
CompressionFormat = GMM_FLATCCS_FORMAT_RGBA16_MEDIA;
|
||||
break;
|
||||
case GMM_FLATCCS_FORMAT_RGBA8U:
|
||||
CompressionFormat = GMM_FLATCCS_FORMAT_ARGB8b;
|
||||
break;
|
||||
default:
|
||||
if(CompressionFormat < GMM_FLATCCS_MIN_MC_FORMAT || CompressionFormat > GMM_FLATCCS_MAX_MC_FORMAT)
|
||||
{
|
||||
CompressionFormat = GMM_FLATCCS_FORMAT_INVALID;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if(CompressionFormat != GMM_FLATCCS_FORMAT_INVALID)
|
||||
{
|
||||
//drop MC-identify bit (ie bit 5)
|
||||
CompressionFormat -= (GMM_FLATCCS_MIN_MC_FORMAT - 1);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return CompressionFormat;
|
||||
}
|
||||
|
|
|
@ -349,6 +349,11 @@ GMM_STATUS GMM_STDCALL GmmLib::GmmResourceInfoCommon::Create(Context &GmmLibCont
|
|||
if(Surf.Flags.Gpu.IndirectClearColor ||
|
||||
Surf.Flags.Gpu.ColorDiscard)
|
||||
{
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS && AuxSurf.Type == RESOURCE_INVALID)
|
||||
{
|
||||
//ie only AuxType is CCS, doesn't exist with FlatCCS, enable it for CC
|
||||
AuxSurf.Type = Surf.Type;
|
||||
}
|
||||
if(!Surf.Flags.Gpu.TiledResource)
|
||||
{
|
||||
AuxSurf.CCSize = PAGE_SIZE; // 128bit Float Value + 32bit RT Native Value + Padding.
|
||||
|
@ -1748,7 +1753,14 @@ uint8_t GMM_STDCALL GmmLib::GmmResourceInfoCommon::CpuBlt(GMM_RES_COPY_BLT *pBlt
|
|||
!(pTexInfo->Flags.Info.TiledYf ||
|
||||
GMM_IS_64KB_TILE(pTexInfo->Flags)))
|
||||
{
|
||||
SwizzledSurface.pSwizzle = &INTEL_TILE_Y;
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrTileY)
|
||||
{
|
||||
SwizzledSurface.pSwizzle = &INTEL_TILE_Y;
|
||||
}
|
||||
else
|
||||
{
|
||||
SwizzledSurface.pSwizzle = &INTEL_TILE_4;
|
||||
}
|
||||
}
|
||||
else if(pTexInfo->Flags.Info.TiledX)
|
||||
{
|
||||
|
@ -1774,7 +1786,7 @@ uint8_t GMM_STDCALL GmmLib::GmmResourceInfoCommon::CpuBlt(GMM_RES_COPY_BLT *pBlt
|
|||
CASE(Layout, Tile, msaa, xD, 128); \
|
||||
}
|
||||
|
||||
#define SWITCH_MSAA_INTEL(Layout, Tile, xD) \
|
||||
#define SWITCH_MSAA_TILE64(Layout, Tile, xD) \
|
||||
{\
|
||||
switch(pTexInfo->MSAA.NumSamples) \
|
||||
{ \
|
||||
|
@ -1790,7 +1802,7 @@ uint8_t GMM_STDCALL GmmLib::GmmResourceInfoCommon::CpuBlt(GMM_RES_COPY_BLT *pBlt
|
|||
case 4: \
|
||||
case 8: \
|
||||
case 16: \
|
||||
SWITCH_BPP(Layout, Tile, MSAA4_, xD); \
|
||||
SWITCH_BPP(Layout, Tile, MSAA_, xD); \
|
||||
break; \
|
||||
}\
|
||||
}
|
||||
|
@ -1825,13 +1837,17 @@ uint8_t GMM_STDCALL GmmLib::GmmResourceInfoCommon::CpuBlt(GMM_RES_COPY_BLT *pBlt
|
|||
{
|
||||
if(pTexInfo->Flags.Info.TiledYf)
|
||||
{
|
||||
SWITCH_BPP(INTEL, TILEYF, , 3D_);
|
||||
SWITCH_BPP(INTEL, TILE_YF, , 3D_);
|
||||
}
|
||||
else if(GMM_IS_64KB_TILE(pTexInfo->Flags))
|
||||
{
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrTileY)
|
||||
{
|
||||
SWITCH_BPP(INTEL, TILEYS, , 3D_);
|
||||
SWITCH_BPP(INTEL, TILE_YS, , 3D_);
|
||||
}
|
||||
else
|
||||
{
|
||||
SWITCH_BPP(INTEL, TILE_64, , 3D_);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -1839,13 +1855,17 @@ uint8_t GMM_STDCALL GmmLib::GmmResourceInfoCommon::CpuBlt(GMM_RES_COPY_BLT *pBlt
|
|||
{
|
||||
if(pTexInfo->Flags.Info.TiledYf)
|
||||
{
|
||||
SWITCH_MSAA(INTEL, TILEYF, );
|
||||
SWITCH_MSAA(INTEL, TILE_YF, );
|
||||
}
|
||||
else if(GMM_IS_64KB_TILE(pTexInfo->Flags))
|
||||
{
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrTileY)
|
||||
{
|
||||
SWITCH_MSAA(INTEL, TILEYS, );
|
||||
SWITCH_MSAA(INTEL, TILE_YS, );
|
||||
}
|
||||
else
|
||||
{
|
||||
SWITCH_MSAA_TILE64(INTEL, TILE_64, );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -31,7 +31,18 @@ OTHER DEALINGS IN THE SOFTWARE.
|
|||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
bool GmmLib::GmmResourceInfoCommon::CopyClientParams(GMM_RESCREATE_PARAMS &CreateParams)
|
||||
{
|
||||
uint32_t BitsPerPixel;
|
||||
|
||||
if((CreateParams.Format > GMM_FORMAT_INVALID) &&
|
||||
(CreateParams.Format < GMM_RESOURCE_FORMATS))
|
||||
{
|
||||
BitsPerPixel = pGmmGlobalContext->GetPlatformInfo().FormatTable[CreateParams.Format].Element.BitsPer;
|
||||
}
|
||||
else
|
||||
{
|
||||
GMM_ASSERTDPF(0, "Format Error");
|
||||
return false;
|
||||
}
|
||||
{
|
||||
// Promote tiling options if caller does not provide any.
|
||||
// X/Y/W/L are tiling formats, and Yf/Ys are modifiers to the internal
|
||||
|
@ -64,6 +75,91 @@ bool GmmLib::GmmResourceInfoCommon::CopyClientParams(GMM_RESCREATE_PARAMS &Creat
|
|||
CreateParams.Flags.Info.TiledX = true;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// Xe_HP onwards.
|
||||
if((CreateParams.Flags.Info.TiledYs +
|
||||
CreateParams.Flags.Info.TiledYf +
|
||||
CreateParams.Flags.Info.Tile4 +
|
||||
CreateParams.Flags.Info.Tile64) == 0)
|
||||
{
|
||||
GMM_ASSERTDPF(!CreateParams.Flags.Info.StdSwizzle, "StdSwizzle not supported on current platform");
|
||||
|
||||
if(!pGmmGlobalContext->GetWaTable().WaDefaultTile4)
|
||||
{
|
||||
// Default Tiling is set to Tile64 on FtrTileY disabled platforms
|
||||
CreateParams.Flags.Info.Tile4 = ((!GMM_IS_SUPPORTED_BPP_ON_TILE_64_YF_YS(BitsPerPixel)) || // 24,48,96 bpps are not supported on Tile64, Tile4 is bpp independent
|
||||
((CreateParams.Type == RESOURCE_3D) && (CreateParams.Flags.Gpu.Depth || CreateParams.Flags.Gpu.SeparateStencil)) ||
|
||||
((!pGmmGlobalContext->GetSkuTable().FtrDisplayDisabled) &&
|
||||
(CreateParams.Flags.Gpu.FlipChain || CreateParams.Flags.Gpu.Overlay)
|
||||
));
|
||||
CreateParams.Flags.Info.Tile64 = !CreateParams.Flags.Info.Tile4;
|
||||
}
|
||||
else
|
||||
{
|
||||
CreateParams.Flags.Info.Tile64 = (CreateParams.MSAA.NumSamples > 1) || CreateParams.Flags.Gpu.TiledResource; // Colour & Depth/Stencil(IMS) MSAA should use Tile64
|
||||
CreateParams.Flags.Info.Tile4 = !CreateParams.Flags.Info.Tile64;
|
||||
}
|
||||
}
|
||||
else if((CreateParams.Flags.Info.TiledYs +
|
||||
CreateParams.Flags.Info.TiledYf) > 0)
|
||||
{
|
||||
GMM_ASSERTDPF(0, "Tile Yf/Ys not supported on given platform");
|
||||
|
||||
// Overrides the flags.
|
||||
if(pGmmGlobalContext->GetWaTable().WaDefaultTile4)
|
||||
{
|
||||
CreateParams.Flags.Info.Tile64 = CreateParams.Flags.Info.TiledYs ||
|
||||
(CreateParams.MSAA.NumSamples > 1) || CreateParams.Flags.Gpu.TiledResource; // Colour & Depth/Stencil(IMS) MSAA should use Tile64
|
||||
|
||||
CreateParams.Flags.Info.Tile4 = !CreateParams.Flags.Info.Tile64;
|
||||
CreateParams.Flags.Info.TiledYf = 0;
|
||||
CreateParams.Flags.Info.TiledYs = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(!pGmmGlobalContext->GetSkuTable().FtrTileY)
|
||||
{
|
||||
__GMM_ASSERT(!(CreateParams.Flags.Info.TiledYs ||
|
||||
CreateParams.Flags.Info.TiledYf ||
|
||||
CreateParams.Flags.Info.TiledY));
|
||||
|
||||
// On Xe_HP onwards translate UMD's TileY/TileYs request to Tile4/Tile64 respectively
|
||||
// Exclude TileX, Linear from override
|
||||
if(pGmmGlobalContext->GetWaTable().WaDefaultTile4 && (CreateParams.Flags.Info.TiledYs ||
|
||||
CreateParams.Flags.Info.TiledY))
|
||||
{
|
||||
CreateParams.Flags.Info.Tile64 =
|
||||
CreateParams.Flags.Info.TiledYs ||
|
||||
(CreateParams.MSAA.NumSamples > 1) || CreateParams.Flags.Gpu.TiledResource;
|
||||
|
||||
CreateParams.Flags.Info.Tile4 = !CreateParams.Flags.Info.Tile64;
|
||||
|
||||
CreateParams.Flags.Info.TiledY = 0;
|
||||
CreateParams.Flags.Info.TiledYs = 0;
|
||||
CreateParams.Flags.Info.TiledW = 0;
|
||||
CreateParams.Flags.Info.TiledYf = 0;
|
||||
}
|
||||
|
||||
// Displayable surfaces cannot be Tiled4/64.
|
||||
__GMM_ASSERT(!pGmmGlobalContext->GetSkuTable().FtrDisplayYTiling);
|
||||
|
||||
//override displayable surfaces to TileX
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrDisplayXTiling)
|
||||
{
|
||||
if(CreateParams.Flags.Gpu.FlipChain || CreateParams.Flags.Gpu.Overlay ||
|
||||
CreateParams.Flags.Gpu.Presentable)
|
||||
{
|
||||
CreateParams.Flags.Info.TiledX = 1;
|
||||
CreateParams.Flags.Info.TiledY = 0;
|
||||
CreateParams.Flags.Info.Tile4 = 0;
|
||||
CreateParams.Flags.Info.Tile64 = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//ExistingSysMem allocations must be Linear
|
||||
|
@ -71,6 +167,37 @@ bool GmmLib::GmmResourceInfoCommon::CopyClientParams(GMM_RESCREATE_PARAMS &Creat
|
|||
CreateParams.Flags.Info.Linear);
|
||||
}
|
||||
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrMultiTileArch)
|
||||
{
|
||||
// For Naive apps, UMD does not populate multi tile arch params.
|
||||
// Gmm will populate them based on the kmd assigned tile to the umd process
|
||||
if(!CreateParams.MultiTileArch.Enable)
|
||||
{
|
||||
uint32_t GpuTile = 0;
|
||||
__GMM_ASSERT(CreateParams.MultiTileArch.GpuVaMappingSet == 0);
|
||||
__GMM_ASSERT(CreateParams.MultiTileArch.LocalMemEligibilitySet == 0);
|
||||
__GMM_ASSERT(CreateParams.MultiTileArch.LocalMemPreferredSet == 0);
|
||||
|
||||
__GMM_ASSERT(pGmmGlobalContext->GetSkuTable().FtrAssignedGpuTile < 4);
|
||||
|
||||
#if !__GMM_KMD__
|
||||
GpuTile = pGmmGlobalContext->GetSkuTable().FtrAssignedGpuTile;
|
||||
CreateParams.MultiTileArch.GpuVaMappingSet = __BIT(GpuTile);
|
||||
#else
|
||||
GpuTile = 0;
|
||||
CreateParams.MultiTileArch.GpuVaMappingSet = pGmmGlobalContext->GetGtSysInfo()->MultiTileArchInfo.TileMask;
|
||||
#endif
|
||||
|
||||
CreateParams.MultiTileArch.Enable = true;
|
||||
|
||||
if(!CreateParams.Flags.Info.NonLocalOnly)
|
||||
{
|
||||
CreateParams.MultiTileArch.LocalMemEligibilitySet = __BIT(GpuTile);
|
||||
CreateParams.MultiTileArch.LocalMemPreferredSet = __BIT(GpuTile);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Surf.Type = CreateParams.Type;
|
||||
Surf.Format = CreateParams.Format;
|
||||
Surf.BaseWidth = CreateParams.BaseWidth64;
|
||||
|
@ -105,16 +232,7 @@ bool GmmLib::GmmResourceInfoCommon::CopyClientParams(GMM_RESCREATE_PARAMS &Creat
|
|||
Surf.Platform = pGmmGlobalContext->GetPlatformInfo().Platform;
|
||||
#endif
|
||||
|
||||
if((CreateParams.Format > GMM_FORMAT_INVALID) &&
|
||||
(CreateParams.Format < GMM_RESOURCE_FORMATS))
|
||||
{
|
||||
Surf.BitsPerPixel = pGmmGlobalContext->GetPlatformInfo().FormatTable[CreateParams.Format].Element.BitsPer;
|
||||
}
|
||||
else
|
||||
{
|
||||
GMM_ASSERTDPF(0, "Format Error");
|
||||
return false;
|
||||
}
|
||||
Surf.BitsPerPixel = BitsPerPixel;
|
||||
|
||||
pGmmGlobalContext->GetPlatformInfoObj()->SetCCSFlag(this->GetResFlags());
|
||||
|
||||
|
@ -147,7 +265,7 @@ bool GmmLib::GmmResourceInfoCommon::CopyClientParams(GMM_RESCREATE_PARAMS &Creat
|
|||
{
|
||||
//GMM_ASSERTDPF(Surf.Flags.Gpu.HiZ, "Lossless Z compression supported when Depth+HiZ+CCS is unified");
|
||||
AuxSecSurf = Surf;
|
||||
AuxSecSurf.Type = AuxSecSurf.Type;
|
||||
AuxSecSurf.Type = pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS ? RESOURCE_INVALID : AuxSecSurf.Type;
|
||||
Surf.Flags.Gpu.HiZ = 0; //Its depth buffer, so clear HiZ
|
||||
AuxSecSurf.Flags.Gpu.HiZ = 0;
|
||||
AuxSurf.Flags.Gpu.IndirectClearColor = 0; //Clear Depth flags from HiZ, contained with separate/legacy HiZ when Depth isn't compressible.
|
||||
|
@ -164,20 +282,20 @@ bool GmmLib::GmmResourceInfoCommon::CopyClientParams(GMM_RESCREATE_PARAMS &Creat
|
|||
return false;
|
||||
}
|
||||
Surf.Flags.Gpu.CCS = 1;
|
||||
AuxSurf.Type = AuxSurf.Type;
|
||||
AuxSurf.Type = pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS ? RESOURCE_INVALID : AuxSurf.Type;
|
||||
}
|
||||
else if(Surf.MSAA.NumSamples > 1 && Surf.Flags.Gpu.CCS) //MSAA+MCS+CCS
|
||||
{
|
||||
GMM_ASSERTDPF(Surf.Flags.Gpu.MCS, "Lossless MSAA supported when MSAA+MCS+CCS is unified");
|
||||
AuxSecSurf = Surf;
|
||||
AuxSecSurf.Type = AuxSecSurf.Type;
|
||||
AuxSecSurf.Type = pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS ? RESOURCE_INVALID : AuxSecSurf.Type;
|
||||
AuxSecSurf.Flags.Gpu.MCS = 0;
|
||||
AuxSurf.Flags.Gpu.CCS = 0;
|
||||
AuxSurf.Flags.Info.RenderCompressed = AuxSurf.Flags.Info.MediaCompressed = 0;
|
||||
}
|
||||
else if(Surf.Flags.Gpu.CCS)
|
||||
{
|
||||
AuxSurf.Type = AuxSurf.Type;
|
||||
AuxSurf.Type = (pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS && !Surf.Flags.Gpu.ProceduralTexture) ? RESOURCE_INVALID : AuxSurf.Type;
|
||||
}
|
||||
|
||||
if(AuxSurf.Type != RESOURCE_INVALID &&
|
||||
|
@ -201,6 +319,11 @@ bool GmmLib::GmmResourceInfoCommon::CopyClientParams(GMM_RESCREATE_PARAMS &Creat
|
|||
|
||||
RotateInfo = CreateParams.RotateInfo;
|
||||
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrMultiTileArch)
|
||||
{
|
||||
MultiTileArch = CreateParams.MultiTileArch;
|
||||
}
|
||||
|
||||
#ifdef __GMM_KMD__
|
||||
if(Surf.Flags.Gpu.S3d)
|
||||
{
|
||||
|
@ -307,6 +430,15 @@ uint8_t GMM_STDCALL GmmLib::GmmResourceInfoCommon::ValidateParams()
|
|||
goto ERROR_CASE;
|
||||
}
|
||||
|
||||
if(Surf.Flags.Info.Tile64 || Surf.Flags.Info.TiledYf || Surf.Flags.Info.TiledYs)
|
||||
{
|
||||
if(!GMM_IS_SUPPORTED_BPP_ON_TILE_64_YF_YS(Surf.BitsPerPixel))
|
||||
{
|
||||
GMM_ASSERTDPF(0, "BPP not supported on selected Tile format!");
|
||||
goto ERROR_CASE;
|
||||
}
|
||||
}
|
||||
|
||||
if(!__CanSupportStdTiling(Surf))
|
||||
{
|
||||
GMM_ASSERTDPF(0, "Invalid TileYf/TileYs usage!");
|
||||
|
@ -364,6 +496,18 @@ uint8_t GMM_STDCALL GmmLib::GmmResourceInfoCommon::ValidateParams()
|
|||
Surf.Flags.Info.LocalOnly = 1;
|
||||
Surf.Flags.Info.NonLocalOnly = 0;
|
||||
}
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS &&
|
||||
(Surf.Flags.Info.RenderCompressed ||
|
||||
Surf.Flags.Info.MediaCompressed))
|
||||
{
|
||||
if(Surf.Flags.Info.NonLocalOnly)
|
||||
{
|
||||
GMM_ASSERTDPF(0, "Compressible surfaces cannot be in system memory.");
|
||||
goto ERROR_CASE;
|
||||
}
|
||||
Surf.Flags.Info.LocalOnly = 1;
|
||||
Surf.Flags.Info.NonLocalOnly = 0;
|
||||
}
|
||||
|
||||
if(!Surf.Flags.Info.NotLockable &&
|
||||
Surf.Flags.Info.Shared)
|
||||
|
@ -429,6 +573,34 @@ uint8_t GMM_STDCALL GmmLib::GmmResourceInfoCommon::ValidateParams()
|
|||
goto ERROR_CASE;
|
||||
}
|
||||
|
||||
if(!pGmmGlobalContext->GetSkuTable().FtrTileY)
|
||||
{
|
||||
if(Surf.Flags.Gpu.TiledResource &&
|
||||
((Surf.Flags.Info.Linear && !(Surf.Type == RESOURCE_BUFFER)) || Surf.Flags.Info.TiledYs ||
|
||||
Surf.Flags.Info.TiledYf || Surf.Flags.Info.TiledY))
|
||||
{
|
||||
GMM_ASSERTDPF(0, "Invalid Tile for TiledResource!");
|
||||
goto ERROR_CASE;
|
||||
}
|
||||
if(GMM_IS_64KB_TILE(Surf.Flags) &&
|
||||
(Surf.MSAA.NumSamples > 1) &&
|
||||
(Surf.MaxLod != 0))
|
||||
{
|
||||
GMM_ASSERTDPF(0, "Mipped MSAA not supported for Tile64!");
|
||||
goto ERROR_CASE;
|
||||
}
|
||||
// Tile4 does not support MSAA.
|
||||
if(GMM_IS_4KB_TILE(Surf.Flags) &&
|
||||
(Surf.MSAA.NumSamples > 1))
|
||||
{
|
||||
GMM_ASSERTDPF(0, "No MSAA support for Tile4!");
|
||||
goto ERROR_CASE;
|
||||
}
|
||||
}
|
||||
|
||||
__GMM_ASSERT(!(pGmmGlobalContext->GetSkuTable().FtrTileY &&
|
||||
(Surf.Flags.Info.Tile4 || Surf.Flags.Info.Tile64)));
|
||||
|
||||
//GMM asserts that ExistingSysMem allocation (whose malloc is outside GmmLib) are either
|
||||
//SVM Buffer, Index Buffer, Vertex Buffers, Render Target, Texture
|
||||
if(Surf.Flags.Info.ExistingSysMem &&
|
||||
|
@ -553,6 +725,13 @@ uint8_t GMM_STDCALL GmmLib::GmmResourceInfoCommon::ValidateParams()
|
|||
// TileYF cannot be MSAA'ed (pre-Gen10)...
|
||||
((GFX_GET_CURRENT_RENDERCORE(pPlatformResource->Platform) >= IGFX_GEN10_CORE) ||
|
||||
!Surf.Flags.Info.TiledYf) &&
|
||||
// Tile64 MSAA (Xe_HP)
|
||||
(pGmmGlobalContext->GetSkuTable().FtrTileY ||
|
||||
!GMM_IS_64KB_TILE(Surf.Flags) ||
|
||||
(Surf.MaxLod == 0)) &&
|
||||
// Tile4 does not support MSAA
|
||||
(pGmmGlobalContext->GetSkuTable().FtrTileY ||
|
||||
!GMM_IS_4KB_TILE(Surf.Flags)) &&
|
||||
// Non-Compressed/YUV...
|
||||
!GmmIsCompressed(Surf.Format) &&
|
||||
!GmmIsYUVPacked(Surf.Format) &&
|
||||
|
@ -615,6 +794,30 @@ uint8_t GMM_STDCALL GmmLib::GmmResourceInfoCommon::ValidateParams()
|
|||
goto ERROR_CASE;
|
||||
}
|
||||
|
||||
//MultiTileArch params
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrMultiTileArch)
|
||||
{
|
||||
/*
|
||||
MultiTileArch validation criteria
|
||||
- MultiTileArch.Enable must be set.
|
||||
- NonLocalOnly alloc must have LocalEligibilitySet and LocalPreferenceSet both zero
|
||||
- LocalOnly alloc must have non-zero LocalEligibilitySet
|
||||
- GpuVaMappingSet/LocalEligibilitySet must be subset of GtSysInfo.TileMask
|
||||
- PreferredSet must be subset of EligibilitySet or zero
|
||||
*/
|
||||
if(!(
|
||||
// Legitimate cases
|
||||
MultiTileArch.Enable &&
|
||||
(Surf.Flags.Info.NonLocalOnly || MultiTileArch.LocalMemEligibilitySet) &&
|
||||
((MultiTileArch.GpuVaMappingSet & pGmmGlobalContext->GetGtSysInfo()->MultiTileArchInfo.TileMask) == MultiTileArch.GpuVaMappingSet) &&
|
||||
((MultiTileArch.LocalMemEligibilitySet & pGmmGlobalContext->GetGtSysInfo()->MultiTileArchInfo.TileMask) == MultiTileArch.LocalMemEligibilitySet) &&
|
||||
((MultiTileArch.LocalMemEligibilitySet & MultiTileArch.LocalMemPreferredSet) == MultiTileArch.LocalMemPreferredSet)))
|
||||
{
|
||||
GMM_ASSERTDPF(0, "Invalid MultiTileArch allocation params");
|
||||
goto ERROR_CASE;
|
||||
}
|
||||
}
|
||||
|
||||
// check 2D, 3D & Cubemap dimensions
|
||||
switch(Surf.Type)
|
||||
{
|
||||
|
|
|
@ -402,6 +402,18 @@ void __GmmPlatformResetRestrictions(__GMM_BUFFER_TYPE *pRestriction)
|
|||
pRestriction->MinDepth = 0xffffffff;
|
||||
}
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
/// Internal function resets the restrictions and puts the allocation in invalid state
|
||||
///
|
||||
/// @param[in] pTexInfo: ptr to ::GMM_TEXTURE_INFO,
|
||||
/// @param[in] pRestrictions: reset the restrictions to invalid state.
|
||||
///
|
||||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
void GmmLib::GmmTextureCalc::ResetRestrictions(__GMM_BUFFER_TYPE *pRestriction)
|
||||
{
|
||||
pRestriction->MinDepth = 0xffffffff;
|
||||
}
|
||||
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
/// Internal function returns the best restrictions depending on how the surface may
|
||||
|
@ -449,7 +461,7 @@ void GmmLib::GmmTextureCalc::GetResRestrictions(GMM_TEXTURE_INFO * pTexinfo,
|
|||
return;
|
||||
}
|
||||
|
||||
__GmmPlatformResetRestrictions(&Restrictions); //Set to Default
|
||||
ResetRestrictions(&Restrictions); //Set to Default
|
||||
|
||||
// Get worst case restrictions that match GPU flags set in resource
|
||||
switch(pTexinfo->Type)
|
||||
|
@ -577,7 +589,14 @@ void GmmLib::GmmTextureCalc::GetResRestrictions(GMM_TEXTURE_INFO * pTexinfo,
|
|||
if(pTexinfo->Flags.Info.RenderCompressed ||
|
||||
pTexinfo->Flags.Info.MediaCompressed)
|
||||
{
|
||||
Restrictions.Alignment = GFX_ALIGN(Restrictions.Alignment, (!WA16K ? GMM_KBYTE(64) : GMM_KBYTE(16)));
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS)
|
||||
{
|
||||
Restrictions.Alignment = GFX_ALIGN(Restrictions.Alignment, GMM_KBYTE(64));
|
||||
}
|
||||
else // only for platforms having auxtable
|
||||
{
|
||||
Restrictions.Alignment = GFX_ALIGN(Restrictions.Alignment, (!WA16K ? GMM_KBYTE(64) : GMM_KBYTE(16)));
|
||||
}
|
||||
}
|
||||
|
||||
GMM_DPF_EXIT;
|
||||
|
|
|
@ -348,7 +348,8 @@ void GmmLib::GmmGen11TextureCalc::FillPlanarOffsetAddress(GMM_TEXTURE_INFO *pTex
|
|||
|
||||
if(GFX_GET_CURRENT_RENDERCORE(pPlatform->Platform) > IGFX_GEN11LP_CORE)
|
||||
{
|
||||
if(pTexInfo->Flags.Gpu.CCS)
|
||||
|
||||
if(pTexInfo->Flags.Gpu.CCS && !pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS)
|
||||
{
|
||||
//U/V must be aligned to AuxT granularity, for 16K AuxT- 4x pitchalign enforces it,
|
||||
//add extra padding for 64K AuxT
|
||||
|
|
|
@ -26,6 +26,10 @@ OTHER DEALINGS IN THE SOFTWARE.
|
|||
#include "Internal/Common/Texture/GmmGen11TextureCalc.h"
|
||||
#include "Internal/Common/Texture/GmmGen12TextureCalc.h"
|
||||
|
||||
GMM_MIPTAIL_SLOT_OFFSET MipTailSlotOffset1DSurface[15][5] = GEN11_MIPTAIL_SLOT_OFFSET_1D_SURFACE;
|
||||
GMM_MIPTAIL_SLOT_OFFSET MipTailSlotOffset2DSurface[15][5] = GEN11_MIPTAIL_SLOT_OFFSET_2D_SURFACE;
|
||||
GMM_MIPTAIL_SLOT_OFFSET MipTailSlotOffset3DSurface[15][5] = GEN11_MIPTAIL_SLOT_OFFSET_3D_SURFACE;
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
/// Calculates height of the 2D mip layout on Gen9
|
||||
///
|
||||
|
@ -145,9 +149,12 @@ uint32_t GmmLib::GmmGen12TextureCalc::Get2DMipMapHeight(GMM_TEXTURE_INFO *pTexIn
|
|||
GMM_STATUS GmmLib::GmmGen12TextureCalc::FillTexCCS(GMM_TEXTURE_INFO *pSurf,
|
||||
GMM_TEXTURE_INFO *pAuxTexInfo)
|
||||
{
|
||||
|
||||
|
||||
if(pAuxTexInfo->Flags.Gpu.__NonMsaaLinearCCS)
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS && !pSurf->Flags.Gpu.ProceduralTexture)
|
||||
{
|
||||
//No CCS allocation for lossless compression (exclude AMFS CCS).
|
||||
return GMM_SUCCESS;
|
||||
}
|
||||
else if(pAuxTexInfo->Flags.Gpu.__NonMsaaLinearCCS)
|
||||
{
|
||||
GMM_TEXTURE_INFO Surf = *pSurf;
|
||||
const GMM_PLATFORM_INFO *pPlatform = GMM_OVERRIDE_PLATFORM_INFO(pSurf);
|
||||
|
@ -167,7 +174,9 @@ GMM_STATUS GmmLib::GmmGen12TextureCalc::FillTexCCS(GMM_TEXTURE_INFO *pSurf,
|
|||
((Surf.Flags.Gpu.Depth || Surf.Flags.Gpu.SeparateStencil ||
|
||||
GMM_IS_64KB_TILE(Surf.Flags) || Surf.Flags.Info.TiledYf) ?
|
||||
1 :
|
||||
Surf.MSAA.NumSamples); // MSAA (non-Depth/Stencil) RT samples stored as array planes.
|
||||
Surf.MSAA.NumSamples) * // MSAA (non-Depth/Stencil) RT samples stored as array planes.
|
||||
((GMM_IS_64KB_TILE(Surf.Flags) && !pGmmGlobalContext->GetSkuTable().FtrTileY && (Surf.MSAA.NumSamples == 16)) ? 4 : // MSAA x8/x16 stored as pseudo array planes each with 4x samples
|
||||
(GMM_IS_64KB_TILE(Surf.Flags) && !pGmmGlobalContext->GetSkuTable().FtrTileY && (Surf.MSAA.NumSamples == 8)) ? 2 : 1);
|
||||
|
||||
if(GMM_IS_64KB_TILE(Surf.Flags) || Surf.Flags.Info.TiledYf)
|
||||
{
|
||||
|
@ -227,6 +236,11 @@ GMM_STATUS GmmLib::GmmGen12TextureCalc::FillTexCCS(GMM_TEXTURE_INFO *pSurf,
|
|||
pAuxTexInfo->Alignment.QPitch = GFX_ULONG_CAST(pAuxTexInfo->Size); //HW doesn't use QPitch for Aux except MCS, how'd AMFS get sw-filled non-zero QPitch?
|
||||
|
||||
pAuxTexInfo->Size *= ExpandedArraySize;
|
||||
if(Surf.MSAA.NumSamples && !pGmmGlobalContext->GetSkuTable().FtrTileY)
|
||||
{
|
||||
//MSAA Qpitch is sample-distance, multiply NumSamples in a tile
|
||||
pAuxTexInfo->Size *= GFX_MIN(Surf.MSAA.NumSamples, 4);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -236,6 +250,7 @@ GMM_STATUS GmmLib::GmmGen12TextureCalc::FillTexCCS(GMM_TEXTURE_INFO *pSurf,
|
|||
pAuxTexInfo->Pitch = 0;
|
||||
pAuxTexInfo->Type = RESOURCE_BUFFER;
|
||||
pAuxTexInfo->Alignment = {0};
|
||||
__GMM_ASSERT(ExpandedArraySize || (pAuxTexInfo->Size == 0));
|
||||
pAuxTexInfo->Alignment.QPitch = GFX_ULONG_CAST(pAuxTexInfo->Size) / ExpandedArraySize;
|
||||
pAuxTexInfo->Alignment.BaseAlignment = GMM_KBYTE(4); //TODO: TiledResource?
|
||||
pAuxTexInfo->Size = GFX_ALIGN(pAuxTexInfo->Size, PAGE_SIZE); //page-align final size
|
||||
|
@ -838,6 +853,8 @@ GMM_STATUS GMM_STDCALL GmmLib::GmmGen12TextureCalc::FillTexPlanar(GMM_TEXTURE_IN
|
|||
|
||||
AdjustedVHeight = VHeight;
|
||||
|
||||
FindMipTailStartLod(pTexInfo);
|
||||
|
||||
// In case of Planar surfaces, only the last Plane has to be aligned to 64 for LCU access
|
||||
if(pGmmGlobalContext->GetWaTable().WaAlignYUVResourceToLCU && GmmIsYUVFormatLCUAligned(pTexInfo->Format) && VHeight > 0)
|
||||
{
|
||||
|
@ -857,7 +874,7 @@ GMM_STATUS GMM_STDCALL GmmLib::GmmGen12TextureCalc::FillTexPlanar(GMM_TEXTURE_IN
|
|||
|
||||
pTexInfo->OffsetInfo.Plane.IsTileAlignedPlanes = true;
|
||||
|
||||
if(pTexInfo->Flags.Gpu.CCS)
|
||||
if(pTexInfo->Flags.Gpu.CCS && !pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS)
|
||||
{
|
||||
//U/V must be aligned to AuxT granularity, 4x pitchalign enforces 16K-align,
|
||||
//add extra padding for 64K AuxT
|
||||
|
@ -1198,3 +1215,126 @@ GMM_STATUS GMM_STDCALL GmmLib::GmmGen12TextureCalc::MSAACCSUsage(GMM_TEXTURE_INF
|
|||
}
|
||||
return Status;
|
||||
}
|
||||
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
/// Returns the mip offset of given LOD in Mip Tail
|
||||
///
|
||||
/// @param[in] pTexInfo: ptr to ::GMM_TEXTURE_INFO,
|
||||
/// MipLevel: mip-map level
|
||||
///
|
||||
/// @return offset value of LOD in bytes
|
||||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
uint32_t GmmLib::GmmGen12TextureCalc::GetMipTailByteOffset(GMM_TEXTURE_INFO *pTexInfo,
|
||||
uint32_t MipLevel)
|
||||
{
|
||||
uint32_t ByteOffset = 0, Slot = 0xff;
|
||||
|
||||
GMM_DPF_ENTER;
|
||||
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrTileY)
|
||||
{
|
||||
return GmmGen11TextureCalc::GetMipTailByteOffset(pTexInfo, MipLevel);
|
||||
}
|
||||
// 3D textures follow the Gen10 mip tail format
|
||||
if(!pGmmGlobalContext->GetSkuTable().FtrStandardMipTailFormat)
|
||||
{
|
||||
return GmmGen9TextureCalc::GetMipTailByteOffset(pTexInfo, MipLevel);
|
||||
}
|
||||
|
||||
// Til64 is the only format which supports MipTail on FtrTileY disabled platforms
|
||||
__GMM_ASSERT(pTexInfo->Flags.Info.Tile64);
|
||||
// Mipped MSAA is not supported for Tile64
|
||||
__GMM_ASSERT(pTexInfo->MSAA.NumSamples <= 1);
|
||||
|
||||
if((pTexInfo->Type == RESOURCE_1D) || (pTexInfo->Type == RESOURCE_3D) || (pTexInfo->Type == RESOURCE_2D || pTexInfo->Type == RESOURCE_CUBE))
|
||||
{
|
||||
Slot = MipLevel - pTexInfo->Alignment.MipTailStartLod;
|
||||
}
|
||||
|
||||
// Miptail Slot layout in Tile64: as per specifications
|
||||
// Byteoffset varies based on bpp for tile64 format, so any caller who needs to use byteoffset needs to call cpuswizzle with corresponding geomteric offsets
|
||||
// Returning ByteOffset as 0 for Tile64 always
|
||||
|
||||
// GMM_DPF_CRITICAL("Miptail byte offset requested for Tile64 \r\n");
|
||||
GMM_DPF_EXIT;
|
||||
|
||||
// return ByteOffset=0, i.e return start of miptail for any address within packed miptail
|
||||
return (ByteOffset);
|
||||
}
|
||||
|
||||
void GmmLib::GmmGen12TextureCalc::GetMipTailGeometryOffset(GMM_TEXTURE_INFO *pTexInfo,
|
||||
uint32_t MipLevel,
|
||||
uint32_t * OffsetX,
|
||||
uint32_t * OffsetY,
|
||||
uint32_t * OffsetZ)
|
||||
{
|
||||
uint32_t ArrayIndex = 0;
|
||||
uint32_t Slot = 0;
|
||||
|
||||
GMM_DPF_ENTER;
|
||||
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrTileY)
|
||||
{
|
||||
return GmmGen11TextureCalc::GetMipTailGeometryOffset(pTexInfo, MipLevel, OffsetX, OffsetY, OffsetZ);
|
||||
}
|
||||
|
||||
// Til64 is the only format which supports MipTail on FtrTileY disabled platforms
|
||||
__GMM_ASSERT(pTexInfo->Flags.Info.Tile64);
|
||||
// Mipped MSAA is not supported for Tile64
|
||||
__GMM_ASSERT(pTexInfo->MSAA.NumSamples <= 1);
|
||||
|
||||
switch(pTexInfo->BitsPerPixel)
|
||||
{
|
||||
case 128:
|
||||
ArrayIndex = 0;
|
||||
break;
|
||||
case 64:
|
||||
ArrayIndex = 1;
|
||||
break;
|
||||
case 32:
|
||||
ArrayIndex = 2;
|
||||
break;
|
||||
case 16:
|
||||
ArrayIndex = 3;
|
||||
break;
|
||||
case 8:
|
||||
ArrayIndex = 4;
|
||||
break;
|
||||
default:
|
||||
__GMM_ASSERT(0);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
// FtrTileY disabled platforms: platforms which support Tile4/Tile64 tiled formats
|
||||
if(pTexInfo->Type == RESOURCE_1D)
|
||||
{
|
||||
Slot = MipLevel - pTexInfo->Alignment.MipTailStartLod;
|
||||
|
||||
*OffsetX = MipTailSlotOffset1DSurface[Slot][ArrayIndex].X * pTexInfo->BitsPerPixel / 8;
|
||||
*OffsetY = MipTailSlotOffset1DSurface[Slot][ArrayIndex].Y;
|
||||
*OffsetZ = MipTailSlotOffset1DSurface[Slot][ArrayIndex].Z;
|
||||
}
|
||||
else if(pTexInfo->Type == RESOURCE_2D || pTexInfo->Type == RESOURCE_CUBE)
|
||||
{
|
||||
// Mipped MSAA is not supported on Tile64, so need not account for MSAA here
|
||||
Slot = MipLevel - pTexInfo->Alignment.MipTailStartLod;
|
||||
|
||||
*OffsetX = MipTailSlotOffset2DSurface[Slot][ArrayIndex].X * pTexInfo->BitsPerPixel / 8;
|
||||
*OffsetY = MipTailSlotOffset2DSurface[Slot][ArrayIndex].Y;
|
||||
*OffsetZ = MipTailSlotOffset2DSurface[Slot][ArrayIndex].Z;
|
||||
}
|
||||
else if(pTexInfo->Type == RESOURCE_3D)
|
||||
{
|
||||
Slot = MipLevel - pTexInfo->Alignment.MipTailStartLod;
|
||||
|
||||
*OffsetX = MipTailSlotOffset3DSurface[Slot][ArrayIndex].X * pTexInfo->BitsPerPixel / 8;
|
||||
*OffsetY = MipTailSlotOffset3DSurface[Slot][ArrayIndex].Y;
|
||||
*OffsetZ = MipTailSlotOffset3DSurface[Slot][ArrayIndex].Z;
|
||||
}
|
||||
|
||||
GMM_DPF_EXIT;
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
@ -591,8 +591,8 @@ void GmmLib::GmmGen9TextureCalc::Fill2DTexOffsetAddress(GMM_TEXTURE_INFO *pTexIn
|
|||
ArrayQPitch = GFX_ALIGN_NP2(ArrayQPitch, Alignment);
|
||||
|
||||
// Color Surf with MSAA Enabled Mutiply 4
|
||||
if((pTexInfo->Flags.Info.TiledYs) && (!pGmmGlobalContext->GetSkuTable().FtrTileY) &&
|
||||
((pTexInfo->MSAA.NumSamples == 8) || (pTexInfo->MSAA.NumSamples == 16)) &&
|
||||
if(GMM_IS_64KB_TILE(pTexInfo->Flags) && (!pGmmGlobalContext->GetSkuTable().FtrTileY) &&
|
||||
((pTexInfo->MSAA.NumSamples == 8) && (pTexInfo->MSAA.NumSamples == 16)) &&
|
||||
((pTexInfo->Flags.Gpu.Depth == 0) && (pTexInfo->Flags.Gpu.SeparateStencil == 0)))
|
||||
{
|
||||
ArrayQPitch *= 4; /* Aligned height of 4 samples */
|
||||
|
|
|
@ -585,7 +585,7 @@ bool GmmLib::GmmTextureCalc::GmmGetD3DToHwTileConversion(GMM_TEXTURE_INFO *pTexI
|
|||
}
|
||||
|
||||
// for TileYS, no conversion
|
||||
if(pTexInfo->Flags.Info.TiledYs || pTexInfo->Flags.Info.Linear)
|
||||
if(GMM_IS_64KB_TILE(pTexInfo->Flags) || pTexInfo->Flags.Info.Linear)
|
||||
{
|
||||
*pColFactor = 1;
|
||||
*pRowFactor = 1;
|
||||
|
|
|
@ -70,6 +70,27 @@ GMM_INLINE GMM_STATUS __GmmTexFillHAlignVAlign(GMM_TEXTURE_INFO *pTexInfo)
|
|||
__GMM_ASSERTPTR(pTexInfo, GMM_ERROR);
|
||||
__GMM_ASSERTPTR(pGmmGlobalContext, GMM_ERROR);
|
||||
|
||||
#define SET_ALIGN_FACTOR(Xxx, Bytes) \
|
||||
if(!pGmmGlobalContext->GetSkuTable().FtrTileY) \
|
||||
{ \
|
||||
UnitAlign##Xxx = \
|
||||
(pTexInfo->BitsPerPixel == 128) ? Bytes/16 : \
|
||||
(pTexInfo->BitsPerPixel == 64) ? Bytes/8 : \
|
||||
(pTexInfo->BitsPerPixel == 32) ? Bytes/4 : \
|
||||
(pTexInfo->BitsPerPixel == 16) ? Bytes/2 : Bytes ; \
|
||||
\
|
||||
if(!pTexInfo->Flags.Info.Linear && \
|
||||
(pTexInfo->BitsPerPixel == 24 || pTexInfo->BitsPerPixel == 48 || pTexInfo->BitsPerPixel == 96)) \
|
||||
{ \
|
||||
UnitAlign##Xxx = 16; \
|
||||
} \
|
||||
else if (pTexInfo->Flags.Info.Linear && \
|
||||
(pTexInfo->BitsPerPixel == 24 || pTexInfo->BitsPerPixel == 48 || pTexInfo->BitsPerPixel == 96))\
|
||||
{ \
|
||||
UnitAlign##Xxx = 128; \
|
||||
} \
|
||||
}
|
||||
|
||||
if (!((pTexInfo->Format > GMM_FORMAT_INVALID) &&
|
||||
(pTexInfo->Format < GMM_RESOURCE_FORMATS)))
|
||||
{
|
||||
|
@ -124,13 +145,27 @@ GMM_INLINE GMM_STATUS __GmmTexFillHAlignVAlign(GMM_TEXTURE_INFO *pTexInfo)
|
|||
!pTexInfo->Flags.Gpu.Depth &&
|
||||
!pTexInfo->Flags.Gpu.SeparateStencil)
|
||||
{
|
||||
switch(pTexInfo->MSAA.NumSamples)
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrTileY)
|
||||
{
|
||||
case 16: UnitAlignWidth /= 4; UnitAlignHeight /= 4; break;
|
||||
case 8: UnitAlignWidth /= 4; UnitAlignHeight /= 2; break;
|
||||
case 4: UnitAlignWidth /= 2; UnitAlignHeight /= 2; break;
|
||||
case 2: UnitAlignWidth /= 2; break;
|
||||
default: __GMM_ASSERT(0);
|
||||
switch(pTexInfo->MSAA.NumSamples)
|
||||
{
|
||||
case 16: UnitAlignWidth /= 4; UnitAlignHeight /= 4; break;
|
||||
case 8: UnitAlignWidth /= 4; UnitAlignHeight /= 2; break;
|
||||
case 4: UnitAlignWidth /= 2; UnitAlignHeight /= 2; break;
|
||||
case 2: UnitAlignWidth /= 2; break;
|
||||
default: __GMM_ASSERT(0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
switch (pTexInfo->MSAA.NumSamples)
|
||||
{
|
||||
case 4:
|
||||
case 8:
|
||||
case 16: UnitAlignWidth /= 2; UnitAlignHeight /= 2; break;
|
||||
case 2: UnitAlignWidth /= 2; break;
|
||||
default: __GMM_ASSERT(0);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -166,6 +201,9 @@ GMM_INLINE GMM_STATUS __GmmTexFillHAlignVAlign(GMM_TEXTURE_INFO *pTexInfo)
|
|||
(pTexInfo->Type == RESOURCE_1D))
|
||||
{
|
||||
UnitAlignWidth = 64;
|
||||
|
||||
// Tile4/64
|
||||
SET_ALIGN_FACTOR(Width, 128);
|
||||
}
|
||||
/// CCS ///////////////////////////////////////////////////////////
|
||||
else if (pTexInfo->Flags.Gpu.CCS &&
|
||||
|
@ -190,6 +228,9 @@ GMM_INLINE GMM_STATUS __GmmTexFillHAlignVAlign(GMM_TEXTURE_INFO *pTexInfo)
|
|||
{
|
||||
UnitAlignWidth = pPlatform->TexAlign.YUV422.Width;
|
||||
UnitAlignHeight = pPlatform->TexAlign.YUV422.Height;
|
||||
|
||||
// For packed 8/16-bit formats alignment factor of 4 will give us < 16B so expand to 32B
|
||||
SET_ALIGN_FACTOR(Width, 32);
|
||||
}
|
||||
else if(GmmIsCompressed(pTexInfo->Format)) /////////////////////////////
|
||||
{
|
||||
|
@ -233,11 +274,16 @@ GMM_INLINE GMM_STATUS __GmmTexFillHAlignVAlign(GMM_TEXTURE_INFO *pTexInfo)
|
|||
UnitAlignWidth = pPlatform->TexAlign.Depth_D16_UNORM_1x_4x_16x.Width;
|
||||
UnitAlignHeight = pPlatform->TexAlign.Depth_D16_UNORM_1x_4x_16x.Height;
|
||||
}
|
||||
|
||||
SET_ALIGN_FACTOR(Width, 16);
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
UnitAlignWidth = pPlatform->TexAlign.Depth.Width;
|
||||
UnitAlignHeight = pPlatform->TexAlign.Depth.Height;
|
||||
|
||||
SET_ALIGN_FACTOR(Width, 32);
|
||||
}
|
||||
}
|
||||
/// Separate Stencil //////////////////////////////////////////////
|
||||
|
@ -245,6 +291,9 @@ GMM_INLINE GMM_STATUS __GmmTexFillHAlignVAlign(GMM_TEXTURE_INFO *pTexInfo)
|
|||
{
|
||||
UnitAlignWidth = pPlatform->TexAlign.SeparateStencil.Width;
|
||||
UnitAlignHeight = pPlatform->TexAlign.SeparateStencil.Height;
|
||||
|
||||
SET_ALIGN_FACTOR(Width, 16);
|
||||
|
||||
}
|
||||
/// Cross Adapter //////////////////////////////////////////////
|
||||
else if(pTexInfo->Flags.Info.XAdapter)
|
||||
|
@ -252,6 +301,10 @@ GMM_INLINE GMM_STATUS __GmmTexFillHAlignVAlign(GMM_TEXTURE_INFO *pTexInfo)
|
|||
//Add cross adapter height restriction.
|
||||
UnitAlignHeight = pPlatform->TexAlign.XAdapter.Height;
|
||||
UnitAlignWidth = pPlatform->TexAlign.XAdapter.Width;
|
||||
|
||||
SET_ALIGN_FACTOR(Width, 128);
|
||||
|
||||
__GMM_ASSERT(pTexInfo->MaxLod == 0);
|
||||
}
|
||||
else if(((pTexInfo->Flags.Gpu.MCS &&
|
||||
GFX_GET_CURRENT_RENDERCORE(pPlatform->Platform) >= IGFX_GEN12_CORE) ||
|
||||
|
@ -260,6 +313,8 @@ GMM_INLINE GMM_STATUS __GmmTexFillHAlignVAlign(GMM_TEXTURE_INFO *pTexInfo)
|
|||
{
|
||||
UnitAlignWidth = 16;
|
||||
UnitAlignHeight = 4;
|
||||
|
||||
SET_ALIGN_FACTOR(Width, 128);
|
||||
}
|
||||
else if(pTexInfo->Flags.Wa.__ForceOtherHVALIGN4)
|
||||
{
|
||||
|
@ -296,6 +351,8 @@ GMM_INLINE GMM_STATUS __GmmTexFillHAlignVAlign(GMM_TEXTURE_INFO *pTexInfo)
|
|||
{
|
||||
UnitAlignWidth = 8;
|
||||
}
|
||||
|
||||
SET_ALIGN_FACTOR(Width, 128);
|
||||
}
|
||||
else if(pTexInfo->MSAA.NumSamples <= 1)
|
||||
{
|
||||
|
|
|
@ -103,6 +103,10 @@ void GmmLib::GmmTextureCalc::SetTileMode(GMM_TEXTURE_INFO *pTexInfo)
|
|||
{
|
||||
GENERATE_TILE_MODE(YS, 1D, 2D, 2D_2X, 2D_4X, 2D_8X, 2D_16X, 3D);
|
||||
}
|
||||
else
|
||||
{
|
||||
GENERATE_TILE_MODE(_64, 1D, 2D, 2D_2X, 2D_4X, 2D_4X, 2D_4X, 3D);
|
||||
}
|
||||
|
||||
pTexInfo->Flags.Info.TiledYf = 0;
|
||||
GMM_SET_64KB_TILE(pTexInfo->Flags, 1);
|
||||
|
@ -422,7 +426,7 @@ GMM_STATUS GmmLib::GmmTextureCalc::FillTexPitchAndSize(GMM_TEXTURE_INFO * pTexIn
|
|||
|
||||
if(pTexInfo->Flags.Info.RenderCompressed || pTexInfo->Flags.Info.MediaCompressed)
|
||||
{
|
||||
if(!GMM_IS_64KB_TILE(pTexInfo->Flags)) //Ys is naturally aligned to required 4 YF pages
|
||||
if(!GMM_IS_64KB_TILE(pTexInfo->Flags) && !pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS) //Ys is naturally aligned to required 4 YF pages
|
||||
{
|
||||
// Align Pitch to 4-tile boundary
|
||||
WidthBytesPhysical = GFX_ALIGN(WidthBytesPhysical,
|
||||
|
@ -472,7 +476,7 @@ GMM_STATUS GmmLib::GmmTextureCalc::FillTexPitchAndSize(GMM_TEXTURE_INFO * pTexIn
|
|||
|
||||
if(pGmmGlobalContext->GetWaTable().WaMsaa8xTileYDepthPitchAlignment &&
|
||||
(pTexInfo->MSAA.NumSamples == 8) &&
|
||||
pTexInfo->Flags.Info.TiledY &&
|
||||
GMM_IS_4KB_TILE(pTexInfo->Flags) &&
|
||||
pTexInfo->Flags.Gpu.Depth)
|
||||
{
|
||||
WidthBytesLock =
|
||||
|
@ -679,6 +683,20 @@ GMM_STATUS GmmLib::GmmTextureCalc::FillTexPitchAndSize(GMM_TEXTURE_INFO * pTexIn
|
|||
{
|
||||
Size *= pTexInfo->MSAA.NumSamples;
|
||||
}
|
||||
else
|
||||
{
|
||||
//XeHP
|
||||
if((pTexInfo->MSAA.NumSamples == 8 || pTexInfo->MSAA.NumSamples == 16))
|
||||
{
|
||||
uint64_t SliceSize = pTexInfo->Pitch * Height;
|
||||
SliceSize *= 4; // multiple by samples per tile
|
||||
Size = (int64_t)SliceSize;
|
||||
}
|
||||
else
|
||||
{
|
||||
Size *= pTexInfo->MSAA.NumSamples;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if((pTexInfo->Flags.Info.TiledY && pTexInfo->Flags.Gpu.TiledResource))
|
||||
|
|
|
@ -181,8 +181,8 @@ GMM_STATUS GmmLib::GmmTextureCalc::PreProcessTexSpecialCases(GMM_TEXTURE_INFO *p
|
|||
pTexInfo->Flags.Info.TiledW = 0;
|
||||
pTexInfo->Flags.Info.TiledX = 0;
|
||||
pTexInfo->Flags.Info.TiledYf = 0;
|
||||
pTexInfo->Flags.Info.TiledYs = 0;
|
||||
|
||||
GMM_SET_64KB_TILE(pTexInfo->Flags, 0);
|
||||
GMM_SET_4KB_TILE(pTexInfo->Flags, 1);
|
||||
}
|
||||
else
|
||||
|
@ -197,7 +197,11 @@ GMM_STATUS GmmLib::GmmTextureCalc::PreProcessTexSpecialCases(GMM_TEXTURE_INFO *p
|
|||
// With CCS surface creation, clients send height, width, depth, etc. of
|
||||
// the associated RenderTarget--and here we convert to the appropriate CCS
|
||||
// creation parameters...
|
||||
__GMM_ASSERT((pTexInfo->Flags.Info.Linear + pTexInfo->Flags.Info.TiledW + pTexInfo->Flags.Info.TiledX + pTexInfo->Flags.Info.TiledY) == 1);
|
||||
__GMM_ASSERT((!pGmmLibContext->GetSkuTable().FtrTileY ||
|
||||
(pTexInfo->Flags.Info.Linear + pTexInfo->Flags.Info.TiledW + pTexInfo->Flags.Info.TiledX + pTexInfo->Flags.Info.TiledY)) == 1);
|
||||
|
||||
__GMM_ASSERT((pGmmLibContext->GetSkuTable().FtrTileY || (pTexInfo->Flags.Info.Linear + pTexInfo->Flags.Info.Tile4 + pTexInfo->Flags.Info.Tile64)) == 1);
|
||||
|
||||
__GMM_ASSERT((pTexInfo->MSAA.NumSamples == 1) || (pTexInfo->MSAA.NumSamples == 2) || (pTexInfo->MSAA.NumSamples == 4) ||
|
||||
(pTexInfo->MSAA.NumSamples == 8) || (pTexInfo->MSAA.NumSamples == 16));
|
||||
|
||||
|
@ -210,8 +214,8 @@ GMM_STATUS GmmLib::GmmTextureCalc::PreProcessTexSpecialCases(GMM_TEXTURE_INFO *p
|
|||
pTexInfo->Flags.Info.TiledW = 0;
|
||||
pTexInfo->Flags.Info.TiledX = 0;
|
||||
pTexInfo->Flags.Info.TiledYf = 0;
|
||||
pTexInfo->Flags.Info.TiledYs = 0;
|
||||
|
||||
GMM_SET_64KB_TILE(pTexInfo->Flags, 0);
|
||||
GMM_SET_4KB_TILE(pTexInfo->Flags, 1);
|
||||
|
||||
//Clear compression request in CCS
|
||||
|
@ -237,22 +241,29 @@ GMM_STATUS GmmLib::GmmTextureCalc::PreProcessTexSpecialCases(GMM_TEXTURE_INFO *p
|
|||
GMM_ASSERTDPF((pTexInfo->MaxLod == 0), "Stencil Buffer LOD's not supported!");
|
||||
}
|
||||
|
||||
// Separate Stencil Tile-W Gen8-Gen11, otherwise Tile-Y
|
||||
pTexInfo->Flags.Info.Linear = 0;
|
||||
pTexInfo->Flags.Info.TiledX = 0;
|
||||
pTexInfo->Flags.Info.TiledYf = 0;
|
||||
pTexInfo->Flags.Info.TiledYs = 0;
|
||||
pTexInfo->Flags.Info.TiledW = 0;
|
||||
pTexInfo->Flags.Info.TiledY = 0;
|
||||
|
||||
if(GFX_GET_CURRENT_RENDERCORE(pPlatform->Platform) >= IGFX_GEN8_CORE &&
|
||||
GFX_GET_CURRENT_RENDERCORE(pPlatform->Platform) <= IGFX_GEN11_CORE)
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrTileY)
|
||||
{
|
||||
pTexInfo->Flags.Info.TiledW = 1;
|
||||
// Separate Stencil Tile-W Gen8-Gen11, otherwise Tile-Y
|
||||
pTexInfo->Flags.Info.Linear = 0;
|
||||
pTexInfo->Flags.Info.TiledX = 0;
|
||||
pTexInfo->Flags.Info.TiledYf = 0;
|
||||
pTexInfo->Flags.Info.TiledW = 0;
|
||||
GMM_SET_4KB_TILE(pTexInfo->Flags, 0);
|
||||
GMM_SET_64KB_TILE(pTexInfo->Flags, 0);
|
||||
|
||||
if(GFX_GET_CURRENT_RENDERCORE(pPlatform->Platform) >= IGFX_GEN8_CORE &&
|
||||
GFX_GET_CURRENT_RENDERCORE(pPlatform->Platform) <= IGFX_GEN11_CORE)
|
||||
{
|
||||
pTexInfo->Flags.Info.TiledW = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
GMM_SET_4KB_TILE(pTexInfo->Flags, 1);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
GMM_SET_4KB_TILE(pTexInfo->Flags, 1);
|
||||
__GMM_ASSERT(pTexInfo->Flags.Info.Tile4 + pTexInfo->Flags.Info.Tile64 == 1);
|
||||
}
|
||||
}
|
||||
else
|
||||
|
|
|
@ -353,7 +353,8 @@ GmmLib::GmmPageTableMgr::GmmPageTableMgr(GMM_DEVICE_CALLBACKS_INT *DeviceCB, uin
|
|||
ptr->pClientContext = pClientContextIn;
|
||||
memcpy(&ptr->DeviceCbInt, DeviceCB, sizeof(GMM_DEVICE_CALLBACKS_INT));
|
||||
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrE2ECompression)
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrE2ECompression &&
|
||||
!pGmmGlobalContext->GetSkuTable().FtrFlatPhysCCS)
|
||||
{
|
||||
__GMM_ASSERT(TTFlags & AUXTT); //Aux-TT is mandatory
|
||||
ptr->AuxTTObj = new AuxTable();
|
||||
|
|
|
@ -40,7 +40,7 @@ void CTestGen12CachePolicy::SetUpTestCase()
|
|||
pGfxAdapterInfo->SystemInfo.L3CacheSizeInKb = 3072;
|
||||
|
||||
const_cast<SKU_FEATURE_TABLE &>(pGfxAdapterInfo->SkuTable).FtrEDram = false;
|
||||
const_cast<SKU_FEATURE_TABLE &>(pGfxAdapterInfo->SkuTable).FtrLLCBypass = 1;
|
||||
const_cast<SKU_FEATURE_TABLE &>(pGfxAdapterInfo->SkuTable).FtrLLCBypass = 0;
|
||||
|
||||
CommonULT::SetUpTestCase();
|
||||
|
||||
|
|
|
@ -45,7 +45,7 @@ void CTestGen12Resource::SetUpTestCase()
|
|||
|
||||
pGfxAdapterInfo->SkuTable.FtrLinearCCS = 1; //legacy y =>0 - test both
|
||||
pGfxAdapterInfo->SkuTable.FtrTileY = 1;
|
||||
pGfxAdapterInfo->SkuTable.FtrLLCBypass = 1;
|
||||
pGfxAdapterInfo->SkuTable.FtrLLCBypass = 0;
|
||||
CommonULT::SetUpTestCase();
|
||||
}
|
||||
}
|
||||
|
|
|
@ -49,7 +49,7 @@ void CTestGen12dGPUCachePolicy::SetUpGen12dGPUVariant(PRODUCT_FAMILY platform)
|
|||
|
||||
GfxPlatform.eProductFamily = platform;
|
||||
|
||||
GfxPlatform.eRenderCoreFamily = IGFX_GEN12_CORE;
|
||||
GfxPlatform.eRenderCoreFamily = IGFX_XE_HP_CORE;
|
||||
|
||||
pGfxAdapterInfo = (ADAPTER_INFO *)malloc(sizeof(ADAPTER_INFO));
|
||||
if(pGfxAdapterInfo)
|
||||
|
@ -58,7 +58,7 @@ void CTestGen12dGPUCachePolicy::SetUpGen12dGPUVariant(PRODUCT_FAMILY platform)
|
|||
|
||||
pGfxAdapterInfo->SkuTable.FtrLinearCCS = 1; //legacy y =>0 - test both
|
||||
pGfxAdapterInfo->SkuTable.FtrStandardMipTailFormat = 1;
|
||||
pGfxAdapterInfo->SkuTable.FtrTileY = 1;
|
||||
pGfxAdapterInfo->SkuTable.FtrTileY = 0;
|
||||
pGfxAdapterInfo->SkuTable.FtrLocalMemory = 1;
|
||||
CommonULT::SetUpTestCase();
|
||||
}
|
||||
|
@ -80,6 +80,15 @@ TEST_F(CTestGen12dGPUCachePolicy, TestGen12dGPU_DG1CachePolicy)
|
|||
TearDownGen12dGPUVariant();
|
||||
}
|
||||
|
||||
TEST_F(CTestGen12dGPUCachePolicy, TestGen12dGPU_XE_HP_SDVCachePolicy)
|
||||
{
|
||||
SetUpGen12dGPUVariant(IGFX_XE_HP_SDV);
|
||||
|
||||
CheckL3Gen12dGPUCachePolicy();
|
||||
|
||||
TearDownGen12dGPUVariant();
|
||||
}
|
||||
|
||||
void CTestGen12dGPUCachePolicy::CheckSpecialMocs(uint32_t Usage,
|
||||
uint32_t AssignedMocsIdx,
|
||||
GMM_CACHE_POLICY_ELEMENT ClientRequest)
|
||||
|
@ -88,11 +97,13 @@ void CTestGen12dGPUCachePolicy::CheckSpecialMocs(uint32_t Usa
|
|||
{
|
||||
EXPECT_EQ(AssignedMocsIdx, 60) << "Usage# " << Usage << ": Incorrect Index for CCS";
|
||||
EXPECT_EQ(0, ClientRequest.L3) << "Usage# " << Usage << ": Incorrect L3 cacheability for CCS";
|
||||
EXPECT_EQ(0, ClientRequest.UcLookup) << "Usage# " << Usage << ": Incorrect L3 LookUp cacheability for CCS";
|
||||
}
|
||||
else if(Usage == GMM_RESOURCE_USAGE_CCS_MEDIA_WRITABLE) // 61
|
||||
{
|
||||
EXPECT_EQ(AssignedMocsIdx, 61) << "Usage# " << Usage << ": Incorrect Index for CCS";
|
||||
EXPECT_EQ(0, ClientRequest.L3) << "Usage# " << Usage << ": Incorrect L3 cacheability for CCS";
|
||||
EXPECT_EQ(0, ClientRequest.UcLookup) << "Usage# " << Usage << ": Incorrect L3 LookUp cacheability for CCS";
|
||||
}
|
||||
else if(Usage == GMM_RESOURCE_USAGE_MOCS_62) //62
|
||||
{
|
||||
|
@ -145,12 +156,12 @@ void CTestGen12dGPUCachePolicy::CheckL3Gen12dGPUCachePolicy()
|
|||
// Check if Mocs Index is not greater than GMM_MAX_NUMBER_MOCS_INDEXES
|
||||
EXPECT_GT(GMM_MAX_NUMBER_MOCS_INDEXES, AssignedMocsIdx) << "Usage# " << Usage << ": MOCS Index greater than MAX allowed (63)";
|
||||
|
||||
if(GfxPlatform.eProductFamily <= IGFX_DG1)
|
||||
if(GfxPlatform.eProductFamily <= IGFX_XE_HP_SDV)
|
||||
{
|
||||
CheckMocsIdxHDCL1(Usage, AssignedMocsIdx, ClientRequest);
|
||||
}
|
||||
|
||||
if(GfxPlatform.eProductFamily <= IGFX_DG1)
|
||||
if(GfxPlatform.eProductFamily <= IGFX_XE_HP_SDV)
|
||||
{
|
||||
CheckSpecialMocs(Usage, AssignedMocsIdx, ClientRequest);
|
||||
}
|
||||
|
|
|
@ -35,8 +35,8 @@ using namespace std;
|
|||
void CTestGen12dGPUResource::SetUpTestCase()
|
||||
{
|
||||
printf("%s\n", __FUNCTION__);
|
||||
GfxPlatform.eProductFamily = IGFX_DG1;
|
||||
GfxPlatform.eRenderCoreFamily = IGFX_GEN12_CORE;
|
||||
GfxPlatform.eProductFamily = IGFX_XE_HP_SDV;
|
||||
GfxPlatform.eRenderCoreFamily = IGFX_XE_HP_CORE;
|
||||
|
||||
pGfxAdapterInfo = (ADAPTER_INFO *)malloc(sizeof(ADAPTER_INFO));
|
||||
if(pGfxAdapterInfo)
|
||||
|
@ -971,9 +971,8 @@ TEST_F(CTestGen12dGPUResource, DISABLED_TestPlanarYCompressedResource)
|
|||
}
|
||||
|
||||
/// @brief ULT for Planar Ys Compressed resource
|
||||
TEST_F(CTestGen12dGPUResource, TestPlanarYsCompressedResource)
|
||||
TEST_F(CTestGen12dGPUResource, TestPlanarTile64CompressedResource)
|
||||
{
|
||||
const TEST_TILE_TYPE TileTypeSupported = {TEST_TILEYS};
|
||||
|
||||
const uint32_t TileSize[TEST_BPP_MAX][2] = {
|
||||
{256, 256}, {512, 128}, {512, 128}, {1024, 64}, {1024, 64}}; // TileYS
|
||||
|
@ -1018,6 +1017,7 @@ TEST_F(CTestGen12dGPUResource, TestPlanarYsCompressedResource)
|
|||
ResourceInfo = pGmmULTClientContext->CreateResInfoObject(&gmmParams);
|
||||
|
||||
GMM_REQ_OFFSET_INFO OffsetInfo = {};
|
||||
|
||||
OffsetInfo.ReqLock = 1;
|
||||
OffsetInfo.ReqRender = 1;
|
||||
OffsetInfo.Plane = GMM_PLANE_Y;
|
||||
|
@ -1030,9 +1030,21 @@ TEST_F(CTestGen12dGPUResource, TestPlanarYsCompressedResource)
|
|||
// gmmParams.Flags.Gpu.UnifiedAuxSurface = 0;
|
||||
// GMM_RESOURCE_INFO *AuxResourceInfo;
|
||||
// AuxResourceInfo = pGmmULTClientContext->CreateResInfoObject(&gmmParams);
|
||||
// EXPECT_EQ(ResourceInfo->GetSizeAuxSurface(GMM_AUX_CCS), AuxResourceInfo->G
|
||||
|
||||
// add verification
|
||||
|
||||
//{ //separate Aux
|
||||
// gmmParams.Flags.Gpu.UnifiedAuxSurface = 0;
|
||||
|
||||
// GMM_RESOURCE_INFO *AuxResourceInfo;
|
||||
// AuxResourceInfo = pGmmULTClientContext->CreateResInfoObject(&gmmParams);
|
||||
|
||||
// EXPECT_EQ(ResourceInfo->GetSizeAuxSurface(GMM_AUX_CCS), AuxResourceInfo->GetSizeSurface());
|
||||
|
||||
// pGmmULTClientContext->DestroyResInfoObject(AuxResourceInfo);
|
||||
//}
|
||||
|
||||
pGmmULTClientContext->DestroyResInfoObject(ResourceInfo);
|
||||
}
|
||||
}
|
||||
|
@ -2166,12 +2178,12 @@ TEST_F(CTestGen12dGPUResource, DISABLED_TestLinearCompressedResource)
|
|||
pGmmULTClientContext->DestroyResInfoObject(ResourceInfo);
|
||||
}
|
||||
}
|
||||
///TODO Add MSAA/Depth Compressed Resource tests
|
||||
///Add MSAA/Depth Compressed Resource tests
|
||||
TEST_F(CTestGen12dGPUResource, DISABLED_TestLosslessMSAACompressedResource)
|
||||
{
|
||||
}
|
||||
|
||||
///TODO Add MSAA/Depth Compressed Resource tests
|
||||
///Add MSAA/Depth Compressed Resource tests
|
||||
TEST_F(CTestGen12dGPUResource, DISABLED_TestDepthCompressedResource)
|
||||
{
|
||||
const uint32_t HAlign = 8;
|
||||
|
|
|
@ -147,104 +147,116 @@ spatial locality for 3D or MSAA sample neighbors can be controlled, also. */
|
|||
{ (b15 == 'x' ? 0x8000 : 0) + (b14 == 'x' ? 0x4000 : 0) + (b13 == 'x' ? 0x2000 : 0) + (b12 == 'x' ? 0x1000 : 0) + (b11 == 'x' ? 0x0800 : 0) + (b10 == 'x' ? 0x0400 : 0) + (b9 == 'x' ? 0x0200 : 0) + (b8 == 'x' ? 0x0100 : 0) + (b7 == 'x' ? 0x0080 : 0) + (b6 == 'x' ? 0x0040 : 0) + (b5 == 'x' ? 0x0020 : 0) + (b4 == 'x' ? 0x0010 : 0) + (b3 == 'x' ? 0x0008 : 0) + (b2 == 'x' ? 0x0004 : 0) + (b1 == 'x' ? 0x0002 : 0) + (b0 == 'x' ? 0x0001 : 0), \
|
||||
(b15 == 'y' ? 0x8000 : 0) + (b14 == 'y' ? 0x4000 : 0) + (b13 == 'y' ? 0x2000 : 0) + (b12 == 'y' ? 0x1000 : 0) + (b11 == 'y' ? 0x0800 : 0) + (b10 == 'y' ? 0x0400 : 0) + (b9 == 'y' ? 0x0200 : 0) + (b8 == 'y' ? 0x0100 : 0) + (b7 == 'y' ? 0x0080 : 0) + (b6 == 'y' ? 0x0040 : 0) + (b5 == 'y' ? 0x0020 : 0) + (b4 == 'y' ? 0x0010 : 0) + (b3 == 'y' ? 0x0008 : 0) + (b2 == 'y' ? 0x0004 : 0) + (b1 == 'y' ? 0x0002 : 0) + (b0 == 'y' ? 0x0001 : 0), \
|
||||
(b15 == 'z' ? 0x8000 : 0) + (b14 == 'z' ? 0x4000 : 0) + (b13 == 'z' ? 0x2000 : 0) + (b12 == 'z' ? 0x1000 : 0) + (b11 == 'z' ? 0x0800 : 0) + (b10 == 'z' ? 0x0400 : 0) + (b9 == 'z' ? 0x0200 : 0) + (b8 == 'z' ? 0x0100 : 0) + (b7 == 'z' ? 0x0080 : 0) + (b6 == 'z' ? 0x0040 : 0) + (b5 == 'z' ? 0x0020 : 0) + (b4 == 'z' ? 0x0010 : 0) + (b3 == 'z' ? 0x0008 : 0) + (b2 == 'z' ? 0x0004 : 0) + (b1 == 'z' ? 0x0002 : 0) + (b0 == 'z' ? 0x0001 : 0) }
|
||||
#endif
|
||||
#endif
|
||||
#define SWIZZLE(__SWIZZLE_Args) __SWIZZLE __SWIZZLE_Args
|
||||
|
||||
// Legacy Intel Tiling Swizzles...
|
||||
SWIZZLE(( INTEL_TILE_X o o o o Y Y Y X X X X X X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_Y o o o o X X X Y Y Y Y Y X X X X ));
|
||||
|
||||
// Standard Tiling Swizzles...
|
||||
#define LOW_128bpp X X Y Y X X X X
|
||||
#define LOW_64bpp LOW_128bpp
|
||||
#define LOW_32bpp X Y Y Y X X X X
|
||||
#define LOW_16bpp LOW_32bpp
|
||||
#define LOW_8bpp Y Y Y Y X X X X
|
||||
|
||||
SWIZZLE(( INTEL_TILEYF_128 o o o o X Y X Y LOW_128bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_64 o o o o X Y X Y LOW_64bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_32 o o o o X Y X Y LOW_32bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_16 o o o o X Y X Y LOW_16bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_8 o o o o X Y X Y LOW_8bpp ));
|
||||
|
||||
SWIZZLE(( INTEL_TILEYS_128 X Y X Y X Y X Y LOW_128bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_64 X Y X Y X Y X Y LOW_64bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_32 X Y X Y X Y X Y LOW_32bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_16 X Y X Y X Y X Y LOW_16bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_8 X Y X Y X Y X Y LOW_8bpp ));
|
||||
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA2_128 o o o o S Y X Y LOW_128bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA2_64 o o o o S Y X Y LOW_64bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA2_32 o o o o S Y X Y LOW_32bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA2_16 o o o o S Y X Y LOW_16bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA2_8 o o o o S Y X Y LOW_8bpp ));
|
||||
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA2_128 S Y X Y X Y X Y LOW_128bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA2_64 S Y X Y X Y X Y LOW_64bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA2_32 S Y X Y X Y X Y LOW_32bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA2_16 S Y X Y X Y X Y LOW_16bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA2_8 S Y X Y X Y X Y LOW_8bpp ));
|
||||
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA4_128 o o o o S S X Y LOW_128bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA4_64 o o o o S S X Y LOW_64bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA4_32 o o o o S S X Y LOW_32bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA4_16 o o o o S S X Y LOW_16bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA4_8 o o o o S S X Y LOW_8bpp ));
|
||||
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA4_128 S S X Y X Y X Y LOW_128bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA4_64 S S X Y X Y X Y LOW_64bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA4_32 S S X Y X Y X Y LOW_32bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA4_16 S S X Y X Y X Y LOW_16bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA4_8 S S X Y X Y X Y LOW_8bpp ));
|
||||
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA8_128 o o o o S S S Y LOW_128bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA8_64 o o o o S S S Y LOW_64bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA8_32 o o o o S S S Y LOW_32bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA8_16 o o o o S S S Y LOW_16bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA8_8 o o o o S S S Y LOW_8bpp ));
|
||||
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA8_128 S S S Y X Y X Y LOW_128bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA8_64 S S S Y X Y X Y LOW_64bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA8_32 S S S Y X Y X Y LOW_32bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA8_16 S S S Y X Y X Y LOW_16bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA8_8 S S S Y X Y X Y LOW_8bpp ));
|
||||
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA16_128 o o o o S S S S LOW_128bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA16_64 o o o o S S S S LOW_64bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA16_32 o o o o S S S S LOW_32bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA16_16 o o o o S S S S LOW_16bpp ));
|
||||
SWIZZLE(( INTEL_TILEYF_MSAA16_8 o o o o S S S S LOW_8bpp ));
|
||||
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA16_128 S S S S X Y X Y LOW_128bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA16_64 S S S S X Y X Y LOW_64bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA16_32 S S S S X Y X Y LOW_32bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA16_16 S S S S X Y X Y LOW_16bpp ));
|
||||
SWIZZLE(( INTEL_TILEYS_MSAA16_8 S S S S X Y X Y LOW_8bpp ));
|
||||
|
||||
#define LOW_3D Z Z Y Y X X X X
|
||||
|
||||
SWIZZLE(( INTEL_TILEYF_3D_128 o o o o Y Z X X LOW_3D ));
|
||||
SWIZZLE(( INTEL_TILEYF_3D_64 o o o o Y Z X X LOW_3D ));
|
||||
SWIZZLE(( INTEL_TILEYF_3D_32 o o o o Y Z X Y LOW_3D ));
|
||||
SWIZZLE(( INTEL_TILEYF_3D_16 o o o o Y Z Y Z LOW_3D ));
|
||||
SWIZZLE(( INTEL_TILEYF_3D_8 o o o o Y Z Y Z LOW_3D ));
|
||||
|
||||
SWIZZLE(( INTEL_TILEYS_3D_128 X Y Z X Y Z X X LOW_3D ));
|
||||
SWIZZLE(( INTEL_TILEYS_3D_64 X Y Z X Y Z X X LOW_3D ));
|
||||
SWIZZLE(( INTEL_TILEYS_3D_32 X Y Z X Y Z X Y LOW_3D ));
|
||||
SWIZZLE(( INTEL_TILEYS_3D_16 X Y Z X Y Z Y Z LOW_3D ));
|
||||
SWIZZLE(( INTEL_TILEYS_3D_8 X Y Z X Y Z Y Z LOW_3D ));
|
||||
|
||||
#ifdef INTEL_TILE_W_SUPPORT
|
||||
SWIZZLE(( INTEL_TILE_W o o o o X X X Y Y Y Y X Y X Y X ));
|
||||
#endif
|
||||
// Gen9 Swizzles...
|
||||
SWIZZLE(( INTEL_TILE_YF_128 o o o o X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_64 o o o o X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_32 o o o o X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_16 o o o o X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_8 o o o o X Y X Y Y Y Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YS_128 X Y X Y X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_64 X Y X Y X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_32 X Y X Y X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_16 X Y X Y X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_8 X Y X Y X Y X Y Y Y Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA2_128 o o o o S Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA2_64 o o o o S Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA2_32 o o o o S Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA2_16 o o o o S Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA2_8 o o o o S Y X Y Y Y Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA2_128 S Y X Y X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA2_64 S Y X Y X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA2_32 S Y X Y X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA2_16 S Y X Y X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA2_8 S Y X Y X Y X Y Y Y Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA4_128 o o o o S S X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA4_64 o o o o S S X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA4_32 o o o o S S X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA4_16 o o o o S S X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA4_8 o o o o S S X Y Y Y Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA4_128 S S X Y X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA4_64 S S X Y X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA4_32 S S X Y X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA4_16 S S X Y X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA4_8 S S X Y X Y X Y Y Y Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA8_128 o o o o S S S Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA8_64 o o o o S S S Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA8_32 o o o o S S S Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA8_16 o o o o S S S Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA8_8 o o o o S S S Y Y Y Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA8_128 S S S Y X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA8_64 S S S Y X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA8_32 S S S Y X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA8_16 S S S Y X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA8_8 S S S Y X Y X Y Y Y Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA16_128 o o o o S S S S X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA16_64 o o o o S S S S X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA16_32 o o o o S S S S X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA16_16 o o o o S S S S X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_MSAA16_8 o o o o S S S S Y Y Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA16_128 S S S S X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA16_64 S S S S X Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA16_32 S S S S X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA16_16 S S S S X Y X Y X Y Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_MSAA16_8 S S S S X Y X Y Y Y Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YF_3D_128 o o o o Y Z X X Z Z Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_3D_64 o o o o Y Z X X Z Z Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_3D_32 o o o o Y Z X Y Z Z Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_3D_16 o o o o Y Z Y Z Z Z Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YF_3D_8 o o o o Y Z Y Z Z Z Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_YS_3D_128 X Y Z X Y Z X X Z Z Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_3D_64 X Y Z X Y Z X X Z Z Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_3D_32 X Y Z X Y Z X Y Z Z Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_3D_16 X Y Z X Y Z Y Z Z Z Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_YS_3D_8 X Y Z X Y Z Y Z Z Z Y Y X X X X ));
|
||||
|
||||
// XE_HP_SDV Swizzles...
|
||||
SWIZZLE(( INTEL_TILE_4 o o o o Y Y X Y X X Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_64_128 Y X X X Y Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_64 Y X X X Y Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_32 Y Y X X Y Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_16 Y Y X X Y Y X Y X X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_8 Y Y Y X Y Y X Y X X Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_64_MSAA2_128 Y X X X Y Y X Y S X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_MSAA2_64 Y X X X Y Y X Y S X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_MSAA2_32 Y Y X X Y Y X Y S X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_MSAA2_16 Y Y X X Y Y X Y S X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_MSAA2_8 Y Y Y X Y Y X Y S X Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_64_MSAA_128 Y X X X Y Y X S S X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_MSAA_64 Y X X X Y Y X S S X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_MSAA_32 Y Y X X Y Y X S S X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_MSAA_16 Y Y X X Y Y X S S X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_MSAA_8 Y Y Y X Y Y X S S X Y Y X X X X ));
|
||||
|
||||
SWIZZLE(( INTEL_TILE_64_3D_128 Z Z Y X X X Z Y Z X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_3D_64 Z Z Y X X X Z Y Z X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_3D_32 Z Z Y X Y X Z Y Z X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_3D_16 Z Z Z Y Y X Z Y Z X Y Y X X X X ));
|
||||
SWIZZLE(( INTEL_TILE_64_3D_8 Z Z Z X Y Y Z Y Z X Y Y X X X X ));
|
||||
|
||||
#undef LOW_3D
|
||||
#undef LOW_128bpp
|
||||
#undef LOW_64bpp
|
||||
#undef LOW_32bpp
|
||||
#undef LOW_16bpp
|
||||
#undef LOW_8bpp
|
||||
#undef X
|
||||
#undef Y
|
||||
#undef Z
|
||||
|
@ -253,7 +265,6 @@ spatial locality for 3D or MSAA sample neighbors can be controlled, also. */
|
|||
#undef __SWIZZLE
|
||||
#undef SWIZZLE
|
||||
|
||||
|
||||
// Accessing Swizzled Surface ##################################################
|
||||
|
||||
/* While graphics hardware prefers to access surfaces stored in tiled/swizzled
|
||||
|
@ -521,6 +532,7 @@ void CpuSwizzleBlt( // #########################################################
|
|||
((pSwizzledSurface->OffsetY + CopyHeight) <= pSwizzledSurface->Height)
|
||||
) ||
|
||||
#endif
|
||||
|
||||
((pDest->OffsetX + CopyWidthBytes) <= pDest->Pitch) &&
|
||||
((pDest->OffsetY + CopyHeight) <= pDest->Height) &&
|
||||
((pSrc->OffsetX + CopyWidthBytes) <= pSrc->Pitch) &&
|
||||
|
@ -1091,4 +1103,4 @@ void CpuSwizzleBlt( // #########################################################
|
|||
} // CpuSwizzleBlt
|
||||
|
||||
#endif // #ifndef INCLUDE_CpuSwizzleBlt_c_AS_HEADER
|
||||
// clang-format on
|
||||
// clang-format on
|
||||
|
|
|
@ -68,6 +68,7 @@ GmmLib::PlatformInfo *GmmLib::PlatformInfo::Create(PLATFORM Platform, bool Overr
|
|||
{
|
||||
case IGFX_GEN12LP_CORE:
|
||||
case IGFX_GEN12_CORE:
|
||||
case IGFX_XE_HP_CORE:
|
||||
return new GmmLib::PlatformInfoGen12(Platform);
|
||||
break;
|
||||
case IGFX_GEN11_CORE:
|
||||
|
@ -107,6 +108,7 @@ GmmLib::GmmCachePolicyCommon *GmmLib::GmmCachePolicyCommon::Create()
|
|||
{
|
||||
case IGFX_GEN12LP_CORE:
|
||||
case IGFX_GEN12_CORE:
|
||||
case IGFX_XE_HP_CORE:
|
||||
if(pGmmGlobalContext->GetSkuTable().FtrLocalMemory)
|
||||
{
|
||||
pGmmCachePolicy = new GmmLib::GmmGen12dGPUCachePolicy(CachePolicy);
|
||||
|
@ -177,6 +179,7 @@ GmmLib::GmmTextureCalc *GmmLib::GmmTextureCalc::Create(PLATFORM Platform, uint8_
|
|||
break;
|
||||
case IGFX_GEN12LP_CORE:
|
||||
case IGFX_GEN12_CORE:
|
||||
case IGFX_XE_HP_CORE:
|
||||
default:
|
||||
return new GmmGen12TextureCalc();
|
||||
break;
|
||||
|
|
|
@ -566,7 +566,7 @@ namespace GmmLib
|
|||
// Validate Block Dimensions...
|
||||
if(!(
|
||||
#define GMM_FORMAT_INCLUDE_ASTC_FORMATS_ONLY
|
||||
#define GMM_FORMAT(Name, bpe, Width, Height, Depth, IsRT, IsASTC, RcsSurfaceFormat, AuxL1eFormat, Availability) \
|
||||
#define GMM_FORMAT(Name, bpe, Width, Height, Depth, IsRT, IsASTC, RcsSurfaceFormat, SSCompressionFmt, Availability) \
|
||||
((BlockWidth == (Width)) && (BlockHeight == (Height)) && (BlockDepth == (Depth))) ||
|
||||
#include "External/Common/GmmFormatTable.h"
|
||||
0)) // <-- 0 benignly terminates the chain of OR expressions.
|
||||
|
|
|
@ -94,7 +94,9 @@ typedef struct GMM_CACHE_POLICY_TBL_ELEMENT_REC {
|
|||
uint16_t ESC : 1; // Enable Skip Caching (ESC) for L3.
|
||||
uint16_t SCC : 3; // Skip Caching Control (SCC) for L3.
|
||||
uint16_t Cacheability : 2; // L3 Cacheability Control (L3CC).
|
||||
uint16_t Reserved : 10;
|
||||
uint16_t GlobalGo : 1; // Global Go (GLBGO).
|
||||
uint16_t UCLookup : 1; // UC L3 Lookup (UcL3Lookup).
|
||||
uint16_t Reserved : 8;
|
||||
} ;
|
||||
uint16_t UshortValue;
|
||||
} L3;
|
||||
|
@ -209,6 +211,9 @@ typedef union GMM_PRIVATE_PAT_REC {
|
|||
if (!REGISTRY_OVERRIDE_READ(Usage,CoS)) CoS = -1; \
|
||||
if (!REGISTRY_OVERRIDE_READ(Usage,HDCL1)) HDCL1 = -1; \
|
||||
if (!REGISTRY_OVERRIDE_READ(Usage,L3Eviction)) L3Eviction = -1; \
|
||||
if (!REGISTRY_OVERRIDE_READ(Usage,GlbGo)) GlbGo = -1; \
|
||||
if (!REGISTRY_OVERRIDE_READ(Usage,UcLookup)) UcLookup = -1; \
|
||||
|
||||
|
||||
|
||||
#define SETOVERRIDES(Usage) \
|
||||
|
@ -264,6 +269,14 @@ typedef union GMM_PRIVATE_PAT_REC {
|
|||
{ \
|
||||
pCachePolicy[Usage].L3Eviction = L3Eviction; \
|
||||
} \
|
||||
if (GlbGo != -1) \
|
||||
{ \
|
||||
pCachePolicy[Usage].GlbGo = GlbGo; \
|
||||
} \
|
||||
if (UcLookup != -1) \
|
||||
{ \
|
||||
pCachePolicy[Usage].UcLookup = UcLookup; \
|
||||
} \
|
||||
{ \
|
||||
pCachePolicy[Usage].IsOverridenByRegkey = 1; \
|
||||
}
|
||||
|
@ -296,6 +309,9 @@ typedef union GMM_PRIVATE_PAT_REC {
|
|||
REGISTRY_OVERRIDE_WRITE(Usage,HDCL1, pCachePolicy[Usage].HDCL1); \
|
||||
REGISTRY_OVERRIDE_WRITE(Usage,L3Eviction, pCachePolicy[Usage].L3Eviction); \
|
||||
REGISTRY_OVERRIDE_WRITE(Usage,Enable,0); \
|
||||
REGISTRY_OVERRIDE_WRITE(Usage,GlbGo, pCachePolicy[Usage].GlbGo); \
|
||||
REGISTRY_OVERRIDE_WRITE(Usage,UcLookup, pCachePolicy[Usage].UcLookup); \
|
||||
|
||||
} \
|
||||
else if (GenerateKeys == UNCACHED || GenerateKeys == CURRENT) \
|
||||
{ \
|
||||
|
@ -317,6 +333,8 @@ typedef union GMM_PRIVATE_PAT_REC {
|
|||
REGISTRY_OVERRIDE_WRITE(Usage,HDCL1, HDCL1); \
|
||||
REGISTRY_OVERRIDE_WRITE(Usage,L3Eviction, L3Eviction); \
|
||||
REGISTRY_OVERRIDE_WRITE(Usage,Enable,Enable); \
|
||||
REGISTRY_OVERRIDE_WRITE(Usage,GlbGo, GlbGo); \
|
||||
REGISTRY_OVERRIDE_WRITE(Usage,UcLookup, UcLookup); \
|
||||
} \
|
||||
\
|
||||
if (Enable) \
|
||||
|
|
|
@ -110,7 +110,7 @@ typedef union MEMORY_OBJECT_CONTROL_STATE_REC
|
|||
uint32_t EncryptedData : 1;
|
||||
uint32_t Index : 6 ;
|
||||
uint32_t : 25;
|
||||
}Gen9, Gen10, Gen11,Gen12;
|
||||
}Gen9, Gen10, Gen11,Gen12, XE_HP;
|
||||
|
||||
uint32_t DwordValue;
|
||||
}MEMORY_OBJECT_CONTROL_STATE;
|
||||
|
@ -133,4 +133,4 @@ typedef GmmLib::GmmCachePolicyCommon GMM_CACHE_POLICY;
|
|||
#else
|
||||
struct GmmCachePolicyCommon;
|
||||
typedef struct GmmCachePolicyCommon GMM_CACHE_POLICY;
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -172,6 +172,16 @@ else \
|
|||
ClientType = GMM_UNDEFINED_CLIENT; \
|
||||
} \
|
||||
|
||||
#define GET_RES_CLIENT_TYPE(pResourceInfo, ClientType) \
|
||||
if(pResourceInfo) \
|
||||
{ \
|
||||
ClientType = (pResourceInfo)->GetClientType(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
ClientType = GMM_UNDEFINED_CLIENT; \
|
||||
} \
|
||||
|
||||
//===========================================================================
|
||||
// typedef:
|
||||
// GMM_TEXTURE_LAYOUT
|
||||
|
@ -197,7 +207,9 @@ typedef enum GMM_TILE_TYPE_ENUM
|
|||
GMM_TILED_X,
|
||||
GMM_TILED_Y,
|
||||
GMM_TILED_W,
|
||||
GMM_NOT_TILED
|
||||
GMM_NOT_TILED,
|
||||
GMM_TILED_4,
|
||||
GMM_TILED_64
|
||||
}GMM_TILE_TYPE;
|
||||
|
||||
//===========================================================================
|
||||
|
@ -402,7 +414,7 @@ typedef enum GMM_RESOURCE_FORMAT_ENUM
|
|||
{
|
||||
GMM_FORMAT_INVALID = 0, // <-- This stays zero! (For boolean and valid range checks.)
|
||||
|
||||
#define GMM_FORMAT(Name, bpe, Width, Height, Depth, IsRT, IsASTC, RcsSurfaceFormat, AuxL1eFormat, Availability) \
|
||||
#define GMM_FORMAT(Name, bpe, Width, Height, Depth, IsRT, IsASTC, RcsSurfaceFormat, SSCompressionFmt, Availability) \
|
||||
GMM_FORMAT_##Name, \
|
||||
GMM_FORMAT_##Name##_TYPE = GMM_FORMAT_##Name, // TODO(Minor): Remove _TYPE suffix from every GMM_FORMAT_ reference throughout driver and delete this aliasing. (And remove the \ from the line above.)
|
||||
#include "GmmFormatTable.h"
|
||||
|
@ -429,7 +441,7 @@ typedef enum GMM_SURFACESTATE_FORMAT_ENUM
|
|||
GMM_SURFACESTATE_FORMAT_INVALID = -1, // Can't use zero since that's an actual enum value.
|
||||
|
||||
#define GMM_FORMAT_INCLUDE_SURFACESTATE_FORMATS_ONLY
|
||||
#define GMM_FORMAT(Name, bpe, Width, Height, Depth, IsRT, IsASTC, RcsSurfaceFormat, AuxL1eFormat, Availability) \
|
||||
#define GMM_FORMAT(Name, bpe, Width, Height, Depth, IsRT, IsASTC, RcsSurfaceFormat, SSCompressionFmt, Availability) \
|
||||
GMM_SURFACESTATE_FORMAT_##Name = RcsSurfaceFormat,
|
||||
#include "GmmFormatTable.h"
|
||||
} GMM_SURFACESTATE_FORMAT;
|
||||
|
@ -513,7 +525,9 @@ typedef enum GMM_TILE_WALK_REC
|
|||
GMM_HW_TILED_W_WALK = 2,
|
||||
GMM_HW_TILED_YF_WALK = 3,
|
||||
GMM_HW_TILED_YS_WALK = 4,
|
||||
GMM_HW_NOT_TILED = 5
|
||||
GMM_HW_TILED_4_WALK = 5,
|
||||
GMM_HW_TILED_64_WALK = 6,
|
||||
GMM_HW_NOT_TILED = 7
|
||||
} GMM_TILE_WALK;
|
||||
|
||||
//===========================================================================
|
||||
|
|
|
@ -47,13 +47,16 @@ OTHER DEALINGS IN THE SOFTWARE.
|
|||
#define WA GMM_FORMAT_WA
|
||||
#define x 0
|
||||
#define NC GMM_COMPR_FORMAT_INVALID
|
||||
#define MC(n) n | (0x1 << 5) //GMM_FLATCCS_MIN_MC_FORMAT - 1
|
||||
|
||||
#define FC(ver, bpc, fmtstr, bpcstr, typestr) \
|
||||
(ver == 1 || SKU(FtrE2ECompression)) ? \
|
||||
(ver == 1 || (SKU(FtrE2ECompression) && !(SKU(FtrFlatPhysCCS)))) ?\
|
||||
((bpc == 16) ? GMM_E2ECOMP_FORMAT_RGBAFLOAT16 : \
|
||||
(bpc == 32) ? GMM_E2ECOMP_FORMAT_R32G32B32A32_FLOAT : \
|
||||
(bpc == 8) ? GMM_E2ECOMP_FORMAT_ARGB8b : \
|
||||
(bpc == x) ? GMM_E2ECOMP_FORMAT_##fmtstr : NC) :NC
|
||||
(bpc == x) ? GMM_E2ECOMP_FORMAT_##fmtstr : NC) : \
|
||||
(ver == 2 || (SKU(FtrFlatPhysCCS))) ?\
|
||||
(GMM_FLATCCS_FORMAT_##fmtstr##bpcstr##typestr) : NC
|
||||
|
||||
/****************************************************************************\
|
||||
GMM FORMAT TABLE
|
||||
|
|
|
@ -115,6 +115,15 @@ typedef enum GMM_TILE_MODE_ENUM
|
|||
DEFINE_TILE_BPEs( YS_2D_8X ),
|
||||
DEFINE_TILE_BPEs( YS_2D_16X ),
|
||||
DEFINE_TILE_BPEs( YS_3D ),
|
||||
|
||||
// XE-HP
|
||||
TILE4,
|
||||
DEFINE_TILE_BPEs( _64_1D ),
|
||||
DEFINE_TILE_BPEs( _64_2D ),
|
||||
DEFINE_TILE_BPEs( _64_2D_2X),
|
||||
DEFINE_TILE_BPEs( _64_2D_4X),
|
||||
DEFINE_TILE_BPEs( _64_3D),
|
||||
|
||||
GMM_TILE_MODES
|
||||
}GMM_TILE_MODE;
|
||||
|
||||
|
|
|
@ -133,6 +133,8 @@ typedef struct GMM_RESOURCE_FLAG_REC
|
|||
uint32_t XAdapter : 1; // For WinBlue: to support Hybrid graphics
|
||||
uint32_t __PreallocatedResInfo : 1; // Internal GMM flag--Clients don't set.
|
||||
uint32_t __PreWddm2SVM : 1; // Internal GMM flag--Clients don't set.
|
||||
uint32_t Tile4 : 1; // XE-HP 4KB tile
|
||||
uint32_t Tile64 : 1; // XE-HP 64KB tile
|
||||
} Info;
|
||||
|
||||
// Wa: Any Surface specific Work Around will go in here
|
||||
|
|
|
@ -77,6 +77,7 @@ namespace GmmLib
|
|||
#else
|
||||
GmmClientContext *pClientContext; ///< ClientContext of the client creating this Resource
|
||||
#endif
|
||||
GMM_MULTI_TILE_ARCH MultiTileArch;
|
||||
|
||||
private:
|
||||
GMM_STATUS ApplyExistingSysMemRestrictions();
|
||||
|
@ -108,6 +109,16 @@ namespace GmmLib
|
|||
|
||||
__GMM_ASSERT((TiledMode != 3) || (pTextureInfo->Flags.Info.TiledY || pTextureInfo->Flags.Info.TiledYf || pTextureInfo->Flags.Info.TiledYs));
|
||||
}
|
||||
else
|
||||
{
|
||||
TiledMode =
|
||||
(GMM_IS_4KB_TILE(pTextureInfo->Flags)) ? 3 :
|
||||
(GMM_IS_64KB_TILE(pTextureInfo->Flags)) ? 1 :
|
||||
pTextureInfo->Flags.Info.TiledX ? 2 :
|
||||
/* Linear */ 0;
|
||||
|
||||
__GMM_ASSERT(TiledMode || pTextureInfo->Flags.Info.Linear);
|
||||
}
|
||||
|
||||
return TiledMode;
|
||||
}
|
||||
|
@ -125,7 +136,8 @@ namespace GmmLib
|
|||
SvmAddress(),
|
||||
pGmmLibContext(),
|
||||
pPrivateData(),
|
||||
pClientContext()
|
||||
pClientContext(),
|
||||
MultiTileArch()
|
||||
{
|
||||
#if (!defined(__GMM_KMD__) && !defined(GMM_UNIFIED_LIB))
|
||||
// For clients, who derive classes from GMM class and call their derived class constructors
|
||||
|
@ -149,7 +161,8 @@ namespace GmmLib
|
|||
SvmAddress(),
|
||||
pGmmLibContext(),
|
||||
pPrivateData(),
|
||||
pClientContext()
|
||||
pClientContext(),
|
||||
MultiTileArch()
|
||||
{
|
||||
pClientContext = pClientContextIn;
|
||||
}
|
||||
|
@ -166,6 +179,7 @@ namespace GmmLib
|
|||
SvmAddress = rhs.SvmAddress;
|
||||
pPrivateData = rhs.pPrivateData;
|
||||
pGmmLibContext = rhs.pGmmLibContext;
|
||||
MultiTileArch = rhs.MultiTileArch;
|
||||
|
||||
return *this;
|
||||
}
|
||||
|
@ -584,6 +598,14 @@ namespace GmmLib
|
|||
{
|
||||
return GMM_TILED_Y;
|
||||
}
|
||||
else if (Surf.Flags.Info.Tile4)
|
||||
{
|
||||
return GMM_TILED_4;
|
||||
}
|
||||
else if (Surf.Flags.Info.Tile64)
|
||||
{
|
||||
return GMM_TILED_64;
|
||||
}
|
||||
|
||||
return GMM_NOT_TILED;
|
||||
}
|
||||
|
@ -736,7 +758,8 @@ namespace GmmLib
|
|||
__GMM_ASSERT(ArrayIndex < Surf.ArraySize);
|
||||
__GMM_ASSERT(GMM_IS_PLANAR(Surf.Format));
|
||||
|
||||
if (Surf.Flags.Gpu.UnifiedAuxSurface)
|
||||
if (Surf.Flags.Gpu.UnifiedAuxSurface &&
|
||||
!((GmmClientContext*)pClientContext)->GetSkuTable().FtrFlatPhysCCS)
|
||||
{
|
||||
if (GmmAuxType == GMM_AUX_Y_CCS)
|
||||
{
|
||||
|
@ -976,6 +999,7 @@ namespace GmmLib
|
|||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
GMM_INLINE_VIRTUAL GMM_INLINE_EXPORTED GMM_GFX_SIZE_T GMM_STDCALL GetSizeSurface()
|
||||
{
|
||||
GMM_OVERRIDE_SIZE_64KB_ALLOC;
|
||||
return (Surf.Size + AuxSurf.Size + AuxSecSurf.Size);
|
||||
}
|
||||
|
||||
|
@ -1076,6 +1100,13 @@ namespace GmmLib
|
|||
Offset = 0;
|
||||
}
|
||||
|
||||
if(((GmmClientContext*)pClientContext)->GetSkuTable().FtrFlatPhysCCS && !Surf.Flags.Gpu.ProceduralTexture &&
|
||||
(GmmAuxType == GMM_AUX_CCS || GmmAuxType == GMM_AUX_ZCS ||
|
||||
GmmAuxType == GMM_AUX_Y_CCS || GmmAuxType == GMM_AUX_UV_CCS))
|
||||
{
|
||||
Offset = 0;
|
||||
}
|
||||
|
||||
return Offset;
|
||||
}
|
||||
|
||||
|
@ -1092,6 +1123,11 @@ namespace GmmLib
|
|||
}
|
||||
else if (GmmAuxType == GMM_AUX_CCS || GmmAuxType == GMM_AUX_HIZ || GmmAuxType == GMM_AUX_MCS)
|
||||
{
|
||||
if(GmmAuxType == GMM_AUX_CCS &&
|
||||
((GmmClientContext*)pClientContext)->GetSkuTable().FtrFlatPhysCCS && !Surf.Flags.Gpu.ProceduralTexture)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
if (GmmAuxType == GMM_AUX_CCS && AuxSecSurf.Type != RESOURCE_INVALID &&
|
||||
(Surf.Flags.Gpu.CCS && (Surf.MSAA.NumSamples > 1 ||
|
||||
Surf.Flags.Gpu.Depth)))
|
||||
|
@ -1325,6 +1361,24 @@ namespace GmmLib
|
|||
default: HAlign = 1; // TODO(Benign): Change back to 0 + assert after packed YUV handling corrected.
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
uint32_t Align = GetHAlign() * (GetBitsPerPixel() >> 3);
|
||||
|
||||
if (Surf.BitsPerPixel == 24 || Surf.BitsPerPixel == 48 || Surf.BitsPerPixel == 96)
|
||||
{
|
||||
Align = GetHAlign();
|
||||
}
|
||||
|
||||
switch (Align)
|
||||
{
|
||||
case 16: HAlign = 0; break;
|
||||
case 32: HAlign = 1; break;
|
||||
case 64: HAlign = 2; break;
|
||||
case 128: HAlign = 3; break;
|
||||
default: HAlign = 0; __GMM_ASSERT(0);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
|
@ -1637,6 +1691,73 @@ namespace GmmLib
|
|||
GMM_VIRTUAL GMM_STATUS GMM_STDCALL CreateCustomRes(Context& GmmLibContext, GMM_RESCREATE_CUSTOM_PARAMS& CreateParams);
|
||||
protected:
|
||||
GMM_VIRTUAL void UpdateUnAlignedParams();
|
||||
public:
|
||||
|
||||
GMM_INLINE_VIRTUAL GMM_INLINE_EXPORTED const GMM_MULTI_TILE_ARCH& GetMultiTileArch()
|
||||
{
|
||||
return MultiTileArch;
|
||||
}
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
/// Returns the Flat Phys CCS Size for the resource
|
||||
/// @return CCS size in bytes
|
||||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
GMM_INLINE_VIRTUAL GMM_INLINE_EXPORTED GMM_GFX_SIZE_T GMM_STDCALL GetFlatPhysCcsSize()
|
||||
{
|
||||
if((((GmmClientContext*)pClientContext)->GetSkuTable().FtrFlatPhysCCS) &&
|
||||
!(Surf.Flags.Info.AllowVirtualPadding ||
|
||||
Surf.Flags.Info.ExistingSysMem ||
|
||||
Surf.Flags.Info.NonLocalOnly))
|
||||
{
|
||||
return GFX_CEIL_DIV(Surf.Size, 256);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
/// Returns Tiled mode for DEPTH_BUFFER_STATE/STENCIL_BUFFER_STATE/ HIER_DEPTH_BUFFER programming.
|
||||
/// HIZ is always 4kb tiling, XeHP+ TileMode for HIZ is Tile4 and main surface can be
|
||||
/// Tile64 , GMM_AUX_INVALID, will return data for main depth/stencil resource ,
|
||||
/// GMM_AUX_HiZ returns data for HIZ resource
|
||||
/// @return Tiled Resource Mode(PreGen12) / Tiled Mode(Gen12+)
|
||||
/////////////////////////////////////////////////////////////////////////////////////
|
||||
GMM_INLINE_VIRTUAL GMM_INLINE_EXPORTED uint32_t GMM_STDCALL GetTiledModeDepthStencilState( GMM_UNIFIED_AUX_TYPE AuxType = GMM_AUX_INVALID)
|
||||
{
|
||||
uint32_t TiledMode = 0;
|
||||
|
||||
if(GMM_IS_TILEY)
|
||||
{
|
||||
TiledMode =
|
||||
Surf.Flags.Info.TiledYf ? 1 :
|
||||
Surf.Flags.Info.TiledYs ? 2 :
|
||||
/*TILE_NONE*/ 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
//1 and 3 are only valid value , 0 and 2 are reserved for XeHP+
|
||||
if( (AuxType == GMM_AUX_HIZ) && AuxSurf.Flags.Gpu.HiZ )
|
||||
{
|
||||
TiledMode =
|
||||
AuxSurf.Flags.Info.Tile4 ? 3 :
|
||||
AuxSurf.Flags.Info.Tile64 ? 1 :
|
||||
/* Default */ 0;
|
||||
|
||||
__GMM_ASSERT(TiledMode == 3);
|
||||
}
|
||||
else
|
||||
{
|
||||
TiledMode =
|
||||
Surf.Flags.Info.Tile4 ? 3 :
|
||||
Surf.Flags.Info.Tile64 ? 1 :
|
||||
/* Default */ 0;
|
||||
|
||||
__GMM_ASSERT( TiledMode );
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return TiledMode;
|
||||
}
|
||||
|
||||
};
|
||||
|
||||
|
|
|
@ -220,6 +220,49 @@ typedef struct GMM_S3D_INFO_REC
|
|||
uint8_t IsRFrame; // Flag indicating this is the R frame
|
||||
} GMM_S3D_INFO;
|
||||
|
||||
//===========================================================================
|
||||
// typedef:
|
||||
// GMM_MULTI_TILE_ARCH
|
||||
//
|
||||
// Description:
|
||||
// This structure is provides an advanced allocation interface for 4xXeHP
|
||||
// multi tile Gpu support
|
||||
//---------------------------------------------------------------------------
|
||||
typedef struct GMM_MULTI_TILE_ARCH_REC // FtrMultiTileArch Advanced Parameters...
|
||||
{
|
||||
|
||||
uint8_t Enable : 1; // When FALSE, this struct is ignored
|
||||
// and GMM will make such decisions
|
||||
// based on the process's default
|
||||
// tile assignment from KMD.
|
||||
|
||||
uint8_t TileInstanced : 1; // When TRUE allocation is Tile
|
||||
// instanced resource
|
||||
|
||||
uint8_t GpuVaMappingSet; // Bitmask indicating which tiles
|
||||
// should receive page table updates
|
||||
// when this allocation is mapped.
|
||||
// For all tiles set ADAPTER_INFO.MultiTileArch.TileMask
|
||||
|
||||
uint8_t LocalMemEligibilitySet; // Bitmask indicating which tile's
|
||||
// Local Memory this allocation
|
||||
// can reside in--i.e. in addition to
|
||||
// its preferred set, which others
|
||||
// can it be migrated to under memory
|
||||
// pressure. Entirely zeroed mask
|
||||
// would be used for NonLocalOnly
|
||||
// allocations.
|
||||
|
||||
uint8_t LocalMemPreferredSet; // Bitmask indicating subset of above
|
||||
// eligibility set that is preferred
|
||||
// above the others. Entirely zeroed
|
||||
// mask is equivalent to mask of all
|
||||
// ones--i.e. "no preference within
|
||||
// eligibility set".
|
||||
|
||||
uint32_t Reserved;
|
||||
|
||||
} GMM_MULTI_TILE_ARCH;
|
||||
//===========================================================================
|
||||
// typedef:
|
||||
// GMM_RESCREATE_PARAMS
|
||||
|
@ -285,6 +328,7 @@ typedef struct GMM_RESCREATE_PARAMS_REC
|
|||
uint32_t MaximumRenamingListLength;
|
||||
uint8_t NoGfxMemory;
|
||||
GMM_RESOURCE_INFO *pPreallocatedResInfo;
|
||||
GMM_MULTI_TILE_ARCH MultiTileArch;
|
||||
|
||||
} GMM_RESCREATE_PARAMS;
|
||||
|
||||
|
@ -362,6 +406,7 @@ typedef struct GMM_RESCREATE_CUSTOM_PARAMS__REC
|
|||
// C. GmmResGetAuxSurfaceOffset(pRes, GMM_AUX_CCS or GMM_AUX_ZCS)
|
||||
typedef enum
|
||||
{
|
||||
GMM_AUX_INVALID, // Main resource
|
||||
GMM_AUX_CCS, // RT buffer's color control surface (Unpadded)
|
||||
GMM_AUX_Y_CCS, // color control surface for Y-plane
|
||||
GMM_AUX_UV_CCS, // color control surface for UV-plane
|
||||
|
|
|
@ -210,14 +210,16 @@ GMM_STATUS GmmTexGetMipMapOffset(GMM_TEXTURE_INFO* pTexInfo, GMM_REQ_OFFSET_INFO
|
|||
(TileInfo).MaxPitch = 0; \
|
||||
}
|
||||
|
||||
#define GMM_IS_4KB_TILE(Flags) ((Flags).Info.TiledY)
|
||||
#define GMM_IS_64KB_TILE(Flags) (Flags.Info.TiledYs)
|
||||
#define GMM_IS_4KB_TILE(Flags) ((Flags).Info.TiledY || (Flags).Info.Tile4)
|
||||
#define GMM_IS_64KB_TILE(Flags) (Flags.Info.TiledYs || Flags.Info.Tile64)
|
||||
#define GMM_IS_SUPPORTED_BPP_ON_TILE_64_YF_YS(bpp) ((bpp == 8) || (bpp == 16) || (bpp == 32) || (bpp == 64) || (bpp == 128))
|
||||
|
||||
#define GMM_SET_4KB_TILE(Flags, Value) ((Flags).Info.TiledY = (Value))
|
||||
#define GMM_SET_64KB_TILE(Flags, Value) ((Flags).Info.TiledYs = (Value))
|
||||
#define GMM_SET_4KB_TILE_MODE(TileMode) (TileMode = LEGACY_TILE_Y)
|
||||
#define GMM_SET_4KB_TILE(Flags, Value) if (pGmmGlobalContext->GetSkuTable().FtrTileY) ((Flags).Info.TiledY = (Value)); else ((Flags).Info.Tile4 = (Value))
|
||||
#define GMM_SET_64KB_TILE(Flags, Value) if (pGmmGlobalContext->GetSkuTable().FtrTileY) ((Flags).Info.TiledYs = (Value)); else ((Flags).Info.Tile64 = (Value))
|
||||
#define GMM_SET_4KB_TILE_MODE(TileMode) if (pGmmGlobalContext->GetSkuTable().FtrTileY) (TileMode = LEGACY_TILE_Y); else (TileMode = TILE4)
|
||||
#define GMM_IS_TILEY (pClientContext->GetSkuTable().FtrTileY)
|
||||
|
||||
|
||||
// Reset packing alignment to project default
|
||||
#pragma pack(pop)
|
||||
|
||||
|
|
|
@ -98,4 +98,11 @@ OTHER DEALINGS IN THE SOFTWARE.
|
|||
(GmmGetGttContext(pGmmGlobalContext)->GfxAddrRange.PP.Base + \
|
||||
GmmGetGttContext(pGmmGlobalContext)->GfxAddrRange.PP.Size)))
|
||||
|
||||
#define GMM_INLINE __inline
|
||||
#define GMM_INLINE __inline
|
||||
|
||||
#if(defined(__GMM_KMD__))
|
||||
#define GMM_OVERRIDE_SIZE_64KB_ALLOC if(GmmGetSkuTable(pGmmGlobalContext)->FtrPpgtt64KBWalkOptimization){ return (this->GetSizeAllocation());}
|
||||
#else
|
||||
#define GMM_OVERRIDE_SIZE_64KB_ALLOC if(((GmmClientContext*)pClientContext)->GetSkuTable().FtrPpgtt64KBWalkOptimization){ return (this->GetSizeAllocation());}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -45,14 +45,18 @@ typedef enum _FC_TileType
|
|||
FC_TILE_Y,
|
||||
FC_TILE_YF,
|
||||
FC_TILE_YS,
|
||||
FC_TILE_4,
|
||||
FC_TILE_64,
|
||||
//max equals last supported plus one
|
||||
FC_TILE_MAX
|
||||
} FC_TILE_TYPE;
|
||||
|
||||
#define FCTilingType(x) (((x) == LEGACY_TILE_Y) ? (FC_TILE_Y) : \
|
||||
(((x) == TILE4) ? (FC_TILE_4) : \
|
||||
(((x) >= TILE_YF_2D_8bpe && (x) <= TILE_YF_2D_128bpe) ? (FC_TILE_YF) : \
|
||||
(((x) >= TILE_YS_2D_8bpe && (x) <= TILE_YS_2D_128bpe) ? (FC_TILE_YS) : \
|
||||
(FC_TILE_MAX))))
|
||||
(((x) >= TILE__64_2D_8bpe && (x) <= TILE__64_2D_128bpe) ? (FC_TILE_64) : \
|
||||
(FC_TILE_MAX))))))
|
||||
#define FCMaxBppModes 5
|
||||
#define FCMaxModes FC_TILE_MAX * FCMaxBppModes
|
||||
#define FCBppMode(bpp) __GmmLog2(bpp) - 3
|
||||
|
@ -73,6 +77,81 @@ typedef struct GMM_TEXTURE_ALIGN_EX_REC
|
|||
CCS_UNIT CCSEx[CCS_MODES];
|
||||
}GMM_TEXTURE_ALIGN_EX;
|
||||
|
||||
typedef enum GMM_FLATCCS_FORMAT_ENUM
|
||||
{
|
||||
GMM_FLATCCS_FORMAT_R16S = 0,
|
||||
GMM_FLATCCS_FORMAT_R16U = GMM_FLATCCS_FORMAT_R16S,
|
||||
GMM_FLATCCS_FORMAT_RG16F = GMM_FLATCCS_FORMAT_R16S,
|
||||
GMM_FLATCCS_FORMAT_RG16U = GMM_FLATCCS_FORMAT_R16S,
|
||||
GMM_FLATCCS_FORMAT_RG16S = GMM_FLATCCS_FORMAT_R16S,
|
||||
GMM_FLATCCS_FORMAT_RGBA16S = GMM_FLATCCS_FORMAT_R16S,
|
||||
GMM_FLATCCS_FORMAT_RGBA16U = GMM_FLATCCS_FORMAT_R16S,
|
||||
GMM_FLATCCS_FORMAT_RGBA16F = GMM_FLATCCS_FORMAT_R16S,
|
||||
|
||||
GMM_FLATCCS_MIN_RC_FORMAT = GMM_FLATCCS_FORMAT_R16S,
|
||||
|
||||
GMM_FLATCCS_FORMAT_R32F,
|
||||
GMM_FLATCCS_FORMAT_R32S = GMM_FLATCCS_FORMAT_R32F,
|
||||
GMM_FLATCCS_FORMAT_R32U = GMM_FLATCCS_FORMAT_R32F,
|
||||
GMM_FLATCCS_FORMAT_RG32F = GMM_FLATCCS_FORMAT_R32F,
|
||||
GMM_FLATCCS_FORMAT_RG32S = GMM_FLATCCS_FORMAT_R32F,
|
||||
GMM_FLATCCS_FORMAT_RG32U = GMM_FLATCCS_FORMAT_R32F,
|
||||
GMM_FLATCCS_FORMAT_RGBA32F = GMM_FLATCCS_FORMAT_R32F,
|
||||
GMM_FLATCCS_FORMAT_RGBA32S = GMM_FLATCCS_FORMAT_R32F,
|
||||
GMM_FLATCCS_FORMAT_RGBA32U = GMM_FLATCCS_FORMAT_R32F,
|
||||
|
||||
GMM_FLATCCS_FORMAT_RGB5A1,
|
||||
GMM_FLATCCS_FORMAT_RGBA4 = GMM_FLATCCS_FORMAT_RGB5A1,
|
||||
GMM_FLATCCS_FORMAT_B5G6R5 = GMM_FLATCCS_FORMAT_RGB5A1,
|
||||
GMM_FLATCCS_FORMAT_R8S = GMM_FLATCCS_FORMAT_RGB5A1,
|
||||
GMM_FLATCCS_FORMAT_R8U = GMM_FLATCCS_FORMAT_RGB5A1,
|
||||
GMM_FLATCCS_FORMAT_RG8S = GMM_FLATCCS_FORMAT_RGB5A1,
|
||||
GMM_FLATCCS_FORMAT_RG8U = GMM_FLATCCS_FORMAT_RGB5A1,
|
||||
GMM_FLATCCS_FORMAT_RGBA8S = GMM_FLATCCS_FORMAT_RGB5A1,
|
||||
GMM_FLATCCS_FORMAT_RGBA8U = GMM_FLATCCS_FORMAT_RGB5A1,
|
||||
|
||||
GMM_FLATCCS_FORMAT_RGB10A2,
|
||||
GMM_FLATCCS_FORMAT_RG11B10,
|
||||
|
||||
GMM_FLATCCS_FORMAT_R32F1,
|
||||
GMM_FLATCCS_FORMAT_R32S1 = GMM_FLATCCS_FORMAT_R32F1,
|
||||
GMM_FLATCCS_FORMAT_R32U1 = GMM_FLATCCS_FORMAT_R32F1,
|
||||
|
||||
GMM_FLATCCS_FORMAT_R16F1,
|
||||
GMM_FLATCCS_FORMAT_R16S1 = GMM_FLATCCS_FORMAT_R16F1,
|
||||
GMM_FLATCCS_FORMAT_R16U1 = GMM_FLATCCS_FORMAT_R16F1,
|
||||
|
||||
GMM_FLATCCS_FORMAT_R8S1,
|
||||
GMM_FLATCCS_FORMAT_R8U1 = GMM_FLATCCS_FORMAT_R8S1,
|
||||
|
||||
GMM_FLATCCS_MAX_RC_FORMAT = GMM_FLATCCS_FORMAT_R8U1,
|
||||
|
||||
GMM_FLATCCS_MIN_MC_FORMAT = 0x21, //(0x1 <<5) ie Msb-5th bit turned on to identify MC encoding, to drop before SurfaceState usage
|
||||
GMM_FLATCCS_FORMAT_RGBA16_MEDIA = GMM_FLATCCS_MIN_MC_FORMAT,
|
||||
GMM_FLATCCS_FORMAT_Y210,
|
||||
GMM_FLATCCS_FORMAT_YUY2,
|
||||
GMM_FLATCCS_FORMAT_Y410,
|
||||
GMM_FLATCCS_FORMAT_Y216,
|
||||
GMM_FLATCCS_FORMAT_Y416,
|
||||
GMM_FLATCCS_FORMAT_P010,
|
||||
GMM_FLATCCS_FORMAT_P016,
|
||||
GMM_FLATCCS_FORMAT_AYUV,
|
||||
GMM_FLATCCS_FORMAT_ARGB8b,
|
||||
GMM_FLATCCS_FORMAT_SWAPY,
|
||||
GMM_FLATCCS_FORMAT_SWAPUV,
|
||||
GMM_FLATCCS_FORMAT_SWAPUVY,
|
||||
GMM_FLATCCS_FORMAT_RGB10b,
|
||||
GMM_FLATCCS_FORMAT_NV12,
|
||||
|
||||
GMM_FLATCCS_FORMAT_YCRCB_SWAPUV = GMM_FLATCCS_FORMAT_SWAPUV,
|
||||
GMM_FLATCCS_FORMAT_YCRCB_SWAPUVY = GMM_FLATCCS_FORMAT_SWAPUVY,
|
||||
GMM_FLATCCS_FORMAT_YCRCB_SWAPY = GMM_FLATCCS_FORMAT_SWAPY,
|
||||
|
||||
GMM_FLATCCS_MAX_MC_FORMAT = GMM_FLATCCS_FORMAT_NV12, //should always be equal to last format encoding
|
||||
|
||||
GMM_FLATCCS_FORMAT_INVALID, //equal to last valid encoding plus one
|
||||
} GMM_FLATCCS_FORMAT;
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
namespace GmmLib
|
||||
|
@ -101,4 +180,4 @@ namespace GmmLib
|
|||
};
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -43,6 +43,16 @@ namespace GmmLib
|
|||
private:
|
||||
|
||||
protected:
|
||||
virtual uint32_t GetMipTailByteOffset(
|
||||
GMM_TEXTURE_INFO *pTexInfo,
|
||||
uint32_t MipLevel);
|
||||
|
||||
virtual void GetMipTailGeometryOffset(
|
||||
GMM_TEXTURE_INFO *pTexInfo,
|
||||
uint32_t MipLevel,
|
||||
uint32_t * OffsetX,
|
||||
uint32_t * OffsetY,
|
||||
uint32_t * OffsetZ);
|
||||
|
||||
virtual uint32_t Get2DMipMapHeight(
|
||||
GMM_TEXTURE_INFO *pTexInfo);
|
||||
|
@ -102,4 +112,4 @@ namespace GmmLib
|
|||
/* inline functions */
|
||||
};
|
||||
}
|
||||
#endif // #ifdef __cplusplus
|
||||
#endif // #ifdef __cplusplus
|
||||
|
|
|
@ -48,6 +48,7 @@ namespace GmmLib
|
|||
GMM_STATUS FillTexBlockMem(
|
||||
GMM_TEXTURE_INFO *pTexInfo,
|
||||
__GMM_BUFFER_TYPE *pRestrictions);
|
||||
void ResetRestrictions(__GMM_BUFFER_TYPE *pRestriction);
|
||||
|
||||
void GetTexRestrictions(
|
||||
GMM_TEXTURE_INFO* pTexInfo,
|
||||
|
|
|
@ -149,6 +149,31 @@ typedef struct GT_CCS_INFO
|
|||
|
||||
} GT_CCS_INFO;
|
||||
|
||||
typedef struct GT_MULTI_TILE_ARCH_INFO
|
||||
{
|
||||
// Total Count of Tiles enabled
|
||||
uint8_t TileCount;
|
||||
|
||||
// Mask of all enabled Tiles
|
||||
union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint8_t Tile0 : 1;
|
||||
uint8_t Tile1 : 1;
|
||||
uint8_t Tile2 : 1;
|
||||
uint8_t Tile3 : 1;
|
||||
uint8_t Reserved : 4;
|
||||
};
|
||||
|
||||
uint8_t TileMask;
|
||||
};
|
||||
|
||||
// flag to check if MultiTileArchInfo has valid data or not
|
||||
bool IsValid;
|
||||
|
||||
} GT_MULTI_TILE_ARCH_INFO;
|
||||
|
||||
typedef struct GT_SQIDI_INFO
|
||||
{
|
||||
uint32_t NumberofSQIDI; // Total no. of enabled SQIDIs.
|
||||
|
@ -235,6 +260,7 @@ typedef struct GT_SYSTEM_INFO
|
|||
uint32_t ReservedCCSWays; // Reserved CCS ways provides value of reserved L3 ways for CCS when CCS is enabled.
|
||||
// This is a hardcoded value as suggested by HW. No MMIO read is needed for same.
|
||||
GT_CCS_INFO CCSInfo; // CCSInfo provides details(enabled/disabled) of all CCS instances.
|
||||
GT_MULTI_TILE_ARCH_INFO MultiTileArchInfo; // MultiTileArchInfo provides details(enabled/disabled) of GT Tiles in case of Multi Tile Architecture SKUs
|
||||
|
||||
uint32_t NumThreadsPerEu; // Number of threads per EU.
|
||||
GT_CACHE_TYPES CacheTypes; // Types of caches available on system (L3/LLC/eDRAM).
|
||||
|
|
|
@ -71,7 +71,8 @@ typedef enum {
|
|||
IGFX_ALDERLAKE_S,
|
||||
IGFX_ALDERLAKE_P,
|
||||
|
||||
IGFX_DG1 = 1210,
|
||||
IGFX_DG1 = 1210,
|
||||
IGFX_XE_HP_SDV = 1250,
|
||||
|
||||
IGFX_MAX_PRODUCT,
|
||||
IGFX_GENNEXT = 0x7ffffffe,
|
||||
|
@ -124,6 +125,8 @@ typedef enum {
|
|||
IGFX_GEN11LP_CORE = 16, //Gen11 LP Family
|
||||
IGFX_GEN12_CORE = 17, //Gen12 Family
|
||||
IGFX_GEN12LP_CORE = 18, //Gen12 LP Family
|
||||
IGFX_XE_HP_CORE =0x0c05, //XE_HP family
|
||||
|
||||
//Please add new GENs BEFORE THIS !
|
||||
IGFX_MAX_CORE,
|
||||
|
||||
|
@ -279,7 +282,8 @@ typedef enum __NATIVEGTTYPE
|
|||
#define GFX_GET_CURRENT_RENDERCORE(p) ( (p).eRenderCoreFamily )
|
||||
|
||||
// This macro returns true if the product family is discrete
|
||||
#define GFX_IS_DISCRETE_FAMILY(p) ( ( GFX_GET_CURRENT_PRODUCT(p) == IGFX_DG1 ) )
|
||||
#define GFX_IS_DISCRETE_FAMILY(p) ( ( GFX_GET_CURRENT_PRODUCT(p) == IGFX_DG1 ) || \
|
||||
( GFX_GET_CURRENT_PRODUCT(p) == IGFX_XE_HP_SDV ))
|
||||
|
||||
// These macros return true/false depending on the current render family.
|
||||
#define GFX_IS_NAPA_RENDER_FAMILY(p) ( ( GFX_GET_CURRENT_RENDERCORE(p) == IGFX_GEN3_CORE ) || \
|
||||
|
@ -1186,6 +1190,24 @@ typedef enum __NATIVEGTTYPE
|
|||
#define ITGL_LP_1x2x16_DESK_WS_65W_DEVICE_F0_ID 0x9A78 // Desktop WS- S81 - 35W/65W/95W
|
||||
#define ITGL_LP_GT0_ULT_DEVICE_F0_ID 0x9A7F // GT0 - No GFX, Display Only
|
||||
|
||||
#define DEV_ID_0205 0x0205
|
||||
#define DEV_ID_020A 0x020A
|
||||
//Internal Validation Sku's Only
|
||||
#define DEV_ID_0201 0x0201
|
||||
#define DEV_ID_0202 0x0202
|
||||
#define DEV_ID_0203 0x0203
|
||||
#define DEV_ID_0204 0x0204
|
||||
#define DEV_ID_0206 0x0206
|
||||
#define DEV_ID_0207 0x0207
|
||||
#define DEV_ID_0208 0x0208
|
||||
#define DEV_ID_0209 0x0209
|
||||
#define DEV_ID_020B 0x020B
|
||||
#define DEV_ID_020C 0x020C
|
||||
#define DEV_ID_020D 0x020D
|
||||
#define DEV_ID_020E 0x020E
|
||||
#define DEV_ID_020F 0x020F
|
||||
#define DEV_ID_0210 0x0210
|
||||
|
||||
#define DEV_ID_FF20 0xFF20
|
||||
#define DEV_ID_9A49 0x9A49
|
||||
#define DEV_ID_9A40 0x9A40
|
||||
|
|
|
@ -99,6 +99,10 @@ typedef struct _SKU_FEATURE_TABLE
|
|||
unsigned int FtrLocalMemory : 1;
|
||||
unsigned int FtrCameraCaptureCaching : 1;
|
||||
unsigned int FtrLocalMemoryAllows4KB : 1;
|
||||
unsigned int FtrPpgtt64KBWalkOptimization : 1; // XeHP 64KB Page table walk optimization on PPGTT.
|
||||
unsigned int FtrFlatPhysCCS : 1; // XeHP compression ie flat physical CCS
|
||||
unsigned int FtrDisplayXTiling : 1; // Fallback to Legacy TileX Display, used for Pre-SI platforms.
|
||||
unsigned int FtrMultiTileArch : 1;
|
||||
};
|
||||
|
||||
|
||||
|
@ -120,6 +124,7 @@ typedef struct _SKU_FEATURE_TABLE
|
|||
{
|
||||
unsigned int FtrRendComp : 1; // For Render Compression Feature on Gen9+
|
||||
unsigned int FtrDisplayYTiling : 1; // For Y Tile Feature on Gen9+
|
||||
unsigned int FtrDisplayDisabled : 1; // Server skus with Display
|
||||
|
||||
};
|
||||
|
||||
|
@ -133,6 +138,10 @@ typedef struct _SKU_FEATURE_TABLE
|
|||
{
|
||||
unsigned int FtrVgt : 1;
|
||||
};
|
||||
struct // For MultiTileArch, KMD reports default tile assignment to UMD-GmmLib - via __KmQueryDriverPrivateInfo
|
||||
{
|
||||
unsigned int FtrAssignedGpuTile : 3; // Indicates Gpu Tile number assigned to a process for Naive apps.
|
||||
};
|
||||
|
||||
} SKU_FEATURE_TABLE, *PSKU_FEATURE_TABLE;
|
||||
|
||||
|
@ -477,6 +486,12 @@ typedef struct _WA_TABLE
|
|||
WA_BUG_TYPE_FUNCTIONAL,
|
||||
WA_BUG_PERF_IMPACT_UNKNOWN, WA_COMPONENT_GMM)
|
||||
|
||||
WA_DECLARE(
|
||||
WaDefaultTile4,
|
||||
"[XeHP] Keep Tile4 as default on XeHP till B stepping",
|
||||
WA_BUG_TYPE_UNKNOWN,
|
||||
WA_BUG_PERF_IMPACT_UNKNOWN, WA_COMPONENT_GMM)
|
||||
|
||||
} WA_TABLE, *PWA_TABLE;
|
||||
|
||||
//********************************** SKU/WA Macros *************************************
|
||||
|
|
Loading…
Reference in New Issue